xref: /openbmc/linux/arch/parisc/kernel/vmlinux.lds.S (revision a1e58bbd)
1/*    Kernel link layout for various "sections"
2 *
3 *    Copyright (C) 1999-2003 Matthew Wilcox <willy at parisc-linux.org>
4 *    Copyright (C) 2000-2003 Paul Bame <bame at parisc-linux.org>
5 *    Copyright (C) 2000 John Marvin <jsm at parisc-linux.org>
6 *    Copyright (C) 2000 Michael Ang <mang with subcarrier.org>
7 *    Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
8 *    Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org>
9 *    Copyright (C) 2006 Helge Deller <deller@gmx.de>
10 *
11 *
12 *    This program is free software; you can redistribute it and/or modify
13 *    it under the terms of the GNU General Public License as published by
14 *    the Free Software Foundation; either version 2 of the License, or
15 *    (at your option) any later version.
16 *
17 *    This program is distributed in the hope that it will be useful,
18 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
19 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20 *    GNU General Public License for more details.
21 *
22 *    You should have received a copy of the GNU General Public License
23 *    along with this program; if not, write to the Free Software
24 *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
25 */
26#include <asm-generic/vmlinux.lds.h>
27/* needed for the processor specific cache alignment size */
28#include <asm/cache.h>
29#include <asm/page.h>
30#include <asm/asm-offsets.h>
31
32/* ld script to make hppa Linux kernel */
33#ifndef CONFIG_64BIT
34OUTPUT_FORMAT("elf32-hppa-linux")
35OUTPUT_ARCH(hppa)
36#else
37OUTPUT_FORMAT("elf64-hppa-linux")
38OUTPUT_ARCH(hppa:hppa2.0w)
39#endif
40
41ENTRY(_stext)
42#ifndef CONFIG_64BIT
43jiffies = jiffies_64 + 4;
44#else
45jiffies = jiffies_64;
46#endif
47SECTIONS
48{
49	. = KERNEL_BINARY_TEXT_START;
50
51	_text = .;		/* Text and read-only data */
52	.text ALIGN(16) : {
53		TEXT_TEXT
54		SCHED_TEXT
55		LOCK_TEXT
56		*(.text.do_softirq)
57		*(.text.sys_exit)
58		*(.text.do_sigaltstack)
59		*(.text.do_fork)
60		*(.text.*)
61		*(.fixup)
62		*(.lock.text)		/* out-of-line lock text */
63		*(.gnu.warning)
64	} = 0
65	/* End of text section */
66	_etext = .;
67
68	RODATA
69	BUG_TABLE
70
71	/* writeable */
72	/* Make sure this is page aligned so
73	 * that we can properly leave these
74	 * as writable
75	 */
76	. = ALIGN(PAGE_SIZE);
77	data_start = .;
78	. = ALIGN(16);
79	/* Exception table */
80	__ex_table : {
81		__start___ex_table = .;
82		*(__ex_table)
83		__stop___ex_table = .;
84	}
85
86	NOTES
87
88	/* unwind info */
89	.PARISC.unwind : {
90		__start___unwind = .;
91		*(.PARISC.unwind)
92		__stop___unwind = .;
93	}
94
95	/* rarely changed data like cpu maps */
96	. = ALIGN(16);
97	.data.read_mostly : {
98		*(.data.read_mostly)
99	}
100
101	. = ALIGN(L1_CACHE_BYTES);
102	/* Data */
103	.data : {
104		DATA_DATA
105		CONSTRUCTORS
106	}
107
108	. = ALIGN(L1_CACHE_BYTES);
109	.data.cacheline_aligned : {
110		*(.data.cacheline_aligned)
111	}
112
113	/* PA-RISC locks requires 16-byte alignment */
114	. = ALIGN(16);
115	.data.lock_aligned : {
116		*(.data.lock_aligned)
117	}
118
119	/* nosave data is really only used for software suspend...it's here
120	 * just in case we ever implement it
121	 */
122	. = ALIGN(PAGE_SIZE);
123	__nosave_begin = .;
124	.data_nosave : {
125		*(.data.nosave)
126	}
127	. = ALIGN(PAGE_SIZE);
128	__nosave_end = .;
129
130	/* End of data section */
131	_edata = .;
132
133	/* BSS */
134	__bss_start = .;
135	/* page table entries need to be PAGE_SIZE aligned */
136	. = ALIGN(PAGE_SIZE);
137	.data.vmpages : {
138		*(.data.vm0.pmd)
139		*(.data.vm0.pgd)
140		*(.data.vm0.pte)
141	}
142	.bss : {
143		*(.bss)
144		*(COMMON)
145	}
146	__bss_stop = .;
147
148
149	/* assembler code expects init_task to be 16k aligned */
150	. = ALIGN(16384);
151	/* init_task */
152	.data.init_task : {
153		*(.data.init_task)
154	}
155
156#ifdef CONFIG_64BIT
157	. = ALIGN(16);
158	/* Linkage tables */
159	.opd : {
160		*(.opd)
161	} PROVIDE (__gp = .);
162	.plt : {
163		*(.plt)
164	}
165	.dlt : {
166		*(.dlt)
167	}
168#endif
169
170	/* reserve space for interrupt stack by aligning __init* to 16k */
171	. = ALIGN(16384);
172	__init_begin = .;
173	.init.text : {
174		_sinittext = .;
175		INIT_TEXT
176		_einittext = .;
177	}
178	.init.data : {
179		INIT_DATA
180	}
181	. = ALIGN(16);
182	.init.setup : {
183		__setup_start = .;
184		*(.init.setup)
185		__setup_end = .;
186	}
187	.initcall.init : {
188		__initcall_start = .;
189		INITCALLS
190		__initcall_end = .;
191	}
192	.con_initcall.init : {
193		__con_initcall_start = .;
194		*(.con_initcall.init)
195		__con_initcall_end = .;
196	}
197	SECURITY_INIT
198
199	/* alternate instruction replacement.  This is a mechanism x86 uses
200	 * to detect the CPU type and replace generic instruction sequences
201	 * with CPU specific ones.  We don't currently do this in PA, but
202	 * it seems like a good idea...
203	 */
204	. = ALIGN(4);
205	.altinstructions : {
206		__alt_instructions = .;
207		*(.altinstructions)
208		__alt_instructions_end = .;
209	}
210	.altinstr_replacement : {
211		*(.altinstr_replacement)
212	}
213
214	/* .exit.text is discard at runtime, not link time, to deal with references
215	 *  from .altinstructions and .eh_frame
216	 */
217	.exit.text : {
218		EXIT_TEXT
219	}
220	.exit.data : {
221		EXIT_DATA
222	}
223#ifdef CONFIG_BLK_DEV_INITRD
224	. = ALIGN(PAGE_SIZE);
225	.init.ramfs : {
226		__initramfs_start = .;
227		*(.init.ramfs)
228		__initramfs_end = .;
229	}
230#endif
231
232	PERCPU(PAGE_SIZE)
233	. = ALIGN(PAGE_SIZE);
234	__init_end = .;
235	/* freed after init ends here */
236	_end = . ;
237
238	/* Sections to be discarded */
239	/DISCARD/ : {
240		*(.exitcall.exit)
241#ifdef CONFIG_64BIT
242		/* temporary hack until binutils is fixed to not emit these
243	 	 * for static binaries
244		 */
245		*(.interp)
246		*(.dynsym)
247		*(.dynstr)
248		*(.dynamic)
249		*(.hash)
250		*(.gnu.hash)
251#endif
252	}
253
254	STABS_DEBUG
255	.note 0 : { *(.note) }
256}
257