1 /* $Id: processor.c,v 1.1 2002/07/20 16:27:06 rhirst Exp $ 2 * 3 * Initial setup-routines for HP 9000 based hardware. 4 * 5 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 6 * Modifications for PA-RISC (C) 1999 Helge Deller <deller@gmx.de> 7 * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf) 8 * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net> 9 * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org> 10 * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net> 11 * 12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2, or (at your option) 17 * any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License 25 * along with this program; if not, write to the Free Software 26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 27 * 28 */ 29 #include <linux/delay.h> 30 #include <linux/init.h> 31 #include <linux/mm.h> 32 #include <linux/module.h> 33 #include <linux/seq_file.h> 34 #include <linux/slab.h> 35 #include <linux/cpu.h> 36 #include <asm/param.h> 37 #include <asm/cache.h> 38 #include <asm/hardware.h> /* for register_parisc_driver() stuff */ 39 #include <asm/processor.h> 40 #include <asm/page.h> 41 #include <asm/pdc.h> 42 #include <asm/pdcpat.h> 43 #include <asm/irq.h> /* for struct irq_region */ 44 #include <asm/parisc-device.h> 45 46 struct system_cpuinfo_parisc boot_cpu_data __read_mostly; 47 EXPORT_SYMBOL(boot_cpu_data); 48 49 struct cpuinfo_parisc cpu_data[NR_CPUS] __read_mostly; 50 51 extern int update_cr16_clocksource(void); /* from time.c */ 52 53 /* 54 ** PARISC CPU driver - claim "device" and initialize CPU data structures. 55 ** 56 ** Consolidate per CPU initialization into (mostly) one module. 57 ** Monarch CPU will initialize boot_cpu_data which shouldn't 58 ** change once the system has booted. 59 ** 60 ** The callback *should* do per-instance initialization of 61 ** everything including the monarch. "Per CPU" init code in 62 ** setup.c:start_parisc() has migrated here and start_parisc() 63 ** will call register_parisc_driver(&cpu_driver) before calling do_inventory(). 64 ** 65 ** The goal of consolidating CPU initialization into one place is 66 ** to make sure all CPUs get initialized the same way. 67 ** The code path not shared is how PDC hands control of the CPU to the OS. 68 ** The initialization of OS data structures is the same (done below). 69 */ 70 71 /** 72 * processor_probe - Determine if processor driver should claim this device. 73 * @dev: The device which has been found. 74 * 75 * Determine if processor driver should claim this chip (return 0) or not 76 * (return 1). If so, initialize the chip and tell other partners in crime 77 * they have work to do. 78 */ 79 static int __cpuinit processor_probe(struct parisc_device *dev) 80 { 81 unsigned long txn_addr; 82 unsigned long cpuid; 83 struct cpuinfo_parisc *p; 84 85 #ifdef CONFIG_SMP 86 if (num_online_cpus() >= NR_CPUS) { 87 printk(KERN_INFO "num_online_cpus() >= NR_CPUS\n"); 88 return 1; 89 } 90 #else 91 if (boot_cpu_data.cpu_count > 0) { 92 printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n"); 93 return 1; 94 } 95 #endif 96 97 /* logical CPU ID and update global counter 98 * May get overwritten by PAT code. 99 */ 100 cpuid = boot_cpu_data.cpu_count; 101 txn_addr = dev->hpa.start; /* for legacy PDC */ 102 103 #ifdef CONFIG_64BIT 104 if (is_pdc_pat()) { 105 ulong status; 106 unsigned long bytecnt; 107 pdc_pat_cell_mod_maddr_block_t pa_pdc_cell; 108 #undef USE_PAT_CPUID 109 #ifdef USE_PAT_CPUID 110 struct pdc_pat_cpu_num cpu_info; 111 #endif 112 113 status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc, 114 dev->mod_index, PA_VIEW, &pa_pdc_cell); 115 116 BUG_ON(PDC_OK != status); 117 118 /* verify it's the same as what do_pat_inventory() found */ 119 BUG_ON(dev->mod_info != pa_pdc_cell.mod_info); 120 BUG_ON(dev->pmod_loc != pa_pdc_cell.mod_location); 121 122 txn_addr = pa_pdc_cell.mod[0]; /* id_eid for IO sapic */ 123 124 #ifdef USE_PAT_CPUID 125 /* We need contiguous numbers for cpuid. Firmware's notion 126 * of cpuid is for physical CPUs and we just don't care yet. 127 * We'll care when we need to query PAT PDC about a CPU *after* 128 * boot time (ie shutdown a CPU from an OS perspective). 129 */ 130 /* get the cpu number */ 131 status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start); 132 133 BUG_ON(PDC_OK != status); 134 135 if (cpu_info.cpu_num >= NR_CPUS) { 136 printk(KERN_WARNING "IGNORING CPU at 0x%x," 137 " cpu_slot_id > NR_CPUS" 138 " (%ld > %d)\n", 139 dev->hpa.start, cpu_info.cpu_num, NR_CPUS); 140 /* Ignore CPU since it will only crash */ 141 boot_cpu_data.cpu_count--; 142 return 1; 143 } else { 144 cpuid = cpu_info.cpu_num; 145 } 146 #endif 147 } 148 #endif 149 150 p = &cpu_data[cpuid]; 151 boot_cpu_data.cpu_count++; 152 153 /* initialize counters - CPU 0 gets it_value set in time_init() */ 154 if (cpuid) 155 memset(p, 0, sizeof(struct cpuinfo_parisc)); 156 157 p->loops_per_jiffy = loops_per_jiffy; 158 p->dev = dev; /* Save IODC data in case we need it */ 159 p->hpa = dev->hpa.start; /* save CPU hpa */ 160 p->cpuid = cpuid; /* save CPU id */ 161 p->txn_addr = txn_addr; /* save CPU IRQ address */ 162 #ifdef CONFIG_SMP 163 /* 164 ** FIXME: review if any other initialization is clobbered 165 ** for boot_cpu by the above memset(). 166 */ 167 168 /* stolen from init_percpu_prof() */ 169 cpu_data[cpuid].prof_counter = 1; 170 cpu_data[cpuid].prof_multiplier = 1; 171 #endif 172 173 /* 174 ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into 175 ** OS control. RENDEZVOUS is the default state - see mem_set above. 176 ** p->state = STATE_RENDEZVOUS; 177 */ 178 179 #if 0 180 /* CPU 0 IRQ table is statically allocated/initialized */ 181 if (cpuid) { 182 struct irqaction actions[]; 183 184 /* 185 ** itimer and ipi IRQ handlers are statically initialized in 186 ** arch/parisc/kernel/irq.c. ie Don't need to register them. 187 */ 188 actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC); 189 if (!actions) { 190 /* not getting it's own table, share with monarch */ 191 actions = cpu_irq_actions[0]; 192 } 193 194 cpu_irq_actions[cpuid] = actions; 195 } 196 #endif 197 198 /* 199 * Bring this CPU up now! (ignore bootstrap cpuid == 0) 200 */ 201 #ifdef CONFIG_SMP 202 if (cpuid) { 203 cpu_set(cpuid, cpu_present_map); 204 cpu_up(cpuid); 205 } 206 #endif 207 208 /* If we've registered more than one cpu, 209 * we'll use the jiffies clocksource since cr16 210 * is not synchronized between CPUs. 211 */ 212 update_cr16_clocksource(); 213 214 return 0; 215 } 216 217 /** 218 * collect_boot_cpu_data - Fill the boot_cpu_data structure. 219 * 220 * This function collects and stores the generic processor information 221 * in the boot_cpu_data structure. 222 */ 223 void __init collect_boot_cpu_data(void) 224 { 225 memset(&boot_cpu_data, 0, sizeof(boot_cpu_data)); 226 227 boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */ 228 229 /* get CPU-Model Information... */ 230 #define p ((unsigned long *)&boot_cpu_data.pdc.model) 231 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) 232 printk(KERN_INFO 233 "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", 234 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]); 235 #undef p 236 237 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) 238 printk(KERN_INFO "vers %08lx\n", 239 boot_cpu_data.pdc.versions); 240 241 if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) 242 printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n", 243 (boot_cpu_data.pdc.cpuid >> 5) & 127, 244 boot_cpu_data.pdc.cpuid & 31, 245 boot_cpu_data.pdc.cpuid); 246 247 if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK) 248 printk(KERN_INFO "capabilities 0x%lx\n", 249 boot_cpu_data.pdc.capabilities); 250 251 if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK) 252 printk(KERN_INFO "model %s\n", 253 boot_cpu_data.pdc.sys_model_name); 254 255 boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion; 256 boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion; 257 258 boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion); 259 boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0]; 260 boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1]; 261 } 262 263 264 /** 265 * init_cpu_profiler - enable/setup per cpu profiling hooks. 266 * @cpunum: The processor instance. 267 * 268 * FIXME: doesn't do much yet... 269 */ 270 static inline void __init 271 init_percpu_prof(int cpunum) 272 { 273 cpu_data[cpunum].prof_counter = 1; 274 cpu_data[cpunum].prof_multiplier = 1; 275 } 276 277 278 /** 279 * init_per_cpu - Handle individual processor initializations. 280 * @cpunum: logical processor number. 281 * 282 * This function handles initialization for *every* CPU 283 * in the system: 284 * 285 * o Set "default" CPU width for trap handlers 286 * 287 * o Enable FP coprocessor 288 * REVISIT: this could be done in the "code 22" trap handler. 289 * (frowands idea - that way we know which processes need FP 290 * registers saved on the interrupt stack.) 291 * NEWS FLASH: wide kernels need FP coprocessor enabled to handle 292 * formatted printing of %lx for example (double divides I think) 293 * 294 * o Enable CPU profiling hooks. 295 */ 296 int __init init_per_cpu(int cpunum) 297 { 298 int ret; 299 struct pdc_coproc_cfg coproc_cfg; 300 301 set_firmware_width(); 302 ret = pdc_coproc_cfg(&coproc_cfg); 303 304 if(ret >= 0 && coproc_cfg.ccr_functional) { 305 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */ 306 307 /* FWIW, FP rev/model is a more accurate way to determine 308 ** CPU type. CPU rev/model has some ambiguous cases. 309 */ 310 cpu_data[cpunum].fp_rev = coproc_cfg.revision; 311 cpu_data[cpunum].fp_model = coproc_cfg.model; 312 313 printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n", 314 cpunum, coproc_cfg.revision, coproc_cfg.model); 315 316 /* 317 ** store status register to stack (hopefully aligned) 318 ** and clear the T-bit. 319 */ 320 asm volatile ("fstd %fr0,8(%sp)"); 321 322 } else { 323 printk(KERN_WARNING "WARNING: No FP CoProcessor?!" 324 " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n" 325 #ifdef CONFIG_64BIT 326 "Halting Machine - FP required\n" 327 #endif 328 , coproc_cfg.ccr_functional); 329 #ifdef CONFIG_64BIT 330 mdelay(100); /* previous chars get pushed to console */ 331 panic("FP CoProc not reported"); 332 #endif 333 } 334 335 /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */ 336 init_percpu_prof(cpunum); 337 338 return ret; 339 } 340 341 /* 342 * Display CPU info for all CPUs. 343 */ 344 int 345 show_cpuinfo (struct seq_file *m, void *v) 346 { 347 int n; 348 349 for(n=0; n<boot_cpu_data.cpu_count; n++) { 350 #ifdef CONFIG_SMP 351 if (0 == cpu_data[n].hpa) 352 continue; 353 #endif 354 seq_printf(m, "processor\t: %d\n" 355 "cpu family\t: PA-RISC %s\n", 356 n, boot_cpu_data.family_name); 357 358 seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name ); 359 360 /* cpu MHz */ 361 seq_printf(m, "cpu MHz\t\t: %d.%06d\n", 362 boot_cpu_data.cpu_hz / 1000000, 363 boot_cpu_data.cpu_hz % 1000000 ); 364 365 seq_printf(m, "model\t\t: %s\n" 366 "model name\t: %s\n", 367 boot_cpu_data.pdc.sys_model_name, 368 cpu_data[n].dev ? 369 cpu_data[n].dev->name : "Unknown" ); 370 371 seq_printf(m, "hversion\t: 0x%08x\n" 372 "sversion\t: 0x%08x\n", 373 boot_cpu_data.hversion, 374 boot_cpu_data.sversion ); 375 376 /* print cachesize info */ 377 show_cache_info(m); 378 379 seq_printf(m, "bogomips\t: %lu.%02lu\n", 380 cpu_data[n].loops_per_jiffy / (500000 / HZ), 381 (cpu_data[n].loops_per_jiffy / (5000 / HZ)) % 100); 382 383 seq_printf(m, "software id\t: %ld\n\n", 384 boot_cpu_data.pdc.model.sw_id); 385 } 386 return 0; 387 } 388 389 static const struct parisc_device_id processor_tbl[] = { 390 { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID }, 391 { 0, } 392 }; 393 394 static struct parisc_driver cpu_driver = { 395 .name = "CPU", 396 .id_table = processor_tbl, 397 .probe = processor_probe 398 }; 399 400 /** 401 * processor_init - Processor initialization procedure. 402 * 403 * Register this driver. 404 */ 405 void __init processor_init(void) 406 { 407 register_parisc_driver(&cpu_driver); 408 } 409