xref: /openbmc/linux/arch/parisc/kernel/alternative.c (revision 3dc4b6fb)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *    Alternative live-patching for parisc.
4  *    Copyright (C) 2018 Helge Deller <deller@gmx.de>
5  *
6  */
7 
8 #include <asm/processor.h>
9 #include <asm/sections.h>
10 #include <asm/alternative.h>
11 
12 #include <linux/module.h>
13 
14 static int no_alternatives;
15 static int __init setup_no_alternatives(char *str)
16 {
17 	no_alternatives = 1;
18 	return 1;
19 }
20 __setup("no-alternatives", setup_no_alternatives);
21 
22 void __init_or_module apply_alternatives(struct alt_instr *start,
23 		 struct alt_instr *end, const char *module_name)
24 {
25 	struct alt_instr *entry;
26 	int index = 0, applied = 0;
27 	int num_cpus = num_online_cpus();
28 
29 	for (entry = start; entry < end; entry++, index++) {
30 
31 		u32 *from, cond, replacement;
32 		s32 len;
33 
34 		from = (u32 *)((ulong)&entry->orig_offset + entry->orig_offset);
35 		len = entry->len;
36 		cond = entry->cond;
37 		replacement = entry->replacement;
38 
39 		WARN_ON(!cond);
40 
41 		if (cond != ALT_COND_ALWAYS && no_alternatives)
42 			continue;
43 
44 		pr_debug("Check %d: Cond 0x%x, Replace %02d instructions @ 0x%px with 0x%08x\n",
45 			index, cond, len, from, replacement);
46 
47 		if ((cond & ALT_COND_NO_SMP) && (num_cpus != 1))
48 			continue;
49 		if ((cond & ALT_COND_NO_DCACHE) && (cache_info.dc_size != 0))
50 			continue;
51 		if ((cond & ALT_COND_NO_ICACHE) && (cache_info.ic_size != 0))
52 			continue;
53 		if ((cond & ALT_COND_RUN_ON_QEMU) && !running_on_qemu)
54 			continue;
55 
56 		/*
57 		 * If the PDC_MODEL capabilities has Non-coherent IO-PDIR bit
58 		 * set (bit #61, big endian), we have to flush and sync every
59 		 * time IO-PDIR is changed in Ike/Astro.
60 		 */
61 		if ((cond & ALT_COND_NO_IOC_FDC) &&
62 			((boot_cpu_data.cpu_type <= pcxw_) ||
63 			 (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)))
64 			continue;
65 
66 		/* Want to replace pdtlb by a pdtlb,l instruction? */
67 		if (replacement == INSN_PxTLB) {
68 			replacement = *from;
69 			if (boot_cpu_data.cpu_type >= pcxu) /* >= pa2.0 ? */
70 				replacement |= (1 << 10); /* set el bit */
71 		}
72 
73 		/*
74 		 * Replace instruction with NOPs?
75 		 * For long distance insert a branch instruction instead.
76 		 */
77 		if (replacement == INSN_NOP && len > 1)
78 			replacement = 0xe8000002 + (len-2)*8; /* "b,n .+8" */
79 
80 		pr_debug("ALTERNATIVE %3d: Cond %2x, Replace %2d instructions to 0x%08x @ 0x%px (%pS)\n",
81 			index, cond, len, replacement, from, from);
82 
83 		if (len < 0) {
84 			/* Replace multiple instruction by new code */
85 			u32 *source;
86 			len = -len;
87 			source = (u32 *)((ulong)&entry->replacement + entry->replacement);
88 			memcpy(from, source, 4 * len);
89 		} else {
90 			/* Replace by one instruction */
91 			*from = replacement;
92 		}
93 		applied++;
94 	}
95 
96 	pr_info("%s%salternatives: applied %d out of %d patches\n",
97 		module_name ? : "", module_name ? " " : "",
98 		applied, index);
99 }
100 
101 
102 void __init apply_alternatives_all(void)
103 {
104 	set_kernel_text_rw(1);
105 
106 	apply_alternatives((struct alt_instr *) &__alt_instructions,
107 		(struct alt_instr *) &__alt_instructions_end, NULL);
108 
109 	set_kernel_text_rw(0);
110 }
111