xref: /openbmc/linux/arch/parisc/include/asm/smp.h (revision 8fa5723aa7e053d498336b48448b292fc2e0458b)
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
3 
4 
5 #if defined(CONFIG_SMP)
6 
7 /* Page Zero Location PDC will look for the address to branch to when we poke
8 ** slave CPUs still in "Icache loop".
9 */
10 #define PDC_OS_BOOT_RENDEZVOUS     0x10
11 #define PDC_OS_BOOT_RENDEZVOUS_HI  0x28
12 
13 #ifndef ASSEMBLY
14 #include <linux/bitops.h>
15 #include <linux/threads.h>	/* for NR_CPUS */
16 #include <linux/cpumask.h>
17 typedef unsigned long address_t;
18 
19 extern cpumask_t cpu_online_map;
20 
21 
22 /*
23  *	Private routines/data
24  *
25  *	physical and logical are equivalent until we support CPU hotplug.
26  */
27 #define cpu_number_map(cpu)	(cpu)
28 #define cpu_logical_map(cpu)	(cpu)
29 
30 extern void smp_send_reschedule(int cpu);
31 extern void smp_send_all_nop(void);
32 
33 extern void arch_send_call_function_single_ipi(int cpu);
34 extern void arch_send_call_function_ipi(cpumask_t mask);
35 
36 #endif /* !ASSEMBLY */
37 
38 /*
39  *	This magic constant controls our willingness to transfer
40  *      a process across CPUs. Such a transfer incurs cache and tlb
41  *      misses. The current value is inherited from i386. Still needs
42  *      to be tuned for parisc.
43  */
44 
45 #define PROC_CHANGE_PENALTY	15		/* Schedule penalty */
46 
47 extern unsigned long cpu_present_mask;
48 
49 #define raw_smp_processor_id()	(current_thread_info()->cpu)
50 
51 #else /* CONFIG_SMP */
52 
53 static inline void smp_send_all_nop(void) { return; }
54 
55 #endif
56 
57 #define NO_PROC_ID		0xFF		/* No processor magic marker */
58 #define ANY_PROC_ID		0xFF		/* Any processor magic marker */
59 static inline int __cpu_disable (void) {
60   return 0;
61 }
62 static inline void __cpu_die (unsigned int cpu) {
63   while(1)
64     ;
65 }
66 extern int __cpu_up (unsigned int cpu);
67 
68 #endif /*  __ASM_SMP_H */
69