xref: /openbmc/linux/arch/parisc/include/asm/smp.h (revision 82ced6fd)
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
3 
4 
5 #if defined(CONFIG_SMP)
6 
7 /* Page Zero Location PDC will look for the address to branch to when we poke
8 ** slave CPUs still in "Icache loop".
9 */
10 #define PDC_OS_BOOT_RENDEZVOUS     0x10
11 #define PDC_OS_BOOT_RENDEZVOUS_HI  0x28
12 
13 #ifndef ASSEMBLY
14 #include <linux/bitops.h>
15 #include <linux/threads.h>	/* for NR_CPUS */
16 #include <linux/cpumask.h>
17 typedef unsigned long address_t;
18 
19 
20 /*
21  *	Private routines/data
22  *
23  *	physical and logical are equivalent until we support CPU hotplug.
24  */
25 #define cpu_number_map(cpu)	(cpu)
26 #define cpu_logical_map(cpu)	(cpu)
27 
28 extern void smp_send_reschedule(int cpu);
29 extern void smp_send_all_nop(void);
30 
31 extern void arch_send_call_function_single_ipi(int cpu);
32 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
33 #define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
34 
35 #endif /* !ASSEMBLY */
36 
37 /*
38  *	This magic constant controls our willingness to transfer
39  *      a process across CPUs. Such a transfer incurs cache and tlb
40  *      misses. The current value is inherited from i386. Still needs
41  *      to be tuned for parisc.
42  */
43 
44 #define PROC_CHANGE_PENALTY	15		/* Schedule penalty */
45 
46 #define raw_smp_processor_id()	(current_thread_info()->cpu)
47 
48 #else /* CONFIG_SMP */
49 
50 static inline void smp_send_all_nop(void) { return; }
51 
52 #endif
53 
54 #define NO_PROC_ID		0xFF		/* No processor magic marker */
55 #define ANY_PROC_ID		0xFF		/* Any processor magic marker */
56 static inline int __cpu_disable (void) {
57   return 0;
58 }
59 static inline void __cpu_die (unsigned int cpu) {
60   while(1)
61     ;
62 }
63 extern int __cpu_up (unsigned int cpu);
64 
65 #endif /*  __ASM_SMP_H */
66