xref: /openbmc/linux/arch/parisc/include/asm/prefetch.h (revision 4f6cce39)
1 /*
2  * include/asm-parisc/prefetch.h
3  *
4  * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
5  * In addition, many implementations do hardware prefetching of both
6  * instructions and data.
7  *
8  * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
9  * to gr0 but not in a way that Linux can use.  If the load would cause an
10  * interruption (eg due to prefetching 0), it is suppressed on PA2.0
11  * processors, but not on 7300LC.
12  *
13  */
14 
15 #ifndef __ASM_PARISC_PREFETCH_H
16 #define __ASM_PARISC_PREFETCH_H
17 
18 #ifndef __ASSEMBLY__
19 #ifdef CONFIG_PREFETCH
20 
21 #define ARCH_HAS_PREFETCH
22 static inline void prefetch(const void *addr)
23 {
24 	__asm__(
25 #ifndef CONFIG_PA20
26 		/* Need to avoid prefetch of NULL on PA7300LC */
27 		"	extrw,u,= %0,31,32,%%r0\n"
28 #endif
29 		"	ldw 0(%0), %%r0" : : "r" (addr));
30 }
31 
32 /* LDD is a PA2.0 addition. */
33 #ifdef CONFIG_PA20
34 #define ARCH_HAS_PREFETCHW
35 static inline void prefetchw(const void *addr)
36 {
37 	__asm__("ldd 0(%0), %%r0" : : "r" (addr));
38 }
39 #endif /* CONFIG_PA20 */
40 
41 #endif /* CONFIG_PREFETCH */
42 #endif /* __ASSEMBLY__ */
43 
44 #endif /* __ASM_PARISC_PROCESSOR_H */
45