xref: /openbmc/linux/arch/parisc/include/asm/pgtable.h (revision b6dcefde)
1 #ifndef _PARISC_PGTABLE_H
2 #define _PARISC_PGTABLE_H
3 
4 #include <asm-generic/4level-fixup.h>
5 
6 #include <asm/fixmap.h>
7 
8 #ifndef __ASSEMBLY__
9 /*
10  * we simulate an x86-style page table for the linux mm code
11  */
12 
13 #include <linux/mm.h>		/* for vm_area_struct */
14 #include <linux/bitops.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
17 
18 /*
19  * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
20  * memory.  For the return value to be meaningful, ADDR must be >=
21  * PAGE_OFFSET.  This operation can be relatively expensive (e.g.,
22  * require a hash-, or multi-level tree-lookup or something of that
23  * sort) but it guarantees to return TRUE only if accessing the page
24  * at that address does not cause an error.  Note that there may be
25  * addresses for which kern_addr_valid() returns FALSE even though an
26  * access would not cause an error (e.g., this is typically true for
27  * memory mapped I/O regions.
28  *
29  * XXX Need to implement this for parisc.
30  */
31 #define kern_addr_valid(addr)	(1)
32 
33 /* Certain architectures need to do special things when PTEs
34  * within a page table are directly modified.  Thus, the following
35  * hook is made available.
36  */
37 #define set_pte(pteptr, pteval)                                 \
38         do{                                                     \
39                 *(pteptr) = (pteval);                           \
40         } while(0)
41 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
42 
43 #endif /* !__ASSEMBLY__ */
44 
45 #define pte_ERROR(e) \
46 	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
47 #define pmd_ERROR(e) \
48 	printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
49 #define pgd_ERROR(e) \
50 	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
51 
52 /* This is the size of the initially mapped kernel memory */
53 #define KERNEL_INITIAL_ORDER	24	/* 0 to 1<<24 = 16MB */
54 #define KERNEL_INITIAL_SIZE	(1 << KERNEL_INITIAL_ORDER)
55 
56 #if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
57 #define PT_NLEVELS	3
58 #define PGD_ORDER	1 /* Number of pages per pgd */
59 #define PMD_ORDER	1 /* Number of pages per pmd */
60 #define PGD_ALLOC_ORDER	2 /* first pgd contains pmd */
61 #else
62 #define PT_NLEVELS	2
63 #define PGD_ORDER	1 /* Number of pages per pgd */
64 #define PGD_ALLOC_ORDER	PGD_ORDER
65 #endif
66 
67 /* Definitions for 3rd level (we use PLD here for Page Lower directory
68  * because PTE_SHIFT is used lower down to mean shift that has to be
69  * done to get usable bits out of the PTE) */
70 #define PLD_SHIFT	PAGE_SHIFT
71 #define PLD_SIZE	PAGE_SIZE
72 #define BITS_PER_PTE	(PAGE_SHIFT - BITS_PER_PTE_ENTRY)
73 #define PTRS_PER_PTE    (1UL << BITS_PER_PTE)
74 
75 /* Definitions for 2nd level */
76 #define pgtable_cache_init()	do { } while (0)
77 
78 #define PMD_SHIFT       (PLD_SHIFT + BITS_PER_PTE)
79 #define PMD_SIZE	(1UL << PMD_SHIFT)
80 #define PMD_MASK	(~(PMD_SIZE-1))
81 #if PT_NLEVELS == 3
82 #define BITS_PER_PMD	(PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
83 #else
84 #define BITS_PER_PMD	0
85 #endif
86 #define PTRS_PER_PMD    (1UL << BITS_PER_PMD)
87 
88 /* Definitions for 1st level */
89 #define PGDIR_SHIFT	(PMD_SHIFT + BITS_PER_PMD)
90 #if (PGDIR_SHIFT + PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY) > BITS_PER_LONG
91 #define BITS_PER_PGD	(BITS_PER_LONG - PGDIR_SHIFT)
92 #else
93 #define BITS_PER_PGD	(PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
94 #endif
95 #define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
96 #define PGDIR_MASK	(~(PGDIR_SIZE-1))
97 #define PTRS_PER_PGD    (1UL << BITS_PER_PGD)
98 #define USER_PTRS_PER_PGD       PTRS_PER_PGD
99 
100 #ifdef CONFIG_64BIT
101 #define MAX_ADDRBITS	(PGDIR_SHIFT + BITS_PER_PGD)
102 #define MAX_ADDRESS	(1UL << MAX_ADDRBITS)
103 #define SPACEID_SHIFT	(MAX_ADDRBITS - 32)
104 #else
105 #define MAX_ADDRBITS	(BITS_PER_LONG)
106 #define MAX_ADDRESS	(1UL << MAX_ADDRBITS)
107 #define SPACEID_SHIFT	0
108 #endif
109 
110 /* This calculates the number of initial pages we need for the initial
111  * page tables */
112 #if (KERNEL_INITIAL_ORDER) >= (PMD_SHIFT)
113 # define PT_INITIAL	(1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
114 #else
115 # define PT_INITIAL	(1)  /* all initial PTEs fit into one page */
116 #endif
117 
118 /*
119  * pgd entries used up by user/kernel:
120  */
121 
122 #define FIRST_USER_ADDRESS	0
123 
124 /* NB: The tlb miss handlers make certain assumptions about the order */
125 /*     of the following bits, so be careful (One example, bits 25-31  */
126 /*     are moved together in one instruction).                        */
127 
128 #define _PAGE_READ_BIT     31   /* (0x001) read access allowed */
129 #define _PAGE_WRITE_BIT    30   /* (0x002) write access allowed */
130 #define _PAGE_EXEC_BIT     29   /* (0x004) execute access allowed */
131 #define _PAGE_GATEWAY_BIT  28   /* (0x008) privilege promotion allowed */
132 #define _PAGE_DMB_BIT      27   /* (0x010) Data Memory Break enable (B bit) */
133 #define _PAGE_DIRTY_BIT    26   /* (0x020) Page Dirty (D bit) */
134 #define _PAGE_FILE_BIT	_PAGE_DIRTY_BIT	/* overload this bit */
135 #define _PAGE_REFTRAP_BIT  25   /* (0x040) Page Ref. Trap enable (T bit) */
136 #define _PAGE_NO_CACHE_BIT 24   /* (0x080) Uncached Page (U bit) */
137 #define _PAGE_ACCESSED_BIT 23   /* (0x100) Software: Page Accessed */
138 #define _PAGE_PRESENT_BIT  22   /* (0x200) Software: translation valid */
139 #define _PAGE_FLUSH_BIT    21   /* (0x400) Software: translation valid */
140 				/*             for cache flushing only */
141 #define _PAGE_USER_BIT     20   /* (0x800) Software: User accessible page */
142 
143 /* N.B. The bits are defined in terms of a 32 bit word above, so the */
144 /*      following macro is ok for both 32 and 64 bit.                */
145 
146 #define xlate_pabit(x) (31 - x)
147 
148 /* this defines the shift to the usable bits in the PTE it is set so
149  * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
150  * to zero */
151 #define PTE_SHIFT	   	xlate_pabit(_PAGE_USER_BIT)
152 
153 /* PFN_PTE_SHIFT defines the shift of a PTE value to access the PFN field */
154 #define PFN_PTE_SHIFT		12
155 
156 
157 /* this is how many bits may be used by the file functions */
158 #define PTE_FILE_MAX_BITS	(BITS_PER_LONG - PTE_SHIFT)
159 
160 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
161 #define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
162 
163 #define _PAGE_READ     (1 << xlate_pabit(_PAGE_READ_BIT))
164 #define _PAGE_WRITE    (1 << xlate_pabit(_PAGE_WRITE_BIT))
165 #define _PAGE_RW       (_PAGE_READ | _PAGE_WRITE)
166 #define _PAGE_EXEC     (1 << xlate_pabit(_PAGE_EXEC_BIT))
167 #define _PAGE_GATEWAY  (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
168 #define _PAGE_DMB      (1 << xlate_pabit(_PAGE_DMB_BIT))
169 #define _PAGE_DIRTY    (1 << xlate_pabit(_PAGE_DIRTY_BIT))
170 #define _PAGE_REFTRAP  (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
171 #define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
172 #define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
173 #define _PAGE_PRESENT  (1 << xlate_pabit(_PAGE_PRESENT_BIT))
174 #define _PAGE_FLUSH    (1 << xlate_pabit(_PAGE_FLUSH_BIT))
175 #define _PAGE_USER     (1 << xlate_pabit(_PAGE_USER_BIT))
176 #define _PAGE_FILE     (1 << xlate_pabit(_PAGE_FILE_BIT))
177 
178 #define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE |  _PAGE_DIRTY | _PAGE_ACCESSED)
179 #define _PAGE_CHG_MASK	(PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
180 #define _PAGE_KERNEL	(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
181 
182 /* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
183  * are page-aligned, we don't care about the PAGE_OFFSET bits, except
184  * for a few meta-information bits, so we shift the address to be
185  * able to effectively address 40/42/44-bits of physical address space
186  * depending on 4k/16k/64k PAGE_SIZE */
187 #define _PxD_PRESENT_BIT   31
188 #define _PxD_ATTACHED_BIT  30
189 #define _PxD_VALID_BIT     29
190 
191 #define PxD_FLAG_PRESENT  (1 << xlate_pabit(_PxD_PRESENT_BIT))
192 #define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT))
193 #define PxD_FLAG_VALID    (1 << xlate_pabit(_PxD_VALID_BIT))
194 #define PxD_FLAG_MASK     (0xf)
195 #define PxD_FLAG_SHIFT    (4)
196 #define PxD_VALUE_SHIFT   (8) /* (PAGE_SHIFT-PxD_FLAG_SHIFT) */
197 
198 #ifndef __ASSEMBLY__
199 
200 #define PAGE_NONE	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
201 #define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
202 /* Others seem to make this executable, I don't know if that's correct
203    or not.  The stack is mapped this way though so this is necessary
204    in the short term - dhd@linuxcare.com, 2000-08-08 */
205 #define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
206 #define PAGE_WRITEONLY  __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
207 #define PAGE_EXECREAD   __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
208 #define PAGE_COPY       PAGE_EXECREAD
209 #define PAGE_RWX        __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
210 #define PAGE_KERNEL	__pgprot(_PAGE_KERNEL)
211 #define PAGE_KERNEL_RO	__pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
212 #define PAGE_KERNEL_UNC	__pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
213 #define PAGE_GATEWAY    __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
214 #define PAGE_FLUSH      __pgprot(_PAGE_FLUSH)
215 
216 
217 /*
218  * We could have an execute only page using "gateway - promote to priv
219  * level 3", but that is kind of silly. So, the way things are defined
220  * now, we must always have read permission for pages with execute
221  * permission. For the fun of it we'll go ahead and support write only
222  * pages.
223  */
224 
225 	 /*xwr*/
226 #define __P000  PAGE_NONE
227 #define __P001  PAGE_READONLY
228 #define __P010  __P000 /* copy on write */
229 #define __P011  __P001 /* copy on write */
230 #define __P100  PAGE_EXECREAD
231 #define __P101  PAGE_EXECREAD
232 #define __P110  __P100 /* copy on write */
233 #define __P111  __P101 /* copy on write */
234 
235 #define __S000  PAGE_NONE
236 #define __S001  PAGE_READONLY
237 #define __S010  PAGE_WRITEONLY
238 #define __S011  PAGE_SHARED
239 #define __S100  PAGE_EXECREAD
240 #define __S101  PAGE_EXECREAD
241 #define __S110  PAGE_RWX
242 #define __S111  PAGE_RWX
243 
244 
245 extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
246 
247 /* initial page tables for 0-8MB for kernel */
248 
249 extern pte_t pg0[];
250 
251 /* zero page used for uninitialized stuff */
252 
253 extern unsigned long *empty_zero_page;
254 
255 /*
256  * ZERO_PAGE is a global shared page that is always zero: used
257  * for zero-mapped memory areas etc..
258  */
259 
260 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
261 
262 #define pte_none(x)     ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
263 #define pte_present(x)	(pte_val(x) & _PAGE_PRESENT)
264 #define pte_clear(mm,addr,xp)	do { pte_val(*(xp)) = 0; } while (0)
265 
266 #define pmd_flag(x)	(pmd_val(x) & PxD_FLAG_MASK)
267 #define pmd_address(x)	((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
268 #define pgd_flag(x)	(pgd_val(x) & PxD_FLAG_MASK)
269 #define pgd_address(x)	((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
270 
271 #if PT_NLEVELS == 3
272 /* The first entry of the permanent pmd is not there if it contains
273  * the gateway marker */
274 #define pmd_none(x)	(!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
275 #else
276 #define pmd_none(x)	(!pmd_val(x))
277 #endif
278 #define pmd_bad(x)	(!(pmd_flag(x) & PxD_FLAG_VALID))
279 #define pmd_present(x)	(pmd_flag(x) & PxD_FLAG_PRESENT)
280 static inline void pmd_clear(pmd_t *pmd) {
281 #if PT_NLEVELS == 3
282 	if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
283 		/* This is the entry pointing to the permanent pmd
284 		 * attached to the pgd; cannot clear it */
285 		__pmd_val_set(*pmd, PxD_FLAG_ATTACHED);
286 	else
287 #endif
288 		__pmd_val_set(*pmd,  0);
289 }
290 
291 
292 
293 #if PT_NLEVELS == 3
294 #define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_address(pgd)))
295 #define pgd_page(pgd)	virt_to_page((void *)pgd_page_vaddr(pgd))
296 
297 /* For 64 bit we have three level tables */
298 
299 #define pgd_none(x)     (!pgd_val(x))
300 #define pgd_bad(x)      (!(pgd_flag(x) & PxD_FLAG_VALID))
301 #define pgd_present(x)  (pgd_flag(x) & PxD_FLAG_PRESENT)
302 static inline void pgd_clear(pgd_t *pgd) {
303 #if PT_NLEVELS == 3
304 	if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
305 		/* This is the permanent pmd attached to the pgd; cannot
306 		 * free it */
307 		return;
308 #endif
309 	__pgd_val_set(*pgd, 0);
310 }
311 #else
312 /*
313  * The "pgd_xxx()" functions here are trivial for a folded two-level
314  * setup: the pgd is never bad, and a pmd always exists (as it's folded
315  * into the pgd entry)
316  */
317 static inline int pgd_none(pgd_t pgd)		{ return 0; }
318 static inline int pgd_bad(pgd_t pgd)		{ return 0; }
319 static inline int pgd_present(pgd_t pgd)	{ return 1; }
320 static inline void pgd_clear(pgd_t * pgdp)	{ }
321 #endif
322 
323 /*
324  * The following only work if pte_present() is true.
325  * Undefined behaviour if not..
326  */
327 static inline int pte_dirty(pte_t pte)		{ return pte_val(pte) & _PAGE_DIRTY; }
328 static inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED; }
329 static inline int pte_write(pte_t pte)		{ return pte_val(pte) & _PAGE_WRITE; }
330 static inline int pte_file(pte_t pte)		{ return pte_val(pte) & _PAGE_FILE; }
331 static inline int pte_special(pte_t pte)	{ return 0; }
332 
333 static inline pte_t pte_mkclean(pte_t pte)	{ pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
334 static inline pte_t pte_mkold(pte_t pte)	{ pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
335 static inline pte_t pte_wrprotect(pte_t pte)	{ pte_val(pte) &= ~_PAGE_WRITE; return pte; }
336 static inline pte_t pte_mkdirty(pte_t pte)	{ pte_val(pte) |= _PAGE_DIRTY; return pte; }
337 static inline pte_t pte_mkyoung(pte_t pte)	{ pte_val(pte) |= _PAGE_ACCESSED; return pte; }
338 static inline pte_t pte_mkwrite(pte_t pte)	{ pte_val(pte) |= _PAGE_WRITE; return pte; }
339 static inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }
340 
341 /*
342  * Conversion functions: convert a page and protection to a page entry,
343  * and a page entry and page directory to the page they refer to.
344  */
345 #define __mk_pte(addr,pgprot) \
346 ({									\
347 	pte_t __pte;							\
348 									\
349 	pte_val(__pte) = ((((addr)>>PAGE_SHIFT)<<PFN_PTE_SHIFT) + pgprot_val(pgprot));	\
350 									\
351 	__pte;								\
352 })
353 
354 #define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
355 
356 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
357 {
358 	pte_t pte;
359 	pte_val(pte) = (pfn << PFN_PTE_SHIFT) | pgprot_val(pgprot);
360 	return pte;
361 }
362 
363 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
364 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
365 
366 /* Permanent address of a page.  On parisc we don't have highmem. */
367 
368 #define pte_pfn(x)		(pte_val(x) >> PFN_PTE_SHIFT)
369 
370 #define pte_page(pte)		(pfn_to_page(pte_pfn(pte)))
371 
372 #define pmd_page_vaddr(pmd)	((unsigned long) __va(pmd_address(pmd)))
373 
374 #define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd)))
375 #define pmd_page(pmd)	virt_to_page((void *)__pmd_page(pmd))
376 
377 #define pgd_index(address) ((address) >> PGDIR_SHIFT)
378 
379 /* to find an entry in a page-table-directory */
380 #define pgd_offset(mm, address) \
381 ((mm)->pgd + ((address) >> PGDIR_SHIFT))
382 
383 /* to find an entry in a kernel page-table-directory */
384 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
385 
386 /* Find an entry in the second-level page table.. */
387 
388 #if PT_NLEVELS == 3
389 #define pmd_offset(dir,address) \
390 ((pmd_t *) pgd_page_vaddr(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
391 #else
392 #define pmd_offset(dir,addr) ((pmd_t *) dir)
393 #endif
394 
395 /* Find an entry in the third-level page table.. */
396 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
397 #define pte_offset_kernel(pmd, address) \
398 	((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
399 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
400 #define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
401 #define pte_unmap(pte) do { } while (0)
402 #define pte_unmap_nested(pte) do { } while (0)
403 
404 #define pte_unmap(pte)			do { } while (0)
405 #define pte_unmap_nested(pte)		do { } while (0)
406 
407 extern void paging_init (void);
408 
409 /* Used for deferring calls to flush_dcache_page() */
410 
411 #define PG_dcache_dirty         PG_arch_1
412 
413 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
414 
415 /* Encode and de-code a swap entry */
416 
417 #define __swp_type(x)                     ((x).val & 0x1f)
418 #define __swp_offset(x)                   ( (((x).val >> 6) &  0x7) | \
419 					  (((x).val >> 8) & ~0x7) )
420 #define __swp_entry(type, offset)         ((swp_entry_t) { (type) | \
421 					    ((offset &  0x7) << 6) | \
422 					    ((offset & ~0x7) << 8) })
423 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
424 #define __swp_entry_to_pte(x)		((pte_t) { (x).val })
425 
426 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
427 {
428 #ifdef CONFIG_SMP
429 	if (!pte_young(*ptep))
430 		return 0;
431 	return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
432 #else
433 	pte_t pte = *ptep;
434 	if (!pte_young(pte))
435 		return 0;
436 	set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));
437 	return 1;
438 #endif
439 }
440 
441 extern spinlock_t pa_dbit_lock;
442 
443 struct mm_struct;
444 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
445 {
446 	pte_t old_pte;
447 	pte_t pte;
448 
449 	spin_lock(&pa_dbit_lock);
450 	pte = old_pte = *ptep;
451 	pte_val(pte) &= ~_PAGE_PRESENT;
452 	pte_val(pte) |= _PAGE_FLUSH;
453 	set_pte_at(mm,addr,ptep,pte);
454 	spin_unlock(&pa_dbit_lock);
455 
456 	return old_pte;
457 }
458 
459 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
460 {
461 #ifdef CONFIG_SMP
462 	unsigned long new, old;
463 
464 	do {
465 		old = pte_val(*ptep);
466 		new = pte_val(pte_wrprotect(__pte (old)));
467 	} while (cmpxchg((unsigned long *) ptep, old, new) != old);
468 #else
469 	pte_t old_pte = *ptep;
470 	set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
471 #endif
472 }
473 
474 #define pte_same(A,B)	(pte_val(A) == pte_val(B))
475 
476 #endif /* !__ASSEMBLY__ */
477 
478 
479 /* TLB page size encoding - see table 3-1 in parisc20.pdf */
480 #define _PAGE_SIZE_ENCODING_4K		0
481 #define _PAGE_SIZE_ENCODING_16K		1
482 #define _PAGE_SIZE_ENCODING_64K		2
483 #define _PAGE_SIZE_ENCODING_256K	3
484 #define _PAGE_SIZE_ENCODING_1M		4
485 #define _PAGE_SIZE_ENCODING_4M		5
486 #define _PAGE_SIZE_ENCODING_16M		6
487 #define _PAGE_SIZE_ENCODING_64M		7
488 
489 #if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
490 # define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4K
491 #elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
492 # define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_16K
493 #elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
494 # define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_64K
495 #endif
496 
497 
498 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
499 		remap_pfn_range(vma, vaddr, pfn, size, prot)
500 
501 #define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE)
502 
503 /* We provide our own get_unmapped_area to provide cache coherency */
504 
505 #define HAVE_ARCH_UNMAPPED_AREA
506 
507 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
508 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
509 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
510 #define __HAVE_ARCH_PTE_SAME
511 #include <asm-generic/pgtable.h>
512 
513 #endif /* _PARISC_PGTABLE_H */
514