1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2deae26bfSKyle McMartin #ifndef _PARISC_PGTABLE_H 3deae26bfSKyle McMartin #define _PARISC_PGTABLE_H 4deae26bfSKyle McMartin 5bbcb03a9SQian Cai #include <asm/page.h> 6deae26bfSKyle McMartin #include <asm-generic/4level-fixup.h> 7deae26bfSKyle McMartin 8deae26bfSKyle McMartin #include <asm/fixmap.h> 9deae26bfSKyle McMartin 10deae26bfSKyle McMartin #ifndef __ASSEMBLY__ 11deae26bfSKyle McMartin /* 12deae26bfSKyle McMartin * we simulate an x86-style page table for the linux mm code 13deae26bfSKyle McMartin */ 14deae26bfSKyle McMartin 15deae26bfSKyle McMartin #include <linux/bitops.h> 1611537421SJames Bottomley #include <linux/spinlock.h> 177139bc15SJohn David Anglin #include <linux/mm_types.h> 18deae26bfSKyle McMartin #include <asm/processor.h> 19deae26bfSKyle McMartin #include <asm/cache.h> 20deae26bfSKyle McMartin 21b37d1c18SMikulas Patocka static inline spinlock_t *pgd_spinlock(pgd_t *); 22bda079d3SJohn David Anglin 23deae26bfSKyle McMartin /* 24deae26bfSKyle McMartin * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel 25deae26bfSKyle McMartin * memory. For the return value to be meaningful, ADDR must be >= 26deae26bfSKyle McMartin * PAGE_OFFSET. This operation can be relatively expensive (e.g., 27deae26bfSKyle McMartin * require a hash-, or multi-level tree-lookup or something of that 28deae26bfSKyle McMartin * sort) but it guarantees to return TRUE only if accessing the page 29deae26bfSKyle McMartin * at that address does not cause an error. Note that there may be 30deae26bfSKyle McMartin * addresses for which kern_addr_valid() returns FALSE even though an 31deae26bfSKyle McMartin * access would not cause an error (e.g., this is typically true for 32deae26bfSKyle McMartin * memory mapped I/O regions. 33deae26bfSKyle McMartin * 34deae26bfSKyle McMartin * XXX Need to implement this for parisc. 35deae26bfSKyle McMartin */ 36deae26bfSKyle McMartin #define kern_addr_valid(addr) (1) 37deae26bfSKyle McMartin 38b37d1c18SMikulas Patocka /* This is for the serialization of PxTLB broadcasts. At least on the N class 39b37d1c18SMikulas Patocka * systems, only one PxTLB inter processor broadcast can be active at any one 40b37d1c18SMikulas Patocka * time on the Merced bus. 41b37d1c18SMikulas Patocka 42b37d1c18SMikulas Patocka * PTE updates are protected by locks in the PMD. 43b37d1c18SMikulas Patocka */ 44b37d1c18SMikulas Patocka extern spinlock_t pa_tlb_flush_lock; 45b37d1c18SMikulas Patocka extern spinlock_t pa_swapper_pg_lock; 46b37d1c18SMikulas Patocka #if defined(CONFIG_64BIT) && defined(CONFIG_SMP) 47b37d1c18SMikulas Patocka extern int pa_serialize_tlb_flushes; 48b37d1c18SMikulas Patocka #else 49b37d1c18SMikulas Patocka #define pa_serialize_tlb_flushes (0) 50b37d1c18SMikulas Patocka #endif 51b37d1c18SMikulas Patocka 52b37d1c18SMikulas Patocka #define purge_tlb_start(flags) do { \ 53b37d1c18SMikulas Patocka if (pa_serialize_tlb_flushes) \ 54b37d1c18SMikulas Patocka spin_lock_irqsave(&pa_tlb_flush_lock, flags); \ 55b37d1c18SMikulas Patocka else \ 56b37d1c18SMikulas Patocka local_irq_save(flags); \ 57b37d1c18SMikulas Patocka } while (0) 58b37d1c18SMikulas Patocka #define purge_tlb_end(flags) do { \ 59b37d1c18SMikulas Patocka if (pa_serialize_tlb_flushes) \ 60b37d1c18SMikulas Patocka spin_unlock_irqrestore(&pa_tlb_flush_lock, flags); \ 61b37d1c18SMikulas Patocka else \ 62b37d1c18SMikulas Patocka local_irq_restore(flags); \ 63b37d1c18SMikulas Patocka } while (0) 64b37d1c18SMikulas Patocka 65b37d1c18SMikulas Patocka /* Purge data and instruction TLB entries. The TLB purge instructions 66b37d1c18SMikulas Patocka * are slow on SMP machines since the purge must be broadcast to all CPUs. 6701ab6057SJohn David Anglin */ 6801ab6057SJohn David Anglin 6901ab6057SJohn David Anglin static inline void purge_tlb_entries(struct mm_struct *mm, unsigned long addr) 7001ab6057SJohn David Anglin { 71b37d1c18SMikulas Patocka unsigned long flags; 72b37d1c18SMikulas Patocka 73b37d1c18SMikulas Patocka purge_tlb_start(flags); 7401ab6057SJohn David Anglin mtsp(mm->context, 1); 7501ab6057SJohn David Anglin pdtlb(addr); 7601ab6057SJohn David Anglin pitlb(addr); 77b37d1c18SMikulas Patocka purge_tlb_end(flags); 7801ab6057SJohn David Anglin } 7901ab6057SJohn David Anglin 80deae26bfSKyle McMartin /* Certain architectures need to do special things when PTEs 81deae26bfSKyle McMartin * within a page table are directly modified. Thus, the following 82deae26bfSKyle McMartin * hook is made available. 83deae26bfSKyle McMartin */ 84deae26bfSKyle McMartin #define set_pte(pteptr, pteval) \ 85deae26bfSKyle McMartin do{ \ 86deae26bfSKyle McMartin *(pteptr) = (pteval); \ 87deae26bfSKyle McMartin } while(0) 887139bc15SJohn David Anglin 897139bc15SJohn David Anglin #define set_pte_at(mm, addr, ptep, pteval) \ 907139bc15SJohn David Anglin do { \ 9101ab6057SJohn David Anglin pte_t old_pte; \ 92bda079d3SJohn David Anglin unsigned long flags; \ 93b37d1c18SMikulas Patocka spin_lock_irqsave(pgd_spinlock((mm)->pgd), flags);\ 9401ab6057SJohn David Anglin old_pte = *ptep; \ 954dd5b673SJohn David Anglin set_pte(ptep, pteval); \ 967139bc15SJohn David Anglin purge_tlb_entries(mm, addr); \ 97b37d1c18SMikulas Patocka spin_unlock_irqrestore(pgd_spinlock((mm)->pgd), flags);\ 987139bc15SJohn David Anglin } while (0) 99deae26bfSKyle McMartin 100deae26bfSKyle McMartin #endif /* !__ASSEMBLY__ */ 101deae26bfSKyle McMartin 102deae26bfSKyle McMartin #define pte_ERROR(e) \ 103deae26bfSKyle McMartin printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 104deae26bfSKyle McMartin #define pmd_ERROR(e) \ 105deae26bfSKyle McMartin printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e)) 106deae26bfSKyle McMartin #define pgd_ERROR(e) \ 107deae26bfSKyle McMartin printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e)) 108deae26bfSKyle McMartin 109deae26bfSKyle McMartin /* This is the size of the initially mapped kernel memory */ 11065bf34f5SHelge Deller #if defined(CONFIG_64BIT) 11165bf34f5SHelge Deller #define KERNEL_INITIAL_ORDER 26 /* 1<<26 = 64MB */ 112332b42e4SHelge Deller #else 11365bf34f5SHelge Deller #define KERNEL_INITIAL_ORDER 25 /* 1<<25 = 32MB */ 114332b42e4SHelge Deller #endif 115deae26bfSKyle McMartin #define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER) 116deae26bfSKyle McMartin 117f24ffde4SKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS == 3 118deae26bfSKyle McMartin #define PGD_ORDER 1 /* Number of pages per pgd */ 119deae26bfSKyle McMartin #define PMD_ORDER 1 /* Number of pages per pmd */ 120b37d1c18SMikulas Patocka #define PGD_ALLOC_ORDER (2 + 1) /* first pgd contains pmd */ 121deae26bfSKyle McMartin #else 122deae26bfSKyle McMartin #define PGD_ORDER 1 /* Number of pages per pgd */ 123b37d1c18SMikulas Patocka #define PGD_ALLOC_ORDER (PGD_ORDER + 1) 124deae26bfSKyle McMartin #endif 125deae26bfSKyle McMartin 126deae26bfSKyle McMartin /* Definitions for 3rd level (we use PLD here for Page Lower directory 127deae26bfSKyle McMartin * because PTE_SHIFT is used lower down to mean shift that has to be 128deae26bfSKyle McMartin * done to get usable bits out of the PTE) */ 129deae26bfSKyle McMartin #define PLD_SHIFT PAGE_SHIFT 130deae26bfSKyle McMartin #define PLD_SIZE PAGE_SIZE 131deae26bfSKyle McMartin #define BITS_PER_PTE (PAGE_SHIFT - BITS_PER_PTE_ENTRY) 132deae26bfSKyle McMartin #define PTRS_PER_PTE (1UL << BITS_PER_PTE) 133deae26bfSKyle McMartin 134deae26bfSKyle McMartin /* Definitions for 2nd level */ 135deae26bfSKyle McMartin #define pgtable_cache_init() do { } while (0) 136deae26bfSKyle McMartin 137deae26bfSKyle McMartin #define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE) 138deae26bfSKyle McMartin #define PMD_SIZE (1UL << PMD_SHIFT) 139deae26bfSKyle McMartin #define PMD_MASK (~(PMD_SIZE-1)) 140f24ffde4SKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS == 3 141deae26bfSKyle McMartin #define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY) 142deae26bfSKyle McMartin #else 143a8874e7eSMartin Schwidefsky #define __PAGETABLE_PMD_FOLDED 1 144deae26bfSKyle McMartin #define BITS_PER_PMD 0 145deae26bfSKyle McMartin #endif 146deae26bfSKyle McMartin #define PTRS_PER_PMD (1UL << BITS_PER_PMD) 147deae26bfSKyle McMartin 148deae26bfSKyle McMartin /* Definitions for 1st level */ 149deae26bfSKyle McMartin #define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD) 15048d27cb2SHelge Deller #if (PGDIR_SHIFT + PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY) > BITS_PER_LONG 15148d27cb2SHelge Deller #define BITS_PER_PGD (BITS_PER_LONG - PGDIR_SHIFT) 15248d27cb2SHelge Deller #else 153deae26bfSKyle McMartin #define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY) 15448d27cb2SHelge Deller #endif 155deae26bfSKyle McMartin #define PGDIR_SIZE (1UL << PGDIR_SHIFT) 156deae26bfSKyle McMartin #define PGDIR_MASK (~(PGDIR_SIZE-1)) 157deae26bfSKyle McMartin #define PTRS_PER_PGD (1UL << BITS_PER_PGD) 158deae26bfSKyle McMartin #define USER_PTRS_PER_PGD PTRS_PER_PGD 159deae26bfSKyle McMartin 16048d27cb2SHelge Deller #ifdef CONFIG_64BIT 161deae26bfSKyle McMartin #define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD) 162deae26bfSKyle McMartin #define MAX_ADDRESS (1UL << MAX_ADDRBITS) 163deae26bfSKyle McMartin #define SPACEID_SHIFT (MAX_ADDRBITS - 32) 16448d27cb2SHelge Deller #else 16548d27cb2SHelge Deller #define MAX_ADDRBITS (BITS_PER_LONG) 16648d27cb2SHelge Deller #define MAX_ADDRESS (1UL << MAX_ADDRBITS) 16748d27cb2SHelge Deller #define SPACEID_SHIFT 0 16848d27cb2SHelge Deller #endif 169deae26bfSKyle McMartin 170deae26bfSKyle McMartin /* This calculates the number of initial pages we need for the initial 171deae26bfSKyle McMartin * page tables */ 172deae26bfSKyle McMartin #if (KERNEL_INITIAL_ORDER) >= (PMD_SHIFT) 173deae26bfSKyle McMartin # define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT)) 174deae26bfSKyle McMartin #else 175deae26bfSKyle McMartin # define PT_INITIAL (1) /* all initial PTEs fit into one page */ 176deae26bfSKyle McMartin #endif 177deae26bfSKyle McMartin 178deae26bfSKyle McMartin /* 179deae26bfSKyle McMartin * pgd entries used up by user/kernel: 180deae26bfSKyle McMartin */ 181deae26bfSKyle McMartin 182d016bf7eSKirill A. Shutemov #define FIRST_USER_ADDRESS 0UL 183deae26bfSKyle McMartin 184deae26bfSKyle McMartin /* NB: The tlb miss handlers make certain assumptions about the order */ 185deae26bfSKyle McMartin /* of the following bits, so be careful (One example, bits 25-31 */ 186deae26bfSKyle McMartin /* are moved together in one instruction). */ 187deae26bfSKyle McMartin 188deae26bfSKyle McMartin #define _PAGE_READ_BIT 31 /* (0x001) read access allowed */ 189deae26bfSKyle McMartin #define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */ 190deae26bfSKyle McMartin #define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */ 191deae26bfSKyle McMartin #define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */ 192deae26bfSKyle McMartin #define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */ 193deae26bfSKyle McMartin #define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */ 194deae26bfSKyle McMartin #define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */ 195deae26bfSKyle McMartin #define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */ 196deae26bfSKyle McMartin #define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */ 197deae26bfSKyle McMartin #define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */ 1981f25ad26SHelge Deller #define _PAGE_HPAGE_BIT 21 /* (0x400) Software: Huge Page */ 199deae26bfSKyle McMartin #define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */ 200deae26bfSKyle McMartin 201deae26bfSKyle McMartin /* N.B. The bits are defined in terms of a 32 bit word above, so the */ 202deae26bfSKyle McMartin /* following macro is ok for both 32 and 64 bit. */ 203deae26bfSKyle McMartin 204deae26bfSKyle McMartin #define xlate_pabit(x) (31 - x) 205deae26bfSKyle McMartin 206deae26bfSKyle McMartin /* this defines the shift to the usable bits in the PTE it is set so 207deae26bfSKyle McMartin * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set 208deae26bfSKyle McMartin * to zero */ 209deae26bfSKyle McMartin #define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT) 210deae26bfSKyle McMartin 211deae26bfSKyle McMartin /* PFN_PTE_SHIFT defines the shift of a PTE value to access the PFN field */ 212deae26bfSKyle McMartin #define PFN_PTE_SHIFT 12 213deae26bfSKyle McMartin 214deae26bfSKyle McMartin #define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT)) 215deae26bfSKyle McMartin #define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT)) 216deae26bfSKyle McMartin #define _PAGE_RW (_PAGE_READ | _PAGE_WRITE) 217deae26bfSKyle McMartin #define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT)) 218deae26bfSKyle McMartin #define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT)) 219deae26bfSKyle McMartin #define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT)) 220deae26bfSKyle McMartin #define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT)) 221deae26bfSKyle McMartin #define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT)) 222deae26bfSKyle McMartin #define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT)) 223deae26bfSKyle McMartin #define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT)) 224deae26bfSKyle McMartin #define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT)) 2251f25ad26SHelge Deller #define _PAGE_HUGE (1 << xlate_pabit(_PAGE_HPAGE_BIT)) 226deae26bfSKyle McMartin #define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT)) 227deae26bfSKyle McMartin 228deae26bfSKyle McMartin #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED) 229deae26bfSKyle McMartin #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 230d7dd2ff1SJames Bottomley #define _PAGE_KERNEL_RO (_PAGE_PRESENT | _PAGE_READ | _PAGE_DIRTY | _PAGE_ACCESSED) 231d7dd2ff1SJames Bottomley #define _PAGE_KERNEL_EXEC (_PAGE_KERNEL_RO | _PAGE_EXEC) 232d7dd2ff1SJames Bottomley #define _PAGE_KERNEL_RWX (_PAGE_KERNEL_EXEC | _PAGE_WRITE) 233d7dd2ff1SJames Bottomley #define _PAGE_KERNEL (_PAGE_KERNEL_RO | _PAGE_WRITE) 234deae26bfSKyle McMartin 235deae26bfSKyle McMartin /* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds 236deae26bfSKyle McMartin * are page-aligned, we don't care about the PAGE_OFFSET bits, except 237deae26bfSKyle McMartin * for a few meta-information bits, so we shift the address to be 238deae26bfSKyle McMartin * able to effectively address 40/42/44-bits of physical address space 239deae26bfSKyle McMartin * depending on 4k/16k/64k PAGE_SIZE */ 240deae26bfSKyle McMartin #define _PxD_PRESENT_BIT 31 241deae26bfSKyle McMartin #define _PxD_ATTACHED_BIT 30 242deae26bfSKyle McMartin #define _PxD_VALID_BIT 29 243deae26bfSKyle McMartin 244deae26bfSKyle McMartin #define PxD_FLAG_PRESENT (1 << xlate_pabit(_PxD_PRESENT_BIT)) 245deae26bfSKyle McMartin #define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT)) 246deae26bfSKyle McMartin #define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT)) 247deae26bfSKyle McMartin #define PxD_FLAG_MASK (0xf) 248deae26bfSKyle McMartin #define PxD_FLAG_SHIFT (4) 2491f25ad26SHelge Deller #define PxD_VALUE_SHIFT (PFN_PTE_SHIFT-PxD_FLAG_SHIFT) 250deae26bfSKyle McMartin 251deae26bfSKyle McMartin #ifndef __ASSEMBLY__ 252deae26bfSKyle McMartin 2534dd5b673SJohn David Anglin #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER) 2544dd5b673SJohn David Anglin #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE) 255deae26bfSKyle McMartin /* Others seem to make this executable, I don't know if that's correct 256deae26bfSKyle McMartin or not. The stack is mapped this way though so this is necessary 257deae26bfSKyle McMartin in the short term - dhd@linuxcare.com, 2000-08-08 */ 2584dd5b673SJohn David Anglin #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ) 2594dd5b673SJohn David Anglin #define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE) 2604dd5b673SJohn David Anglin #define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC) 261deae26bfSKyle McMartin #define PAGE_COPY PAGE_EXECREAD 2624dd5b673SJohn David Anglin #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC) 263deae26bfSKyle McMartin #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 264d7dd2ff1SJames Bottomley #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL_EXEC) 265d7dd2ff1SJames Bottomley #define PAGE_KERNEL_RWX __pgprot(_PAGE_KERNEL_RWX) 266d7dd2ff1SJames Bottomley #define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL_RO) 267deae26bfSKyle McMartin #define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) 2684dd5b673SJohn David Anglin #define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_GATEWAY| _PAGE_READ) 269deae26bfSKyle McMartin 270deae26bfSKyle McMartin 271deae26bfSKyle McMartin /* 272deae26bfSKyle McMartin * We could have an execute only page using "gateway - promote to priv 273deae26bfSKyle McMartin * level 3", but that is kind of silly. So, the way things are defined 274deae26bfSKyle McMartin * now, we must always have read permission for pages with execute 275deae26bfSKyle McMartin * permission. For the fun of it we'll go ahead and support write only 276deae26bfSKyle McMartin * pages. 277deae26bfSKyle McMartin */ 278deae26bfSKyle McMartin 279deae26bfSKyle McMartin /*xwr*/ 280deae26bfSKyle McMartin #define __P000 PAGE_NONE 281deae26bfSKyle McMartin #define __P001 PAGE_READONLY 282deae26bfSKyle McMartin #define __P010 __P000 /* copy on write */ 283deae26bfSKyle McMartin #define __P011 __P001 /* copy on write */ 284deae26bfSKyle McMartin #define __P100 PAGE_EXECREAD 285deae26bfSKyle McMartin #define __P101 PAGE_EXECREAD 286deae26bfSKyle McMartin #define __P110 __P100 /* copy on write */ 287deae26bfSKyle McMartin #define __P111 __P101 /* copy on write */ 288deae26bfSKyle McMartin 289deae26bfSKyle McMartin #define __S000 PAGE_NONE 290deae26bfSKyle McMartin #define __S001 PAGE_READONLY 291deae26bfSKyle McMartin #define __S010 PAGE_WRITEONLY 292deae26bfSKyle McMartin #define __S011 PAGE_SHARED 293deae26bfSKyle McMartin #define __S100 PAGE_EXECREAD 294deae26bfSKyle McMartin #define __S101 PAGE_EXECREAD 295deae26bfSKyle McMartin #define __S110 PAGE_RWX 296deae26bfSKyle McMartin #define __S111 PAGE_RWX 297deae26bfSKyle McMartin 298deae26bfSKyle McMartin 299deae26bfSKyle McMartin extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */ 300deae26bfSKyle McMartin 301deae26bfSKyle McMartin /* initial page tables for 0-8MB for kernel */ 302deae26bfSKyle McMartin 303deae26bfSKyle McMartin extern pte_t pg0[]; 304deae26bfSKyle McMartin 305deae26bfSKyle McMartin /* zero page used for uninitialized stuff */ 306deae26bfSKyle McMartin 307deae26bfSKyle McMartin extern unsigned long *empty_zero_page; 308deae26bfSKyle McMartin 309deae26bfSKyle McMartin /* 310deae26bfSKyle McMartin * ZERO_PAGE is a global shared page that is always zero: used 311deae26bfSKyle McMartin * for zero-mapped memory areas etc.. 312deae26bfSKyle McMartin */ 313deae26bfSKyle McMartin 314deae26bfSKyle McMartin #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 315deae26bfSKyle McMartin 3168b4ae334SJames Bottomley #define pte_none(x) (pte_val(x) == 0) 317deae26bfSKyle McMartin #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) 31801ab6057SJohn David Anglin #define pte_clear(mm, addr, xp) set_pte_at(mm, addr, xp, __pte(0)) 319deae26bfSKyle McMartin 320deae26bfSKyle McMartin #define pmd_flag(x) (pmd_val(x) & PxD_FLAG_MASK) 321deae26bfSKyle McMartin #define pmd_address(x) ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT) 322deae26bfSKyle McMartin #define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK) 323deae26bfSKyle McMartin #define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT) 324deae26bfSKyle McMartin 325f24ffde4SKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS == 3 326deae26bfSKyle McMartin /* The first entry of the permanent pmd is not there if it contains 327deae26bfSKyle McMartin * the gateway marker */ 328deae26bfSKyle McMartin #define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED) 329deae26bfSKyle McMartin #else 330deae26bfSKyle McMartin #define pmd_none(x) (!pmd_val(x)) 331deae26bfSKyle McMartin #endif 332deae26bfSKyle McMartin #define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID)) 333deae26bfSKyle McMartin #define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT) 334deae26bfSKyle McMartin static inline void pmd_clear(pmd_t *pmd) { 335f24ffde4SKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS == 3 336deae26bfSKyle McMartin if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED) 337deae26bfSKyle McMartin /* This is the entry pointing to the permanent pmd 338deae26bfSKyle McMartin * attached to the pgd; cannot clear it */ 339deae26bfSKyle McMartin __pmd_val_set(*pmd, PxD_FLAG_ATTACHED); 340deae26bfSKyle McMartin else 341deae26bfSKyle McMartin #endif 342deae26bfSKyle McMartin __pmd_val_set(*pmd, 0); 343deae26bfSKyle McMartin } 344deae26bfSKyle McMartin 345deae26bfSKyle McMartin 346deae26bfSKyle McMartin 347f24ffde4SKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS == 3 348deae26bfSKyle McMartin #define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_address(pgd))) 349deae26bfSKyle McMartin #define pgd_page(pgd) virt_to_page((void *)pgd_page_vaddr(pgd)) 350deae26bfSKyle McMartin 351deae26bfSKyle McMartin /* For 64 bit we have three level tables */ 352deae26bfSKyle McMartin 353deae26bfSKyle McMartin #define pgd_none(x) (!pgd_val(x)) 354deae26bfSKyle McMartin #define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID)) 355deae26bfSKyle McMartin #define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT) 356deae26bfSKyle McMartin static inline void pgd_clear(pgd_t *pgd) { 357f24ffde4SKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS == 3 358deae26bfSKyle McMartin if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED) 359deae26bfSKyle McMartin /* This is the permanent pmd attached to the pgd; cannot 360deae26bfSKyle McMartin * free it */ 361deae26bfSKyle McMartin return; 362deae26bfSKyle McMartin #endif 363deae26bfSKyle McMartin __pgd_val_set(*pgd, 0); 364deae26bfSKyle McMartin } 365deae26bfSKyle McMartin #else 366deae26bfSKyle McMartin /* 367deae26bfSKyle McMartin * The "pgd_xxx()" functions here are trivial for a folded two-level 368deae26bfSKyle McMartin * setup: the pgd is never bad, and a pmd always exists (as it's folded 369deae26bfSKyle McMartin * into the pgd entry) 370deae26bfSKyle McMartin */ 371deae26bfSKyle McMartin static inline int pgd_none(pgd_t pgd) { return 0; } 372deae26bfSKyle McMartin static inline int pgd_bad(pgd_t pgd) { return 0; } 373deae26bfSKyle McMartin static inline int pgd_present(pgd_t pgd) { return 1; } 374deae26bfSKyle McMartin static inline void pgd_clear(pgd_t * pgdp) { } 375deae26bfSKyle McMartin #endif 376deae26bfSKyle McMartin 377deae26bfSKyle McMartin /* 378deae26bfSKyle McMartin * The following only work if pte_present() is true. 379deae26bfSKyle McMartin * Undefined behaviour if not.. 380deae26bfSKyle McMartin */ 381deae26bfSKyle McMartin static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } 382deae26bfSKyle McMartin static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 383deae26bfSKyle McMartin static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } 384deae26bfSKyle McMartin static inline int pte_special(pte_t pte) { return 0; } 385deae26bfSKyle McMartin 386deae26bfSKyle McMartin static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; } 387deae26bfSKyle McMartin static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } 388deae26bfSKyle McMartin static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; } 389deae26bfSKyle McMartin static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; } 390deae26bfSKyle McMartin static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; } 391deae26bfSKyle McMartin static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; } 392deae26bfSKyle McMartin static inline pte_t pte_mkspecial(pte_t pte) { return pte; } 393deae26bfSKyle McMartin 394deae26bfSKyle McMartin /* 3951f25ad26SHelge Deller * Huge pte definitions. 3961f25ad26SHelge Deller */ 3971f25ad26SHelge Deller #ifdef CONFIG_HUGETLB_PAGE 3981f25ad26SHelge Deller #define pte_huge(pte) (pte_val(pte) & _PAGE_HUGE) 39978c0cbffSHelge Deller #define pte_mkhuge(pte) (__pte(pte_val(pte) | \ 40078c0cbffSHelge Deller (parisc_requires_coherency() ? 0 : _PAGE_HUGE))) 4011f25ad26SHelge Deller #else 4021f25ad26SHelge Deller #define pte_huge(pte) (0) 4031f25ad26SHelge Deller #define pte_mkhuge(pte) (pte) 4041f25ad26SHelge Deller #endif 4051f25ad26SHelge Deller 4061f25ad26SHelge Deller 4071f25ad26SHelge Deller /* 408deae26bfSKyle McMartin * Conversion functions: convert a page and protection to a page entry, 409deae26bfSKyle McMartin * and a page entry and page directory to the page they refer to. 410deae26bfSKyle McMartin */ 411deae26bfSKyle McMartin #define __mk_pte(addr,pgprot) \ 412deae26bfSKyle McMartin ({ \ 413deae26bfSKyle McMartin pte_t __pte; \ 414deae26bfSKyle McMartin \ 415deae26bfSKyle McMartin pte_val(__pte) = ((((addr)>>PAGE_SHIFT)<<PFN_PTE_SHIFT) + pgprot_val(pgprot)); \ 416deae26bfSKyle McMartin \ 417deae26bfSKyle McMartin __pte; \ 418deae26bfSKyle McMartin }) 419deae26bfSKyle McMartin 420deae26bfSKyle McMartin #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 421deae26bfSKyle McMartin 422deae26bfSKyle McMartin static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) 423deae26bfSKyle McMartin { 424deae26bfSKyle McMartin pte_t pte; 425deae26bfSKyle McMartin pte_val(pte) = (pfn << PFN_PTE_SHIFT) | pgprot_val(pgprot); 426deae26bfSKyle McMartin return pte; 427deae26bfSKyle McMartin } 428deae26bfSKyle McMartin 429deae26bfSKyle McMartin static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 430deae26bfSKyle McMartin { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; } 431deae26bfSKyle McMartin 432deae26bfSKyle McMartin /* Permanent address of a page. On parisc we don't have highmem. */ 433deae26bfSKyle McMartin 434deae26bfSKyle McMartin #define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT) 435deae26bfSKyle McMartin 436deae26bfSKyle McMartin #define pte_page(pte) (pfn_to_page(pte_pfn(pte))) 437deae26bfSKyle McMartin 438deae26bfSKyle McMartin #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_address(pmd))) 439deae26bfSKyle McMartin 440deae26bfSKyle McMartin #define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd))) 441deae26bfSKyle McMartin #define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd)) 442deae26bfSKyle McMartin 443deae26bfSKyle McMartin #define pgd_index(address) ((address) >> PGDIR_SHIFT) 444deae26bfSKyle McMartin 445deae26bfSKyle McMartin /* to find an entry in a page-table-directory */ 446deae26bfSKyle McMartin #define pgd_offset(mm, address) \ 447deae26bfSKyle McMartin ((mm)->pgd + ((address) >> PGDIR_SHIFT)) 448deae26bfSKyle McMartin 449deae26bfSKyle McMartin /* to find an entry in a kernel page-table-directory */ 450deae26bfSKyle McMartin #define pgd_offset_k(address) pgd_offset(&init_mm, address) 451deae26bfSKyle McMartin 452deae26bfSKyle McMartin /* Find an entry in the second-level page table.. */ 453deae26bfSKyle McMartin 454f24ffde4SKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS == 3 4551f25ad26SHelge Deller #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) 456deae26bfSKyle McMartin #define pmd_offset(dir,address) \ 4571f25ad26SHelge Deller ((pmd_t *) pgd_page_vaddr(*(dir)) + pmd_index(address)) 458deae26bfSKyle McMartin #else 459deae26bfSKyle McMartin #define pmd_offset(dir,addr) ((pmd_t *) dir) 460deae26bfSKyle McMartin #endif 461deae26bfSKyle McMartin 462deae26bfSKyle McMartin /* Find an entry in the third-level page table.. */ 463deae26bfSKyle McMartin #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1)) 464deae26bfSKyle McMartin #define pte_offset_kernel(pmd, address) \ 465deae26bfSKyle McMartin ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address)) 466deae26bfSKyle McMartin #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address) 467deae26bfSKyle McMartin #define pte_unmap(pte) do { } while (0) 468deae26bfSKyle McMartin 469deae26bfSKyle McMartin #define pte_unmap(pte) do { } while (0) 470deae26bfSKyle McMartin #define pte_unmap_nested(pte) do { } while (0) 471deae26bfSKyle McMartin 472deae26bfSKyle McMartin extern void paging_init (void); 473deae26bfSKyle McMartin 474deae26bfSKyle McMartin /* Used for deferring calls to flush_dcache_page() */ 475deae26bfSKyle McMartin 476deae26bfSKyle McMartin #define PG_dcache_dirty PG_arch_1 477deae26bfSKyle McMartin 4784b3073e1SRussell King extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *); 479deae26bfSKyle McMartin 480deae26bfSKyle McMartin /* Encode and de-code a swap entry */ 481deae26bfSKyle McMartin 482deae26bfSKyle McMartin #define __swp_type(x) ((x).val & 0x1f) 483deae26bfSKyle McMartin #define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \ 484deae26bfSKyle McMartin (((x).val >> 8) & ~0x7) ) 485deae26bfSKyle McMartin #define __swp_entry(type, offset) ((swp_entry_t) { (type) | \ 486deae26bfSKyle McMartin ((offset & 0x7) << 6) | \ 487deae26bfSKyle McMartin ((offset & ~0x7) << 8) }) 488deae26bfSKyle McMartin #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 489deae26bfSKyle McMartin #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 490deae26bfSKyle McMartin 491b37d1c18SMikulas Patocka 492b37d1c18SMikulas Patocka static inline spinlock_t *pgd_spinlock(pgd_t *pgd) 493b37d1c18SMikulas Patocka { 494b37d1c18SMikulas Patocka if (unlikely(pgd == swapper_pg_dir)) 495b37d1c18SMikulas Patocka return &pa_swapper_pg_lock; 496b37d1c18SMikulas Patocka return (spinlock_t *)((char *)pgd + (PAGE_SIZE << (PGD_ALLOC_ORDER - 1))); 497b37d1c18SMikulas Patocka } 498b37d1c18SMikulas Patocka 499b37d1c18SMikulas Patocka 500deae26bfSKyle McMartin static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) 501deae26bfSKyle McMartin { 502bda079d3SJohn David Anglin pte_t pte; 503bda079d3SJohn David Anglin unsigned long flags; 504bda079d3SJohn David Anglin 505deae26bfSKyle McMartin if (!pte_young(*ptep)) 506deae26bfSKyle McMartin return 0; 507deae26bfSKyle McMartin 508b37d1c18SMikulas Patocka spin_lock_irqsave(pgd_spinlock(vma->vm_mm->pgd), flags); 509bda079d3SJohn David Anglin pte = *ptep; 510bda079d3SJohn David Anglin if (!pte_young(pte)) { 511b37d1c18SMikulas Patocka spin_unlock_irqrestore(pgd_spinlock(vma->vm_mm->pgd), flags); 512bda079d3SJohn David Anglin return 0; 513bda079d3SJohn David Anglin } 514c78e710cSJohn David Anglin set_pte(ptep, pte_mkold(pte)); 5154dd5b673SJohn David Anglin purge_tlb_entries(vma->vm_mm, addr); 516b37d1c18SMikulas Patocka spin_unlock_irqrestore(pgd_spinlock(vma->vm_mm->pgd), flags); 517bda079d3SJohn David Anglin return 1; 518bda079d3SJohn David Anglin } 519deae26bfSKyle McMartin 520deae26bfSKyle McMartin struct mm_struct; 521deae26bfSKyle McMartin static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 522deae26bfSKyle McMartin { 523deae26bfSKyle McMartin pte_t old_pte; 524bda079d3SJohn David Anglin unsigned long flags; 525deae26bfSKyle McMartin 526b37d1c18SMikulas Patocka spin_lock_irqsave(pgd_spinlock(mm->pgd), flags); 5278b4ae334SJames Bottomley old_pte = *ptep; 5284dd5b673SJohn David Anglin set_pte(ptep, __pte(0)); 529bda079d3SJohn David Anglin purge_tlb_entries(mm, addr); 530b37d1c18SMikulas Patocka spin_unlock_irqrestore(pgd_spinlock(mm->pgd), flags); 531deae26bfSKyle McMartin 532deae26bfSKyle McMartin return old_pte; 533deae26bfSKyle McMartin } 534deae26bfSKyle McMartin 535deae26bfSKyle McMartin static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 536deae26bfSKyle McMartin { 537bda079d3SJohn David Anglin unsigned long flags; 538b37d1c18SMikulas Patocka spin_lock_irqsave(pgd_spinlock(mm->pgd), flags); 539c78e710cSJohn David Anglin set_pte(ptep, pte_wrprotect(*ptep)); 5404dd5b673SJohn David Anglin purge_tlb_entries(mm, addr); 541b37d1c18SMikulas Patocka spin_unlock_irqrestore(pgd_spinlock(mm->pgd), flags); 542deae26bfSKyle McMartin } 543deae26bfSKyle McMartin 544deae26bfSKyle McMartin #define pte_same(A,B) (pte_val(A) == pte_val(B)) 545deae26bfSKyle McMartin 546c9c2877dSHelge Deller struct seq_file; 547c9c2877dSHelge Deller extern void arch_report_meminfo(struct seq_file *m); 548c9c2877dSHelge Deller 549deae26bfSKyle McMartin #endif /* !__ASSEMBLY__ */ 550deae26bfSKyle McMartin 551deae26bfSKyle McMartin 552deae26bfSKyle McMartin /* TLB page size encoding - see table 3-1 in parisc20.pdf */ 553deae26bfSKyle McMartin #define _PAGE_SIZE_ENCODING_4K 0 554deae26bfSKyle McMartin #define _PAGE_SIZE_ENCODING_16K 1 555deae26bfSKyle McMartin #define _PAGE_SIZE_ENCODING_64K 2 556deae26bfSKyle McMartin #define _PAGE_SIZE_ENCODING_256K 3 557deae26bfSKyle McMartin #define _PAGE_SIZE_ENCODING_1M 4 558deae26bfSKyle McMartin #define _PAGE_SIZE_ENCODING_4M 5 559deae26bfSKyle McMartin #define _PAGE_SIZE_ENCODING_16M 6 560deae26bfSKyle McMartin #define _PAGE_SIZE_ENCODING_64M 7 561deae26bfSKyle McMartin 562deae26bfSKyle McMartin #if defined(CONFIG_PARISC_PAGE_SIZE_4KB) 563deae26bfSKyle McMartin # define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4K 564deae26bfSKyle McMartin #elif defined(CONFIG_PARISC_PAGE_SIZE_16KB) 565deae26bfSKyle McMartin # define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_16K 566deae26bfSKyle McMartin #elif defined(CONFIG_PARISC_PAGE_SIZE_64KB) 567deae26bfSKyle McMartin # define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_64K 568deae26bfSKyle McMartin #endif 569deae26bfSKyle McMartin 570deae26bfSKyle McMartin 571deae26bfSKyle McMartin #define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE) 572deae26bfSKyle McMartin 573deae26bfSKyle McMartin /* We provide our own get_unmapped_area to provide cache coherency */ 574deae26bfSKyle McMartin 575deae26bfSKyle McMartin #define HAVE_ARCH_UNMAPPED_AREA 5769dabf60dSHelge Deller #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 577deae26bfSKyle McMartin 578deae26bfSKyle McMartin #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 579deae26bfSKyle McMartin #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 580deae26bfSKyle McMartin #define __HAVE_ARCH_PTEP_SET_WRPROTECT 581deae26bfSKyle McMartin #define __HAVE_ARCH_PTE_SAME 582deae26bfSKyle McMartin #include <asm-generic/pgtable.h> 583deae26bfSKyle McMartin 584deae26bfSKyle McMartin #endif /* _PARISC_PGTABLE_H */ 585