xref: /openbmc/linux/arch/parisc/include/asm/pdc.h (revision 57ee11ea)
1 #ifndef _PARISC_PDC_H
2 #define _PARISC_PDC_H
3 
4 #include <uapi/asm/pdc.h>
5 
6 #if !defined(__ASSEMBLY__)
7 
8 extern int pdc_type;
9 extern unsigned long parisc_cell_num; /* cell number the CPU runs on (PAT) */
10 extern unsigned long parisc_cell_loc; /* cell location of CPU (PAT)	   */
11 
12 /* Values for pdc_type */
13 #define PDC_TYPE_ILLEGAL	-1
14 #define PDC_TYPE_PAT		 0 /* 64-bit PAT-PDC */
15 #define PDC_TYPE_SYSTEM_MAP	 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
16 #define PDC_TYPE_SNAKE		 2 /* Doesn't support SYSTEM_MAP */
17 
18 struct pdc_chassis_info {       /* for PDC_CHASSIS_INFO */
19 	unsigned long actcnt;   /* actual number of bytes returned */
20 	unsigned long maxcnt;   /* maximum number of bytes that could be returned */
21 };
22 
23 struct pdc_coproc_cfg {         /* for PDC_COPROC_CFG */
24         unsigned long ccr_functional;
25         unsigned long ccr_present;
26         unsigned long revision;
27         unsigned long model;
28 };
29 
30 struct pdc_model {		/* for PDC_MODEL */
31 	unsigned long hversion;
32 	unsigned long sversion;
33 	unsigned long hw_id;
34 	unsigned long boot_id;
35 	unsigned long sw_id;
36 	unsigned long sw_cap;
37 	unsigned long arch_rev;
38 	unsigned long pot_key;
39 	unsigned long curr_key;
40 };
41 
42 struct pdc_cache_cf {		/* for PDC_CACHE  (I/D-caches) */
43     unsigned long
44 #ifdef CONFIG_64BIT
45 		cc_padW:32,
46 #endif
47 		cc_alias: 4,	/* alias boundaries for virtual addresses   */
48 		cc_block: 4,	/* to determine most efficient stride */
49 		cc_line	: 3,	/* maximum amount written back as a result of store (multiple of 16 bytes) */
50 		cc_shift: 2,	/* how much to shift cc_block left */
51 		cc_wt	: 1,	/* 0 = WT-Dcache, 1 = WB-Dcache */
52 		cc_sh	: 2,	/* 0 = separate I/D-cache, else shared I/D-cache */
53 		cc_cst  : 3,	/* 0 = incoherent D-cache, 1=coherent D-cache */
54 		cc_pad1 : 10,	/* reserved */
55 		cc_hv   : 3;	/* hversion dependent */
56 };
57 
58 struct pdc_tlb_cf {		/* for PDC_CACHE (I/D-TLB's) */
59     unsigned long tc_pad0:12,	/* reserved */
60 #ifdef CONFIG_64BIT
61 		tc_padW:32,
62 #endif
63 		tc_sh	: 2,	/* 0 = separate I/D-TLB, else shared I/D-TLB */
64 		tc_hv   : 1,	/* HV */
65 		tc_page : 1,	/* 0 = 2K page-size-machine, 1 = 4k page size */
66 		tc_cst  : 3,	/* 0 = incoherent operations, else coherent operations */
67 		tc_aid  : 5,	/* ITLB: width of access ids of processor (encoded!) */
68 		tc_sr   : 8;	/* ITLB: width of space-registers (encoded) */
69 };
70 
71 struct pdc_cache_info {		/* main-PDC_CACHE-structure (caches & TLB's) */
72 	/* I-cache */
73 	unsigned long	ic_size;	/* size in bytes */
74 	struct pdc_cache_cf ic_conf;	/* configuration */
75 	unsigned long	ic_base;	/* base-addr */
76 	unsigned long	ic_stride;
77 	unsigned long	ic_count;
78 	unsigned long	ic_loop;
79 	/* D-cache */
80 	unsigned long	dc_size;	/* size in bytes */
81 	struct pdc_cache_cf dc_conf;	/* configuration */
82 	unsigned long	dc_base;	/* base-addr */
83 	unsigned long	dc_stride;
84 	unsigned long	dc_count;
85 	unsigned long	dc_loop;
86 	/* Instruction-TLB */
87 	unsigned long	it_size;	/* number of entries in I-TLB */
88 	struct pdc_tlb_cf it_conf;	/* I-TLB-configuration */
89 	unsigned long	it_sp_base;
90 	unsigned long	it_sp_stride;
91 	unsigned long	it_sp_count;
92 	unsigned long	it_off_base;
93 	unsigned long	it_off_stride;
94 	unsigned long	it_off_count;
95 	unsigned long	it_loop;
96 	/* data-TLB */
97 	unsigned long	dt_size;	/* number of entries in D-TLB */
98 	struct pdc_tlb_cf dt_conf;	/* D-TLB-configuration */
99 	unsigned long	dt_sp_base;
100 	unsigned long	dt_sp_stride;
101 	unsigned long	dt_sp_count;
102 	unsigned long	dt_off_base;
103 	unsigned long	dt_off_stride;
104 	unsigned long	dt_off_count;
105 	unsigned long	dt_loop;
106 };
107 
108 #if 0
109 /* If you start using the next struct, you'll have to adjust it to
110  * work with 64-bit firmware I think -PB
111  */
112 struct pdc_iodc {     /* PDC_IODC */
113 	unsigned char   hversion_model;
114 	unsigned char 	hversion;
115 	unsigned char 	spa;
116 	unsigned char 	type;
117 	unsigned int	sversion_rev:4;
118 	unsigned int	sversion_model:19;
119 	unsigned int	sversion_opt:8;
120 	unsigned char	rev;
121 	unsigned char	dep;
122 	unsigned char	features;
123 	unsigned char	pad1;
124 	unsigned int	checksum:16;
125 	unsigned int	length:16;
126 	unsigned int    pad[15];
127 } __attribute__((aligned(8))) ;
128 #endif
129 
130 #ifndef CONFIG_PA20
131 /* no BLTBs in pa2.0 processors */
132 struct pdc_btlb_info_range {
133 	__u8 res00;
134 	__u8 num_i;
135 	__u8 num_d;
136 	__u8 num_comb;
137 };
138 
139 struct pdc_btlb_info {	/* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
140 	unsigned int min_size;	/* minimum size of BTLB in pages */
141 	unsigned int max_size;	/* maximum size of BTLB in pages */
142 	struct pdc_btlb_info_range fixed_range_info;
143 	struct pdc_btlb_info_range variable_range_info;
144 };
145 
146 #endif /* !CONFIG_PA20 */
147 
148 struct pdc_mem_retinfo { /* PDC_MEM/PDC_MEM_MEMINFO (return info) */
149 	unsigned long pdt_size;
150 	unsigned long pdt_entries;
151 	unsigned long pdt_status;
152 	unsigned long first_dbe_loc;
153 	unsigned long good_mem;
154 };
155 
156 struct pdc_mem_read_pdt { /* PDC_MEM/PDC_MEM_READ_PDT (return info) */
157 	unsigned long pdt_entries;
158 };
159 
160 #ifdef CONFIG_64BIT
161 struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
162 	unsigned long entries_returned;
163 	unsigned long entries_total;
164 };
165 
166 struct pdc_memory_table {       /* PDC_MEM/PDC_MEM_TABLE (arguments) */
167 	unsigned long paddr;
168 	unsigned int  pages;
169 	unsigned int  reserved;
170 };
171 #endif /* CONFIG_64BIT */
172 
173 struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
174 	unsigned long mod_addr;
175 	unsigned long mod_pgs;
176 	unsigned long add_addrs;
177 };
178 
179 struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
180 	unsigned long mod_addr;
181 	unsigned long mod_pgs;
182 };
183 
184 struct pdc_initiator { /* PDC_INITIATOR */
185 	int host_id;
186 	int factor;
187 	int width;
188 	int mode;
189 };
190 
191 struct hardware_path {
192 	char  flags;	/* see bit definitions below */
193 	char  bc[6];	/* Bus Converter routing info to a specific */
194 			/* I/O adaptor (< 0 means none, > 63 resvd) */
195 	char  mod;	/* fixed field of specified module */
196 };
197 
198 /*
199  * Device path specifications used by PDC.
200  */
201 struct pdc_module_path {
202 	struct hardware_path path;
203 	unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
204 };
205 
206 #ifndef CONFIG_PA20
207 /* Only used on some pre-PA2.0 boxes */
208 struct pdc_memory_map {		/* PDC_MEMORY_MAP */
209 	unsigned long hpa;	/* mod's register set address */
210 	unsigned long more_pgs;	/* number of additional I/O pgs */
211 };
212 #endif
213 
214 struct pdc_tod {
215 	unsigned long tod_sec;
216 	unsigned long tod_usec;
217 };
218 
219 /* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
220 
221 struct pdc_hpmc_pim_11 { /* PDC_PIM */
222 	__u32 gr[32];
223 	__u32 cr[32];
224 	__u32 sr[8];
225 	__u32 iasq_back;
226 	__u32 iaoq_back;
227 	__u32 check_type;
228 	__u32 cpu_state;
229 	__u32 rsvd1;
230 	__u32 cache_check;
231 	__u32 tlb_check;
232 	__u32 bus_check;
233 	__u32 assists_check;
234 	__u32 rsvd2;
235 	__u32 assist_state;
236 	__u32 responder_addr;
237 	__u32 requestor_addr;
238 	__u32 path_info;
239 	__u64 fr[32];
240 };
241 
242 /*
243  * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
244  *
245  * Note that PDC_PIM doesn't care whether or not wide mode was enabled
246  * so the results are different on  PA1.1 vs. PA2.0 when in narrow mode.
247  *
248  * Note also that there are unarchitected results available, which
249  * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
250  * the firmware is probably the best way of printing hversion dependent
251  * data.
252  */
253 
254 struct pdc_hpmc_pim_20 { /* PDC_PIM */
255 	__u64 gr[32];
256 	__u64 cr[32];
257 	__u64 sr[8];
258 	__u64 iasq_back;
259 	__u64 iaoq_back;
260 	__u32 check_type;
261 	__u32 cpu_state;
262 	__u32 cache_check;
263 	__u32 tlb_check;
264 	__u32 bus_check;
265 	__u32 assists_check;
266 	__u32 assist_state;
267 	__u32 path_info;
268 	__u64 responder_addr;
269 	__u64 requestor_addr;
270 	__u64 fr[32];
271 };
272 
273 void pdc_console_init(void);	/* in pdc_console.c */
274 void pdc_console_restart(void);
275 
276 void setup_pdc(void);		/* in inventory.c */
277 
278 /* wrapper-functions from pdc.c */
279 
280 int pdc_add_valid(unsigned long address);
281 int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
282 int pdc_chassis_disp(unsigned long disp);
283 int pdc_chassis_warn(unsigned long *warn);
284 int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
285 int pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info);
286 int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
287 		  void *iodc_data, unsigned int iodc_data_size);
288 int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
289 			     struct pdc_module_path *mod_path, long mod_index);
290 int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
291 			      long mod_index, long addr_index);
292 int pdc_model_info(struct pdc_model *model);
293 int pdc_model_sysmodel(char *name);
294 int pdc_model_cpuid(unsigned long *cpu_id);
295 int pdc_model_versions(unsigned long *versions, int id);
296 int pdc_model_capabilities(unsigned long *capabilities);
297 int pdc_cache_info(struct pdc_cache_info *cache);
298 int pdc_spaceid_bits(unsigned long *space_bits);
299 #ifndef CONFIG_PA20
300 int pdc_btlb_info(struct pdc_btlb_info *btlb);
301 int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
302 #endif /* !CONFIG_PA20 */
303 int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
304 
305 int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
306 int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
307 int pdc_stable_get_size(unsigned long *size);
308 int pdc_stable_verify_contents(void);
309 int pdc_stable_initialize(void);
310 
311 int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
312 int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
313 
314 int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
315 int pdc_tod_read(struct pdc_tod *tod);
316 int pdc_tod_set(unsigned long sec, unsigned long usec);
317 
318 void pdc_pdt_init(void);	/* in pdt.c */
319 int pdc_mem_pdt_info(struct pdc_mem_retinfo *rinfo);
320 int pdc_mem_pdt_read_entries(struct pdc_mem_read_pdt *rpdt_read,
321 		unsigned long *pdt_entries_ptr);
322 #ifdef CONFIG_64BIT
323 int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
324 		struct pdc_memory_table *tbl, unsigned long entries);
325 #endif
326 
327 void set_firmware_width(void);
328 void set_firmware_width_unlocked(void);
329 int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
330 int pdc_do_reset(void);
331 int pdc_soft_power_info(unsigned long *power_reg);
332 int pdc_soft_power_button(int sw_control);
333 void pdc_io_reset(void);
334 void pdc_io_reset_devices(void);
335 int pdc_iodc_getc(void);
336 int pdc_iodc_print(const unsigned char *str, unsigned count);
337 
338 void pdc_emergency_unlock(void);
339 int pdc_sti_call(unsigned long func, unsigned long flags,
340                  unsigned long inptr, unsigned long outputr,
341                  unsigned long glob_cfg);
342 
343 static inline char * os_id_to_string(u16 os_id) {
344 	switch(os_id) {
345 	case OS_ID_NONE:	return "No OS";
346 	case OS_ID_HPUX:	return "HP-UX";
347 	case OS_ID_MPEXL:	return "MPE-iX";
348 	case OS_ID_OSF:		return "OSF";
349 	case OS_ID_HPRT:	return "HP-RT";
350 	case OS_ID_NOVEL:	return "Novell Netware";
351 	case OS_ID_LINUX:	return "Linux";
352 	default:	return "Unknown";
353 	}
354 }
355 
356 #endif /* !defined(__ASSEMBLY__) */
357 #endif /* _PARISC_PDC_H */
358