1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __PARISC_LDCW_H 3 #define __PARISC_LDCW_H 4 5 #ifndef CONFIG_PA20 6 /* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data, 7 and GCC only guarantees 8-byte alignment for stack locals, we can't 8 be assured of 16-byte alignment for atomic lock data even if we 9 specify "__attribute ((aligned(16)))" in the type declaration. So, 10 we use a struct containing an array of four ints for the atomic lock 11 type and dynamically select the 16-byte aligned int from the array 12 for the semaphore. */ 13 14 #define __PA_LDCW_ALIGNMENT 16 15 #define __PA_LDCW_ALIGN_ORDER 4 16 #define __ldcw_align(a) ({ \ 17 unsigned long __ret = (unsigned long) &(a)->lock[0]; \ 18 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \ 19 & ~(__PA_LDCW_ALIGNMENT - 1); \ 20 (volatile unsigned int *) __ret; \ 21 }) 22 #define __LDCW "ldcw" 23 24 #else /*CONFIG_PA20*/ 25 /* From: "Jim Hull" <jim.hull of hp.com> 26 I've attached a summary of the change, but basically, for PA 2.0, as 27 long as the ",CO" (coherent operation) completer is specified, then the 28 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead 29 they only require "natural" alignment (4-byte for ldcw, 8-byte for 30 ldcd). */ 31 32 #define __PA_LDCW_ALIGNMENT 4 33 #define __PA_LDCW_ALIGN_ORDER 2 34 #define __ldcw_align(a) (&(a)->slock) 35 #define __LDCW "ldcw,co" 36 37 #endif /*!CONFIG_PA20*/ 38 39 /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. 40 We don't explicitly expose that "*a" may be written as reload 41 fails to find a register in class R1_REGS when "a" needs to be 42 reloaded when generating 64-bit PIC code. Instead, we clobber 43 memory to indicate to the compiler that the assembly code reads 44 or writes to items other than those listed in the input and output 45 operands. This may pessimize the code somewhat but __ldcw is 46 usually used within code blocks surrounded by memory barriers. */ 47 #define __ldcw(a) ({ \ 48 unsigned __ret; \ 49 __asm__ __volatile__(__LDCW " 0(%1),%0" \ 50 : "=r" (__ret) : "r" (a) : "memory"); \ 51 __ret; \ 52 }) 53 54 #ifdef CONFIG_SMP 55 # define __lock_aligned __attribute__((__section__(".data..lock_aligned"))) 56 #endif 57 58 #endif /* __PARISC_LDCW_H */ 59