xref: /openbmc/linux/arch/parisc/include/asm/io.h (revision 7cc39531)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_IO_H
3 #define _ASM_IO_H
4 
5 #include <linux/types.h>
6 #include <linux/pgtable.h>
7 
8 #define virt_to_phys(a) ((unsigned long)__pa(a))
9 #define phys_to_virt(a) __va(a)
10 
11 static inline unsigned long isa_bus_to_virt(unsigned long addr) {
12 	BUG();
13 	return 0;
14 }
15 
16 static inline unsigned long isa_virt_to_bus(void *addr) {
17 	BUG();
18 	return 0;
19 }
20 
21 /*
22  * Memory mapped I/O
23  *
24  * readX()/writeX() do byteswapping and take an ioremapped address
25  * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
26  * gsc_*() don't byteswap and operate on physical addresses;
27  *   eg dev->hpa or 0xfee00000.
28  */
29 
30 static inline unsigned char gsc_readb(unsigned long addr)
31 {
32 	long flags;
33 	unsigned char ret;
34 
35 	__asm__ __volatile__(
36 	"	rsm	%3,%0\n"
37 	"	ldbx	0(%2),%1\n"
38 	"	mtsm	%0\n"
39 	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
40 
41 	return ret;
42 }
43 
44 static inline unsigned short gsc_readw(unsigned long addr)
45 {
46 	long flags;
47 	unsigned short ret;
48 
49 	__asm__ __volatile__(
50 	"	rsm	%3,%0\n"
51 	"	ldhx	0(%2),%1\n"
52 	"	mtsm	%0\n"
53 	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
54 
55 	return ret;
56 }
57 
58 static inline unsigned int gsc_readl(unsigned long addr)
59 {
60 	u32 ret;
61 
62 	__asm__ __volatile__(
63 	"	ldwax	0(%1),%0\n"
64 	: "=r" (ret) : "r" (addr) );
65 
66 	return ret;
67 }
68 
69 static inline unsigned long long gsc_readq(unsigned long addr)
70 {
71 	unsigned long long ret;
72 
73 #ifdef CONFIG_64BIT
74 	__asm__ __volatile__(
75 	"	ldda	0(%1),%0\n"
76 	:  "=r" (ret) : "r" (addr) );
77 #else
78 	/* two reads may have side effects.. */
79 	ret = ((u64) gsc_readl(addr)) << 32;
80 	ret |= gsc_readl(addr+4);
81 #endif
82 	return ret;
83 }
84 
85 static inline void gsc_writeb(unsigned char val, unsigned long addr)
86 {
87 	long flags;
88 	__asm__ __volatile__(
89 	"	rsm	%3,%0\n"
90 	"	stbs	%1,0(%2)\n"
91 	"	mtsm	%0\n"
92 	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
93 }
94 
95 static inline void gsc_writew(unsigned short val, unsigned long addr)
96 {
97 	long flags;
98 	__asm__ __volatile__(
99 	"	rsm	%3,%0\n"
100 	"	sths	%1,0(%2)\n"
101 	"	mtsm	%0\n"
102 	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
103 }
104 
105 static inline void gsc_writel(unsigned int val, unsigned long addr)
106 {
107 	__asm__ __volatile__(
108 	"	stwas	%0,0(%1)\n"
109 	: :  "r" (val), "r" (addr) );
110 }
111 
112 static inline void gsc_writeq(unsigned long long val, unsigned long addr)
113 {
114 #ifdef CONFIG_64BIT
115 	__asm__ __volatile__(
116 	"	stda	%0,0(%1)\n"
117 	: :  "r" (val), "r" (addr) );
118 #else
119 	/* two writes may have side effects.. */
120 	gsc_writel(val >> 32, addr);
121 	gsc_writel(val, addr+4);
122 #endif
123 }
124 
125 /*
126  * The standard PCI ioremap interfaces
127  */
128 void __iomem *ioremap(unsigned long offset, unsigned long size);
129 #define ioremap_wc			ioremap
130 #define ioremap_uc			ioremap
131 
132 extern void iounmap(const volatile void __iomem *addr);
133 
134 static inline unsigned char __raw_readb(const volatile void __iomem *addr)
135 {
136 	return (*(volatile unsigned char __force *) (addr));
137 }
138 static inline unsigned short __raw_readw(const volatile void __iomem *addr)
139 {
140 	return *(volatile unsigned short __force *) addr;
141 }
142 static inline unsigned int __raw_readl(const volatile void __iomem *addr)
143 {
144 	return *(volatile unsigned int __force *) addr;
145 }
146 static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
147 {
148 	return *(volatile unsigned long long __force *) addr;
149 }
150 
151 static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
152 {
153 	*(volatile unsigned char __force *) addr = b;
154 }
155 static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
156 {
157 	*(volatile unsigned short __force *) addr = b;
158 }
159 static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
160 {
161 	*(volatile unsigned int __force *) addr = b;
162 }
163 static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
164 {
165 	*(volatile unsigned long long __force *) addr = b;
166 }
167 
168 static inline unsigned char readb(const volatile void __iomem *addr)
169 {
170 	return __raw_readb(addr);
171 }
172 static inline unsigned short readw(const volatile void __iomem *addr)
173 {
174 	return le16_to_cpu((__le16 __force) __raw_readw(addr));
175 }
176 static inline unsigned int readl(const volatile void __iomem *addr)
177 {
178 	return le32_to_cpu((__le32 __force) __raw_readl(addr));
179 }
180 static inline unsigned long long readq(const volatile void __iomem *addr)
181 {
182 	return le64_to_cpu((__le64 __force) __raw_readq(addr));
183 }
184 
185 static inline void writeb(unsigned char b, volatile void __iomem *addr)
186 {
187 	__raw_writeb(b, addr);
188 }
189 static inline void writew(unsigned short w, volatile void __iomem *addr)
190 {
191 	__raw_writew((__u16 __force) cpu_to_le16(w), addr);
192 }
193 static inline void writel(unsigned int l, volatile void __iomem *addr)
194 {
195 	__raw_writel((__u32 __force) cpu_to_le32(l), addr);
196 }
197 static inline void writeq(unsigned long long q, volatile void __iomem *addr)
198 {
199 	__raw_writeq((__u64 __force) cpu_to_le64(q), addr);
200 }
201 
202 #define	readb	readb
203 #define	readw	readw
204 #define	readl	readl
205 #define readq	readq
206 #define writeb	writeb
207 #define writew	writew
208 #define writel	writel
209 #define writeq	writeq
210 
211 #define readb_relaxed(addr)	readb(addr)
212 #define readw_relaxed(addr)	readw(addr)
213 #define readl_relaxed(addr)	readl(addr)
214 #define readq_relaxed(addr)	readq(addr)
215 #define writeb_relaxed(b, addr)	writeb(b, addr)
216 #define writew_relaxed(w, addr)	writew(w, addr)
217 #define writel_relaxed(l, addr)	writel(l, addr)
218 #define writeq_relaxed(q, addr)	writeq(q, addr)
219 
220 void memset_io(volatile void __iomem *addr, unsigned char val, int count);
221 void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
222 void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
223 
224 /* Port-space IO */
225 
226 #define inb_p inb
227 #define inw_p inw
228 #define inl_p inl
229 #define outb_p outb
230 #define outw_p outw
231 #define outl_p outl
232 
233 extern unsigned char eisa_in8(unsigned short port);
234 extern unsigned short eisa_in16(unsigned short port);
235 extern unsigned int eisa_in32(unsigned short port);
236 extern void eisa_out8(unsigned char data, unsigned short port);
237 extern void eisa_out16(unsigned short data, unsigned short port);
238 extern void eisa_out32(unsigned int data, unsigned short port);
239 
240 #if defined(CONFIG_PCI)
241 extern unsigned char inb(int addr);
242 extern unsigned short inw(int addr);
243 extern unsigned int inl(int addr);
244 
245 extern void outb(unsigned char b, int addr);
246 extern void outw(unsigned short b, int addr);
247 extern void outl(unsigned int b, int addr);
248 #elif defined(CONFIG_EISA)
249 #define inb eisa_in8
250 #define inw eisa_in16
251 #define inl eisa_in32
252 #define outb eisa_out8
253 #define outw eisa_out16
254 #define outl eisa_out32
255 #else
256 static inline char inb(unsigned long addr)
257 {
258 	BUG();
259 	return -1;
260 }
261 
262 static inline short inw(unsigned long addr)
263 {
264 	BUG();
265 	return -1;
266 }
267 
268 static inline int inl(unsigned long addr)
269 {
270 	BUG();
271 	return -1;
272 }
273 
274 #define outb(x, y)	({(void)(x); (void)(y); BUG(); 0;})
275 #define outw(x, y)	({(void)(x); (void)(y); BUG(); 0;})
276 #define outl(x, y)	({(void)(x); (void)(y); BUG(); 0;})
277 #endif
278 
279 /*
280  * String versions of in/out ops:
281  */
282 extern void insb (unsigned long port, void *dst, unsigned long count);
283 extern void insw (unsigned long port, void *dst, unsigned long count);
284 extern void insl (unsigned long port, void *dst, unsigned long count);
285 extern void outsb (unsigned long port, const void *src, unsigned long count);
286 extern void outsw (unsigned long port, const void *src, unsigned long count);
287 extern void outsl (unsigned long port, const void *src, unsigned long count);
288 
289 
290 /* IO Port space is :      BBiiii   where BB is HBA number. */
291 #define IO_SPACE_LIMIT 0x00ffffff
292 
293 /* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
294  * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
295  * mode (essentially just sign extending.  This macro takes in a 32
296  * bit I/O address (still with the leading f) and outputs the correct
297  * value for either 32 or 64 bit mode */
298 #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
299 
300 #define ioread64 ioread64
301 #define ioread64be ioread64be
302 #define iowrite64 iowrite64
303 #define iowrite64be iowrite64be
304 extern u64 ioread64(const void __iomem *addr);
305 extern u64 ioread64be(const void __iomem *addr);
306 extern void iowrite64(u64 val, void __iomem *addr);
307 extern void iowrite64be(u64 val, void __iomem *addr);
308 
309 #include <asm-generic/iomap.h>
310 
311 /*
312  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
313  * access
314  */
315 #define xlate_dev_mem_ptr(p)	__va(p)
316 
317 extern int devmem_is_allowed(unsigned long pfn);
318 
319 #endif
320