1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_IO_H 3 #define _ASM_IO_H 4 5 #include <linux/types.h> 6 #include <asm/pgtable.h> 7 8 #define virt_to_phys(a) ((unsigned long)__pa(a)) 9 #define phys_to_virt(a) __va(a) 10 #define virt_to_bus virt_to_phys 11 #define bus_to_virt phys_to_virt 12 13 static inline unsigned long isa_bus_to_virt(unsigned long addr) { 14 BUG(); 15 return 0; 16 } 17 18 static inline unsigned long isa_virt_to_bus(void *addr) { 19 BUG(); 20 return 0; 21 } 22 23 /* 24 * Memory mapped I/O 25 * 26 * readX()/writeX() do byteswapping and take an ioremapped address 27 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address. 28 * gsc_*() don't byteswap and operate on physical addresses; 29 * eg dev->hpa or 0xfee00000. 30 */ 31 32 static inline unsigned char gsc_readb(unsigned long addr) 33 { 34 long flags; 35 unsigned char ret; 36 37 __asm__ __volatile__( 38 " rsm %3,%0\n" 39 " ldbx 0(%2),%1\n" 40 " mtsm %0\n" 41 : "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) ); 42 43 return ret; 44 } 45 46 static inline unsigned short gsc_readw(unsigned long addr) 47 { 48 long flags; 49 unsigned short ret; 50 51 __asm__ __volatile__( 52 " rsm %3,%0\n" 53 " ldhx 0(%2),%1\n" 54 " mtsm %0\n" 55 : "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) ); 56 57 return ret; 58 } 59 60 static inline unsigned int gsc_readl(unsigned long addr) 61 { 62 u32 ret; 63 64 __asm__ __volatile__( 65 " ldwax 0(%1),%0\n" 66 : "=r" (ret) : "r" (addr) ); 67 68 return ret; 69 } 70 71 static inline unsigned long long gsc_readq(unsigned long addr) 72 { 73 unsigned long long ret; 74 75 #ifdef CONFIG_64BIT 76 __asm__ __volatile__( 77 " ldda 0(%1),%0\n" 78 : "=r" (ret) : "r" (addr) ); 79 #else 80 /* two reads may have side effects.. */ 81 ret = ((u64) gsc_readl(addr)) << 32; 82 ret |= gsc_readl(addr+4); 83 #endif 84 return ret; 85 } 86 87 static inline void gsc_writeb(unsigned char val, unsigned long addr) 88 { 89 long flags; 90 __asm__ __volatile__( 91 " rsm %3,%0\n" 92 " stbs %1,0(%2)\n" 93 " mtsm %0\n" 94 : "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) ); 95 } 96 97 static inline void gsc_writew(unsigned short val, unsigned long addr) 98 { 99 long flags; 100 __asm__ __volatile__( 101 " rsm %3,%0\n" 102 " sths %1,0(%2)\n" 103 " mtsm %0\n" 104 : "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) ); 105 } 106 107 static inline void gsc_writel(unsigned int val, unsigned long addr) 108 { 109 __asm__ __volatile__( 110 " stwas %0,0(%1)\n" 111 : : "r" (val), "r" (addr) ); 112 } 113 114 static inline void gsc_writeq(unsigned long long val, unsigned long addr) 115 { 116 #ifdef CONFIG_64BIT 117 __asm__ __volatile__( 118 " stda %0,0(%1)\n" 119 : : "r" (val), "r" (addr) ); 120 #else 121 /* two writes may have side effects.. */ 122 gsc_writel(val >> 32, addr); 123 gsc_writel(val, addr+4); 124 #endif 125 } 126 127 /* 128 * The standard PCI ioremap interfaces 129 */ 130 void __iomem *ioremap(unsigned long offset, unsigned long size); 131 #define ioremap_nocache(off, sz) ioremap((off), (sz)) 132 #define ioremap_wc ioremap_nocache 133 #define ioremap_uc ioremap_nocache 134 135 extern void iounmap(const volatile void __iomem *addr); 136 137 static inline unsigned char __raw_readb(const volatile void __iomem *addr) 138 { 139 return (*(volatile unsigned char __force *) (addr)); 140 } 141 static inline unsigned short __raw_readw(const volatile void __iomem *addr) 142 { 143 return *(volatile unsigned short __force *) addr; 144 } 145 static inline unsigned int __raw_readl(const volatile void __iomem *addr) 146 { 147 return *(volatile unsigned int __force *) addr; 148 } 149 static inline unsigned long long __raw_readq(const volatile void __iomem *addr) 150 { 151 return *(volatile unsigned long long __force *) addr; 152 } 153 154 static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr) 155 { 156 *(volatile unsigned char __force *) addr = b; 157 } 158 static inline void __raw_writew(unsigned short b, volatile void __iomem *addr) 159 { 160 *(volatile unsigned short __force *) addr = b; 161 } 162 static inline void __raw_writel(unsigned int b, volatile void __iomem *addr) 163 { 164 *(volatile unsigned int __force *) addr = b; 165 } 166 static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr) 167 { 168 *(volatile unsigned long long __force *) addr = b; 169 } 170 171 static inline unsigned char readb(const volatile void __iomem *addr) 172 { 173 return __raw_readb(addr); 174 } 175 static inline unsigned short readw(const volatile void __iomem *addr) 176 { 177 return le16_to_cpu((__le16 __force) __raw_readw(addr)); 178 } 179 static inline unsigned int readl(const volatile void __iomem *addr) 180 { 181 return le32_to_cpu((__le32 __force) __raw_readl(addr)); 182 } 183 static inline unsigned long long readq(const volatile void __iomem *addr) 184 { 185 return le64_to_cpu((__le64 __force) __raw_readq(addr)); 186 } 187 188 static inline void writeb(unsigned char b, volatile void __iomem *addr) 189 { 190 __raw_writeb(b, addr); 191 } 192 static inline void writew(unsigned short w, volatile void __iomem *addr) 193 { 194 __raw_writew((__u16 __force) cpu_to_le16(w), addr); 195 } 196 static inline void writel(unsigned int l, volatile void __iomem *addr) 197 { 198 __raw_writel((__u32 __force) cpu_to_le32(l), addr); 199 } 200 static inline void writeq(unsigned long long q, volatile void __iomem *addr) 201 { 202 __raw_writeq((__u64 __force) cpu_to_le64(q), addr); 203 } 204 205 #define readb readb 206 #define readw readw 207 #define readl readl 208 #define readq readq 209 #define writeb writeb 210 #define writew writew 211 #define writel writel 212 #define writeq writeq 213 214 #define readb_relaxed(addr) readb(addr) 215 #define readw_relaxed(addr) readw(addr) 216 #define readl_relaxed(addr) readl(addr) 217 #define readq_relaxed(addr) readq(addr) 218 #define writeb_relaxed(b, addr) writeb(b, addr) 219 #define writew_relaxed(w, addr) writew(w, addr) 220 #define writel_relaxed(l, addr) writel(l, addr) 221 #define writeq_relaxed(q, addr) writeq(q, addr) 222 223 void memset_io(volatile void __iomem *addr, unsigned char val, int count); 224 void memcpy_fromio(void *dst, const volatile void __iomem *src, int count); 225 void memcpy_toio(volatile void __iomem *dst, const void *src, int count); 226 227 /* Port-space IO */ 228 229 #define inb_p inb 230 #define inw_p inw 231 #define inl_p inl 232 #define outb_p outb 233 #define outw_p outw 234 #define outl_p outl 235 236 extern unsigned char eisa_in8(unsigned short port); 237 extern unsigned short eisa_in16(unsigned short port); 238 extern unsigned int eisa_in32(unsigned short port); 239 extern void eisa_out8(unsigned char data, unsigned short port); 240 extern void eisa_out16(unsigned short data, unsigned short port); 241 extern void eisa_out32(unsigned int data, unsigned short port); 242 243 #if defined(CONFIG_PCI) 244 extern unsigned char inb(int addr); 245 extern unsigned short inw(int addr); 246 extern unsigned int inl(int addr); 247 248 extern void outb(unsigned char b, int addr); 249 extern void outw(unsigned short b, int addr); 250 extern void outl(unsigned int b, int addr); 251 #elif defined(CONFIG_EISA) 252 #define inb eisa_in8 253 #define inw eisa_in16 254 #define inl eisa_in32 255 #define outb eisa_out8 256 #define outw eisa_out16 257 #define outl eisa_out32 258 #else 259 static inline char inb(unsigned long addr) 260 { 261 BUG(); 262 return -1; 263 } 264 265 static inline short inw(unsigned long addr) 266 { 267 BUG(); 268 return -1; 269 } 270 271 static inline int inl(unsigned long addr) 272 { 273 BUG(); 274 return -1; 275 } 276 277 #define outb(x, y) BUG() 278 #define outw(x, y) BUG() 279 #define outl(x, y) BUG() 280 #endif 281 282 /* 283 * String versions of in/out ops: 284 */ 285 extern void insb (unsigned long port, void *dst, unsigned long count); 286 extern void insw (unsigned long port, void *dst, unsigned long count); 287 extern void insl (unsigned long port, void *dst, unsigned long count); 288 extern void outsb (unsigned long port, const void *src, unsigned long count); 289 extern void outsw (unsigned long port, const void *src, unsigned long count); 290 extern void outsl (unsigned long port, const void *src, unsigned long count); 291 292 293 /* IO Port space is : BBiiii where BB is HBA number. */ 294 #define IO_SPACE_LIMIT 0x00ffffff 295 296 /* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32 297 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit 298 * mode (essentially just sign extending. This macro takes in a 32 299 * bit I/O address (still with the leading f) and outputs the correct 300 * value for either 32 or 64 bit mode */ 301 #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL))) 302 303 #define ioread64 ioread64 304 #define ioread64be ioread64be 305 #define iowrite64 iowrite64 306 #define iowrite64be iowrite64be 307 extern u64 ioread64(void __iomem *addr); 308 extern u64 ioread64be(void __iomem *addr); 309 extern void iowrite64(u64 val, void __iomem *addr); 310 extern void iowrite64be(u64 val, void __iomem *addr); 311 312 #include <asm-generic/iomap.h> 313 314 /* 315 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 316 * access 317 */ 318 #define xlate_dev_mem_ptr(p) __va(p) 319 320 /* 321 * Convert a virtual cached pointer to an uncached pointer 322 */ 323 #define xlate_dev_kmem_ptr(p) p 324 325 #endif 326