1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_PARISC_FUTEX_H 3 #define _ASM_PARISC_FUTEX_H 4 5 #include <linux/futex.h> 6 #include <linux/uaccess.h> 7 #include <asm/atomic.h> 8 #include <asm/errno.h> 9 10 /* The following has to match the LWS code in syscall.S. We have 11 sixteen four-word locks. */ 12 13 static inline void 14 _futex_spin_lock(u32 __user *uaddr) 15 { 16 extern u32 lws_lock_start[]; 17 long index = ((long)uaddr & 0x3f8) >> 1; 18 arch_spinlock_t *s = (arch_spinlock_t *)&lws_lock_start[index]; 19 preempt_disable(); 20 arch_spin_lock(s); 21 } 22 23 static inline void 24 _futex_spin_unlock(u32 __user *uaddr) 25 { 26 extern u32 lws_lock_start[]; 27 long index = ((long)uaddr & 0x3f8) >> 1; 28 arch_spinlock_t *s = (arch_spinlock_t *)&lws_lock_start[index]; 29 arch_spin_unlock(s); 30 preempt_enable(); 31 } 32 33 static inline int 34 arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr) 35 { 36 int oldval, ret; 37 u32 tmp; 38 39 ret = -EFAULT; 40 41 _futex_spin_lock(uaddr); 42 if (unlikely(get_user(oldval, uaddr) != 0)) 43 goto out_pagefault_enable; 44 45 ret = 0; 46 tmp = oldval; 47 48 switch (op) { 49 case FUTEX_OP_SET: 50 tmp = oparg; 51 break; 52 case FUTEX_OP_ADD: 53 tmp += oparg; 54 break; 55 case FUTEX_OP_OR: 56 tmp |= oparg; 57 break; 58 case FUTEX_OP_ANDN: 59 tmp &= ~oparg; 60 break; 61 case FUTEX_OP_XOR: 62 tmp ^= oparg; 63 break; 64 default: 65 ret = -ENOSYS; 66 } 67 68 if (ret == 0 && unlikely(put_user(tmp, uaddr) != 0)) 69 ret = -EFAULT; 70 71 out_pagefault_enable: 72 _futex_spin_unlock(uaddr); 73 74 if (!ret) 75 *oval = oldval; 76 77 return ret; 78 } 79 80 static inline int 81 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, 82 u32 oldval, u32 newval) 83 { 84 u32 val; 85 86 /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is 87 * our gateway page, and causes no end of trouble... 88 */ 89 if (uaccess_kernel() && !uaddr) 90 return -EFAULT; 91 92 if (!access_ok(uaddr, sizeof(u32))) 93 return -EFAULT; 94 95 /* HPPA has no cmpxchg in hardware and therefore the 96 * best we can do here is use an array of locks. The 97 * lock selected is based on a hash of the userspace 98 * address. This should scale to a couple of CPUs. 99 */ 100 101 _futex_spin_lock(uaddr); 102 if (unlikely(get_user(val, uaddr) != 0)) { 103 _futex_spin_unlock(uaddr); 104 return -EFAULT; 105 } 106 107 if (val == oldval && unlikely(put_user(newval, uaddr) != 0)) { 108 _futex_spin_unlock(uaddr); 109 return -EFAULT; 110 } 111 112 *uval = val; 113 _futex_spin_unlock(uaddr); 114 115 return 0; 116 } 117 118 #endif /*_ASM_PARISC_FUTEX_H*/ 119