1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _PARISC_DMA_MAPPING_H
3 #define _PARISC_DMA_MAPPING_H
4 
5 #include <asm/cacheflush.h>
6 
7 /*
8 ** We need to support 4 different coherent dma models with one binary:
9 **
10 **     I/O MMU        consistent method           dma_sync behavior
11 **  =============   ======================       =======================
12 **  a) PA-7x00LC    uncachable host memory          flush/purge
13 **  b) U2/Uturn      cachable host memory              NOP
14 **  c) Ike/Astro     cachable host memory              NOP
15 **  d) EPIC/SAGA     memory on EPIC/SAGA         flush/reset DMA channel
16 **
17 ** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
18 **
19 ** Systems (eg PCX-T workstations) that don't fall into the above
20 ** categories will need to modify the needed drivers to perform
21 ** flush/purge and allocate "regular" cacheable pages for everything.
22 */
23 
24 #ifdef CONFIG_PA11
25 extern const struct dma_map_ops pcxl_dma_ops;
26 extern const struct dma_map_ops pcx_dma_ops;
27 #endif
28 
29 extern const struct dma_map_ops *hppa_dma_ops;
30 
31 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
32 {
33 	return hppa_dma_ops;
34 }
35 
36 static inline void *
37 parisc_walk_tree(struct device *dev)
38 {
39 	struct device *otherdev;
40 	if(likely(dev->platform_data != NULL))
41 		return dev->platform_data;
42 	/* OK, just traverse the bus to find it */
43 	for(otherdev = dev->parent; otherdev;
44 	    otherdev = otherdev->parent) {
45 		if(otherdev->platform_data) {
46 			dev->platform_data = otherdev->platform_data;
47 			break;
48 		}
49 	}
50 	return dev->platform_data;
51 }
52 
53 #define GET_IOC(dev) ({					\
54 	void *__pdata = parisc_walk_tree(dev);		\
55 	__pdata ? HBA_DATA(__pdata)->iommu : NULL;	\
56 })
57 
58 #ifdef CONFIG_IOMMU_CCIO
59 struct parisc_device;
60 struct ioc;
61 void * ccio_get_iommu(const struct parisc_device *dev);
62 int ccio_request_resource(const struct parisc_device *dev,
63 		struct resource *res);
64 int ccio_allocate_resource(const struct parisc_device *dev,
65 		struct resource *res, unsigned long size,
66 		unsigned long min, unsigned long max, unsigned long align);
67 #else /* !CONFIG_IOMMU_CCIO */
68 #define ccio_get_iommu(dev) NULL
69 #define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
70 #define ccio_allocate_resource(dev, res, size, min, max, align) \
71 		allocate_resource(&iomem_resource, res, size, min, max, \
72 				align, NULL, NULL)
73 #endif /* !CONFIG_IOMMU_CCIO */
74 
75 #ifdef CONFIG_IOMMU_SBA
76 struct parisc_device;
77 void * sba_get_iommu(struct parisc_device *dev);
78 #endif
79 
80 #endif
81