1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _PARISC_DMA_MAPPING_H 3 #define _PARISC_DMA_MAPPING_H 4 5 #include <asm/cacheflush.h> 6 7 /* 8 ** We need to support 4 different coherent dma models with one binary: 9 ** 10 ** I/O MMU consistent method dma_sync behavior 11 ** ============= ====================== ======================= 12 ** a) PA-7x00LC uncachable host memory flush/purge 13 ** b) U2/Uturn cachable host memory NOP 14 ** c) Ike/Astro cachable host memory NOP 15 ** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel 16 ** 17 ** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU. 18 ** 19 ** Systems (eg PCX-T workstations) that don't fall into the above 20 ** categories will need to modify the needed drivers to perform 21 ** flush/purge and allocate "regular" cacheable pages for everything. 22 */ 23 24 #ifdef CONFIG_PA11 25 extern const struct dma_map_ops pcxl_dma_ops; 26 extern const struct dma_map_ops pcx_dma_ops; 27 #endif 28 29 extern const struct dma_map_ops *hppa_dma_ops; 30 31 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) 32 { 33 return hppa_dma_ops; 34 } 35 36 static inline void 37 dma_cache_sync(struct device *dev, void *vaddr, size_t size, 38 enum dma_data_direction direction) 39 { 40 if (hppa_dma_ops->sync_single_for_cpu) 41 flush_kernel_dcache_range((unsigned long)vaddr, size); 42 } 43 44 static inline void * 45 parisc_walk_tree(struct device *dev) 46 { 47 struct device *otherdev; 48 if(likely(dev->platform_data != NULL)) 49 return dev->platform_data; 50 /* OK, just traverse the bus to find it */ 51 for(otherdev = dev->parent; otherdev; 52 otherdev = otherdev->parent) { 53 if(otherdev->platform_data) { 54 dev->platform_data = otherdev->platform_data; 55 break; 56 } 57 } 58 return dev->platform_data; 59 } 60 61 #define GET_IOC(dev) ({ \ 62 void *__pdata = parisc_walk_tree(dev); \ 63 __pdata ? HBA_DATA(__pdata)->iommu : NULL; \ 64 }) 65 66 #ifdef CONFIG_IOMMU_CCIO 67 struct parisc_device; 68 struct ioc; 69 void * ccio_get_iommu(const struct parisc_device *dev); 70 int ccio_request_resource(const struct parisc_device *dev, 71 struct resource *res); 72 int ccio_allocate_resource(const struct parisc_device *dev, 73 struct resource *res, unsigned long size, 74 unsigned long min, unsigned long max, unsigned long align); 75 #else /* !CONFIG_IOMMU_CCIO */ 76 #define ccio_get_iommu(dev) NULL 77 #define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res) 78 #define ccio_allocate_resource(dev, res, size, min, max, align) \ 79 allocate_resource(&iomem_resource, res, size, min, max, \ 80 align, NULL, NULL) 81 #endif /* !CONFIG_IOMMU_CCIO */ 82 83 #ifdef CONFIG_IOMMU_SBA 84 struct parisc_device; 85 void * sba_get_iommu(struct parisc_device *dev); 86 #endif 87 88 #endif 89