1 /* 2 * OpenRISC Linux 3 * 4 * Linux architectural port borrowing liberally from similar works of 5 * others. All original copyrights apply as per the original source 6 * declaration. 7 * 8 * OpenRISC implementation: 9 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com> 10 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se> 11 * et al. 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 */ 18 19 /* or32 pgtable.h - macros and functions to manipulate page tables 20 * 21 * Based on: 22 * include/asm-cris/pgtable.h 23 */ 24 25 #ifndef __ASM_OPENRISC_PGTABLE_H 26 #define __ASM_OPENRISC_PGTABLE_H 27 28 #include <asm-generic/pgtable-nopmd.h> 29 30 #ifndef __ASSEMBLY__ 31 #include <asm/mmu.h> 32 #include <asm/fixmap.h> 33 34 /* 35 * The Linux memory management assumes a three-level page table setup. On 36 * or32, we use that, but "fold" the mid level into the top-level page 37 * table. Since the MMU TLB is software loaded through an interrupt, it 38 * supports any page table structure, so we could have used a three-level 39 * setup, but for the amounts of memory we normally use, a two-level is 40 * probably more efficient. 41 * 42 * This file contains the functions and defines necessary to modify and use 43 * the or32 page table tree. 44 */ 45 46 extern void paging_init(void); 47 48 /* Certain architectures need to do special things when pte's 49 * within a page table are directly modified. Thus, the following 50 * hook is made available. 51 */ 52 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) 53 #define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) 54 /* 55 * (pmds are folded into pgds so this doesn't get actually called, 56 * but the define is needed for a generic inline function.) 57 */ 58 #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) 59 60 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-2)) 61 #define PGDIR_SIZE (1UL << PGDIR_SHIFT) 62 #define PGDIR_MASK (~(PGDIR_SIZE-1)) 63 64 /* 65 * entries per page directory level: we use a two-level, so 66 * we don't really have any PMD directory physically. 67 * pointers are 4 bytes so we can use the page size and 68 * divide it by 4 (shift by 2). 69 */ 70 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-2)) 71 72 #define PTRS_PER_PGD (1UL << (PAGE_SHIFT-2)) 73 74 /* calculate how many PGD entries a user-level program can use 75 * the first mappable virtual address is 0 76 * (TASK_SIZE is the maximum virtual address space) 77 */ 78 79 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) 80 #define FIRST_USER_ADDRESS 0 81 82 /* 83 * Kernels own virtual memory area. 84 */ 85 86 /* 87 * The size and location of the vmalloc area are chosen so that modules 88 * placed in this area aren't more than a 28-bit signed offset from any 89 * kernel functions that they may need. This greatly simplifies handling 90 * of the relocations for l.j and l.jal instructions as we don't need to 91 * introduce any trampolines for reaching "distant" code. 92 * 93 * 64 MB of vmalloc area is comparable to what's available on other arches. 94 */ 95 96 #define VMALLOC_START (PAGE_OFFSET-0x04000000) 97 #define VMALLOC_END (PAGE_OFFSET) 98 #define VMALLOC_VMADDR(x) ((unsigned long)(x)) 99 100 /* Define some higher level generic page attributes. 101 * 102 * If you change _PAGE_CI definition be sure to change it in 103 * io.h for ioremap_nocache() too. 104 */ 105 106 /* 107 * An OR32 PTE looks like this: 108 * 109 * | 31 ... 10 | 9 | 8 ... 6 | 5 | 4 | 3 | 2 | 1 | 0 | 110 * Phys pg.num L PP Index D A WOM WBC CI CC 111 * 112 * L : link 113 * PPI: Page protection index 114 * D : Dirty 115 * A : Accessed 116 * WOM: Weakly ordered memory 117 * WBC: Write-back cache 118 * CI : Cache inhibit 119 * CC : Cache coherent 120 * 121 * The protection bits below should correspond to the layout of the actual 122 * PTE as per above 123 */ 124 125 #define _PAGE_CC 0x001 /* software: pte contains a translation */ 126 #define _PAGE_CI 0x002 /* cache inhibit */ 127 #define _PAGE_WBC 0x004 /* write back cache */ 128 #define _PAGE_FILE 0x004 /* set: pagecache, unset: swap (when !PRESENT) */ 129 #define _PAGE_WOM 0x008 /* weakly ordered memory */ 130 131 #define _PAGE_A 0x010 /* accessed */ 132 #define _PAGE_D 0x020 /* dirty */ 133 #define _PAGE_URE 0x040 /* user read enable */ 134 #define _PAGE_UWE 0x080 /* user write enable */ 135 136 #define _PAGE_SRE 0x100 /* superuser read enable */ 137 #define _PAGE_SWE 0x200 /* superuser write enable */ 138 #define _PAGE_EXEC 0x400 /* software: page is executable */ 139 #define _PAGE_U_SHARED 0x800 /* software: page is shared in user space */ 140 141 /* 0x001 is cache coherency bit, which should always be set to 142 * 1 - for SMP (when we support it) 143 * 0 - otherwise 144 * 145 * we just reuse this bit in software for _PAGE_PRESENT and 146 * force it to 0 when loading it into TLB. 147 */ 148 #define _PAGE_PRESENT _PAGE_CC 149 #define _PAGE_USER _PAGE_URE 150 #define _PAGE_WRITE (_PAGE_UWE | _PAGE_SWE) 151 #define _PAGE_DIRTY _PAGE_D 152 #define _PAGE_ACCESSED _PAGE_A 153 #define _PAGE_NO_CACHE _PAGE_CI 154 #define _PAGE_SHARED _PAGE_U_SHARED 155 #define _PAGE_READ (_PAGE_URE | _PAGE_SRE) 156 157 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 158 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED) 159 #define _PAGE_ALL (_PAGE_PRESENT | _PAGE_ACCESSED) 160 #define _KERNPG_TABLE \ 161 (_PAGE_BASE | _PAGE_SRE | _PAGE_SWE | _PAGE_ACCESSED | _PAGE_DIRTY) 162 163 #define PAGE_NONE __pgprot(_PAGE_ALL) 164 #define PAGE_READONLY __pgprot(_PAGE_ALL | _PAGE_URE | _PAGE_SRE) 165 #define PAGE_READONLY_X __pgprot(_PAGE_ALL | _PAGE_URE | _PAGE_SRE | _PAGE_EXEC) 166 #define PAGE_SHARED \ 167 __pgprot(_PAGE_ALL | _PAGE_URE | _PAGE_SRE | _PAGE_UWE | _PAGE_SWE \ 168 | _PAGE_SHARED) 169 #define PAGE_SHARED_X \ 170 __pgprot(_PAGE_ALL | _PAGE_URE | _PAGE_SRE | _PAGE_UWE | _PAGE_SWE \ 171 | _PAGE_SHARED | _PAGE_EXEC) 172 #define PAGE_COPY __pgprot(_PAGE_ALL | _PAGE_URE | _PAGE_SRE) 173 #define PAGE_COPY_X __pgprot(_PAGE_ALL | _PAGE_URE | _PAGE_SRE | _PAGE_EXEC) 174 175 #define PAGE_KERNEL \ 176 __pgprot(_PAGE_ALL | _PAGE_SRE | _PAGE_SWE \ 177 | _PAGE_SHARED | _PAGE_DIRTY | _PAGE_EXEC) 178 #define PAGE_KERNEL_RO \ 179 __pgprot(_PAGE_ALL | _PAGE_SRE \ 180 | _PAGE_SHARED | _PAGE_DIRTY | _PAGE_EXEC) 181 #define PAGE_KERNEL_NOCACHE \ 182 __pgprot(_PAGE_ALL | _PAGE_SRE | _PAGE_SWE \ 183 | _PAGE_SHARED | _PAGE_DIRTY | _PAGE_EXEC | _PAGE_CI) 184 185 #define __P000 PAGE_NONE 186 #define __P001 PAGE_READONLY_X 187 #define __P010 PAGE_COPY 188 #define __P011 PAGE_COPY_X 189 #define __P100 PAGE_READONLY 190 #define __P101 PAGE_READONLY_X 191 #define __P110 PAGE_COPY 192 #define __P111 PAGE_COPY_X 193 194 #define __S000 PAGE_NONE 195 #define __S001 PAGE_READONLY_X 196 #define __S010 PAGE_SHARED 197 #define __S011 PAGE_SHARED_X 198 #define __S100 PAGE_READONLY 199 #define __S101 PAGE_READONLY_X 200 #define __S110 PAGE_SHARED 201 #define __S111 PAGE_SHARED_X 202 203 /* zero page used for uninitialized stuff */ 204 extern unsigned long empty_zero_page[2048]; 205 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 206 207 /* number of bits that fit into a memory pointer */ 208 #define BITS_PER_PTR (8*sizeof(unsigned long)) 209 210 /* to align the pointer to a pointer address */ 211 #define PTR_MASK (~(sizeof(void *)-1)) 212 213 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */ 214 /* 64-bit machines, beware! SRB. */ 215 #define SIZEOF_PTR_LOG2 2 216 217 /* to find an entry in a page-table */ 218 #define PAGE_PTR(address) \ 219 ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK) 220 221 /* to set the page-dir */ 222 #define SET_PAGE_DIR(tsk, pgdir) 223 224 #define pte_none(x) (!pte_val(x)) 225 #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) 226 #define pte_clear(mm, addr, xp) do { pte_val(*(xp)) = 0; } while (0) 227 228 #define pmd_none(x) (!pmd_val(x)) 229 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK)) != _KERNPG_TABLE) 230 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) 231 #define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0) 232 233 /* 234 * The following only work if pte_present() is true. 235 * Undefined behaviour if not.. 236 */ 237 238 static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; } 239 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } 240 static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC; } 241 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } 242 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 243 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } 244 static inline int pte_special(pte_t pte) { return 0; } 245 static inline pte_t pte_mkspecial(pte_t pte) { return pte; } 246 247 static inline pte_t pte_wrprotect(pte_t pte) 248 { 249 pte_val(pte) &= ~(_PAGE_WRITE); 250 return pte; 251 } 252 253 static inline pte_t pte_rdprotect(pte_t pte) 254 { 255 pte_val(pte) &= ~(_PAGE_READ); 256 return pte; 257 } 258 259 static inline pte_t pte_exprotect(pte_t pte) 260 { 261 pte_val(pte) &= ~(_PAGE_EXEC); 262 return pte; 263 } 264 265 static inline pte_t pte_mkclean(pte_t pte) 266 { 267 pte_val(pte) &= ~(_PAGE_DIRTY); 268 return pte; 269 } 270 271 static inline pte_t pte_mkold(pte_t pte) 272 { 273 pte_val(pte) &= ~(_PAGE_ACCESSED); 274 return pte; 275 } 276 277 static inline pte_t pte_mkwrite(pte_t pte) 278 { 279 pte_val(pte) |= _PAGE_WRITE; 280 return pte; 281 } 282 283 static inline pte_t pte_mkread(pte_t pte) 284 { 285 pte_val(pte) |= _PAGE_READ; 286 return pte; 287 } 288 289 static inline pte_t pte_mkexec(pte_t pte) 290 { 291 pte_val(pte) |= _PAGE_EXEC; 292 return pte; 293 } 294 295 static inline pte_t pte_mkdirty(pte_t pte) 296 { 297 pte_val(pte) |= _PAGE_DIRTY; 298 return pte; 299 } 300 301 static inline pte_t pte_mkyoung(pte_t pte) 302 { 303 pte_val(pte) |= _PAGE_ACCESSED; 304 return pte; 305 } 306 307 /* 308 * Conversion functions: convert a page and protection to a page entry, 309 * and a page entry and page directory to the page they refer to. 310 */ 311 312 /* What actually goes as arguments to the various functions is less than 313 * obvious, but a rule of thumb is that struct page's goes as struct page *, 314 * really physical DRAM addresses are unsigned long's, and DRAM "virtual" 315 * addresses (the 0xc0xxxxxx's) goes as void *'s. 316 */ 317 318 static inline pte_t __mk_pte(void *page, pgprot_t pgprot) 319 { 320 pte_t pte; 321 /* the PTE needs a physical address */ 322 pte_val(pte) = __pa(page) | pgprot_val(pgprot); 323 return pte; 324 } 325 326 #define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot)) 327 328 #define mk_pte_phys(physpage, pgprot) \ 329 ({ \ 330 pte_t __pte; \ 331 \ 332 pte_val(__pte) = (physpage) + pgprot_val(pgprot); \ 333 __pte; \ 334 }) 335 336 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 337 { 338 pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); 339 return pte; 340 } 341 342 343 /* 344 * pte_val refers to a page in the 0x0xxxxxxx physical DRAM interval 345 * __pte_page(pte_val) refers to the "virtual" DRAM interval 346 * pte_pagenr refers to the page-number counted starting from the virtual 347 * DRAM start 348 */ 349 350 static inline unsigned long __pte_page(pte_t pte) 351 { 352 /* the PTE contains a physical address */ 353 return (unsigned long)__va(pte_val(pte) & PAGE_MASK); 354 } 355 356 #define pte_pagenr(pte) ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT) 357 358 /* permanent address of a page */ 359 360 #define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT)) 361 #define pte_page(pte) (mem_map+pte_pagenr(pte)) 362 363 /* 364 * only the pte's themselves need to point to physical DRAM (see above) 365 * the pagetable links are purely handled within the kernel SW and thus 366 * don't need the __pa and __va transformations. 367 */ 368 static inline void pmd_set(pmd_t *pmdp, pte_t *ptep) 369 { 370 pmd_val(*pmdp) = _KERNPG_TABLE | (unsigned long) ptep; 371 } 372 373 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) 374 #define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) 375 376 /* to find an entry in a page-table-directory. */ 377 #define pgd_index(address) ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) 378 379 #define __pgd_offset(address) pgd_index(address) 380 381 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) 382 383 /* to find an entry in a kernel page-table-directory */ 384 #define pgd_offset_k(address) pgd_offset(&init_mm, address) 385 386 #define __pmd_offset(address) \ 387 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) 388 389 /* 390 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] 391 * 392 * this macro returns the index of the entry in the pte page which would 393 * control the given virtual address 394 */ 395 #define __pte_offset(address) \ 396 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 397 #define pte_offset_kernel(dir, address) \ 398 ((pte_t *) pmd_page_kernel(*(dir)) + __pte_offset(address)) 399 #define pte_offset_map(dir, address) \ 400 ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) 401 #define pte_offset_map_nested(dir, address) \ 402 pte_offset_map(dir, address) 403 404 #define pte_unmap(pte) do { } while (0) 405 #define pte_unmap_nested(pte) do { } while (0) 406 #define pte_pfn(x) ((unsigned long)(((x).pte)) >> PAGE_SHIFT) 407 #define pfn_pte(pfn, prot) __pte((((pfn) << PAGE_SHIFT)) | pgprot_val(prot)) 408 409 #define pte_ERROR(e) \ 410 printk(KERN_ERR "%s:%d: bad pte %p(%08lx).\n", \ 411 __FILE__, __LINE__, &(e), pte_val(e)) 412 #define pgd_ERROR(e) \ 413 printk(KERN_ERR "%s:%d: bad pgd %p(%08lx).\n", \ 414 __FILE__, __LINE__, &(e), pgd_val(e)) 415 416 extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */ 417 418 /* 419 * or32 doesn't have any external MMU info: the kernel page 420 * tables contain all the necessary information. 421 * 422 * Actually I am not sure on what this could be used for. 423 */ 424 static inline void update_mmu_cache(struct vm_area_struct *vma, 425 unsigned long address, pte_t *pte) 426 { 427 } 428 429 /* __PHX__ FIXME, SWAP, this probably doesn't work */ 430 431 /* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */ 432 /* Since the PAGE_PRESENT bit is bit 4, we can use the bits above */ 433 434 #define __swp_type(x) (((x).val >> 5) & 0x7f) 435 #define __swp_offset(x) ((x).val >> 12) 436 #define __swp_entry(type, offset) \ 437 ((swp_entry_t) { ((type) << 5) | ((offset) << 12) }) 438 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 439 #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 440 441 /* Encode and decode a nonlinear file mapping entry */ 442 443 #define PTE_FILE_MAX_BITS 26 444 #define pte_to_pgoff(x) (pte_val(x) >> 6) 445 #define pgoff_to_pte(x) __pte(((x) << 6) | _PAGE_FILE) 446 447 #define kern_addr_valid(addr) (1) 448 449 #include <asm-generic/pgtable.h> 450 451 /* 452 * No page table caches to initialise 453 */ 454 #define pgtable_cache_init() do { } while (0) 455 456 typedef pte_t *pte_addr_t; 457 458 #endif /* __ASSEMBLY__ */ 459 #endif /* __ASM_OPENRISC_PGTABLE_H */ 460