1# 2# For a description of the syntax of this configuration file, 3# see Documentation/kbuild/kconfig-language.txt. 4# 5 6config OPENRISC 7 def_bool y 8 select OF 9 select OF_EARLY_FLATTREE 10 select IRQ_DOMAIN 11 select HANDLE_DOMAIN_IRQ 12 select HAVE_MEMBLOCK 13 select GPIOLIB 14 select HAVE_ARCH_TRACEHOOK 15 select GENERIC_IRQ_CHIP 16 select GENERIC_IRQ_PROBE 17 select GENERIC_IRQ_SHOW 18 select GENERIC_IOMAP 19 select GENERIC_CPU_DEVICES 20 select HAVE_UID16 21 select GENERIC_ATOMIC64 22 select GENERIC_CLOCKEVENTS 23 select GENERIC_STRNCPY_FROM_USER 24 select GENERIC_STRNLEN_USER 25 select MODULES_USE_ELF_RELA 26 select HAVE_DEBUG_STACKOVERFLOW 27 select OR1K_PIC 28 select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1 29 30config MMU 31 def_bool y 32 33config RWSEM_GENERIC_SPINLOCK 34 def_bool y 35 36config RWSEM_XCHGADD_ALGORITHM 37 def_bool n 38 39config GENERIC_HWEIGHT 40 def_bool y 41 42config NO_IOPORT_MAP 43 def_bool y 44 45config TRACE_IRQFLAGS_SUPPORT 46 def_bool y 47 48# For now, use generic checksum functions 49#These can be reimplemented in assembly later if so inclined 50config GENERIC_CSUM 51 def_bool y 52 53source "init/Kconfig" 54 55source "kernel/Kconfig.freezer" 56 57menu "Processor type and features" 58 59choice 60 prompt "Subarchitecture" 61 default OR1K_1200 62 63config OR1K_1200 64 bool "OR1200" 65 help 66 Generic OpenRISC 1200 architecture 67 68endchoice 69 70config OPENRISC_BUILTIN_DTB 71 string "Builtin DTB" 72 default "" 73 74menu "Class II Instructions" 75 76config OPENRISC_HAVE_INST_FF1 77 bool "Have instruction l.ff1" 78 default y 79 help 80 Select this if your implementation has the Class II instruction l.ff1 81 82config OPENRISC_HAVE_INST_FL1 83 bool "Have instruction l.fl1" 84 default y 85 help 86 Select this if your implementation has the Class II instruction l.fl1 87 88config OPENRISC_HAVE_INST_MUL 89 bool "Have instruction l.mul for hardware multiply" 90 default y 91 help 92 Select this if your implementation has a hardware multiply instruction 93 94config OPENRISC_HAVE_INST_DIV 95 bool "Have instruction l.div for hardware divide" 96 default y 97 help 98 Select this if your implementation has a hardware divide instruction 99endmenu 100 101 102source kernel/Kconfig.hz 103source kernel/Kconfig.preempt 104source "mm/Kconfig" 105 106config OPENRISC_NO_SPR_SR_DSX 107 bool "use SPR_SR_DSX software emulation" if OR1K_1200 108 default y 109 help 110 SPR_SR_DSX bit is status register bit indicating whether 111 the last exception has happened in delay slot. 112 113 OpenRISC architecture makes it optional to have it implemented 114 in hardware and the OR1200 does not have it. 115 116 Say N here if you know that your OpenRISC processor has 117 SPR_SR_DSX bit implemented. Say Y if you are unsure. 118 119config CMDLINE 120 string "Default kernel command string" 121 default "" 122 help 123 On some architectures there is currently no way for the boot loader 124 to pass arguments to the kernel. For these architectures, you should 125 supply some command-line options at build time by entering them 126 here. 127 128menu "Debugging options" 129 130config JUMP_UPON_UNHANDLED_EXCEPTION 131 bool "Try to die gracefully" 132 default y 133 help 134 Now this puts kernel into infinite loop after first oops. Till 135 your kernel crashes this doesn't have any influence. 136 137 Say Y if you are unsure. 138 139config OPENRISC_ESR_EXCEPTION_BUG_CHECK 140 bool "Check for possible ESR exception bug" 141 default n 142 help 143 This option enables some checks that might expose some problems 144 in kernel. 145 146 Say N if you are unsure. 147 148endmenu 149 150endmenu 151 152menu "Executable file formats" 153 154source "fs/Kconfig.binfmt" 155 156endmenu 157 158source "net/Kconfig" 159 160source "drivers/Kconfig" 161 162source "fs/Kconfig" 163 164source "security/Kconfig" 165 166source "crypto/Kconfig" 167 168source "lib/Kconfig" 169 170menu "Kernel hacking" 171 172source "lib/Kconfig.debug" 173 174endmenu 175