1# 2# For a description of the syntax of this configuration file, 3# see Documentation/kbuild/kconfig-language.txt. 4# 5 6config OPENRISC 7 def_bool y 8 select OF 9 select OF_EARLY_FLATTREE 10 select IRQ_DOMAIN 11 select HANDLE_DOMAIN_IRQ 12 select HAVE_MEMBLOCK 13 select GPIOLIB 14 select HAVE_ARCH_TRACEHOOK 15 select SPARSE_IRQ 16 select GENERIC_IRQ_CHIP 17 select GENERIC_IRQ_PROBE 18 select GENERIC_IRQ_SHOW 19 select GENERIC_IOMAP 20 select GENERIC_CPU_DEVICES 21 select HAVE_UID16 22 select GENERIC_ATOMIC64 23 select GENERIC_CLOCKEVENTS 24 select GENERIC_STRNCPY_FROM_USER 25 select GENERIC_STRNLEN_USER 26 select MODULES_USE_ELF_RELA 27 select HAVE_DEBUG_STACKOVERFLOW 28 select OR1K_PIC 29 select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1 30 select NO_BOOTMEM 31 32config MMU 33 def_bool y 34 35config RWSEM_GENERIC_SPINLOCK 36 def_bool y 37 38config RWSEM_XCHGADD_ALGORITHM 39 def_bool n 40 41config GENERIC_HWEIGHT 42 def_bool y 43 44config NO_IOPORT_MAP 45 def_bool y 46 47config TRACE_IRQFLAGS_SUPPORT 48 def_bool y 49 50# For now, use generic checksum functions 51#These can be reimplemented in assembly later if so inclined 52config GENERIC_CSUM 53 def_bool y 54 55source "init/Kconfig" 56 57source "kernel/Kconfig.freezer" 58 59menu "Processor type and features" 60 61choice 62 prompt "Subarchitecture" 63 default OR1K_1200 64 65config OR1K_1200 66 bool "OR1200" 67 help 68 Generic OpenRISC 1200 architecture 69 70endchoice 71 72config OPENRISC_BUILTIN_DTB 73 string "Builtin DTB" 74 default "" 75 76menu "Class II Instructions" 77 78config OPENRISC_HAVE_INST_FF1 79 bool "Have instruction l.ff1" 80 default y 81 help 82 Select this if your implementation has the Class II instruction l.ff1 83 84config OPENRISC_HAVE_INST_FL1 85 bool "Have instruction l.fl1" 86 default y 87 help 88 Select this if your implementation has the Class II instruction l.fl1 89 90config OPENRISC_HAVE_INST_MUL 91 bool "Have instruction l.mul for hardware multiply" 92 default y 93 help 94 Select this if your implementation has a hardware multiply instruction 95 96config OPENRISC_HAVE_INST_DIV 97 bool "Have instruction l.div for hardware divide" 98 default y 99 help 100 Select this if your implementation has a hardware divide instruction 101endmenu 102 103config NR_CPUS 104 int 105 default "1" 106 107source kernel/Kconfig.hz 108source kernel/Kconfig.preempt 109source "mm/Kconfig" 110 111config OPENRISC_NO_SPR_SR_DSX 112 bool "use SPR_SR_DSX software emulation" if OR1K_1200 113 default y 114 help 115 SPR_SR_DSX bit is status register bit indicating whether 116 the last exception has happened in delay slot. 117 118 OpenRISC architecture makes it optional to have it implemented 119 in hardware and the OR1200 does not have it. 120 121 Say N here if you know that your OpenRISC processor has 122 SPR_SR_DSX bit implemented. Say Y if you are unsure. 123 124config CMDLINE 125 string "Default kernel command string" 126 default "" 127 help 128 On some architectures there is currently no way for the boot loader 129 to pass arguments to the kernel. For these architectures, you should 130 supply some command-line options at build time by entering them 131 here. 132 133menu "Debugging options" 134 135config JUMP_UPON_UNHANDLED_EXCEPTION 136 bool "Try to die gracefully" 137 default y 138 help 139 Now this puts kernel into infinite loop after first oops. Till 140 your kernel crashes this doesn't have any influence. 141 142 Say Y if you are unsure. 143 144config OPENRISC_ESR_EXCEPTION_BUG_CHECK 145 bool "Check for possible ESR exception bug" 146 default n 147 help 148 This option enables some checks that might expose some problems 149 in kernel. 150 151 Say N if you are unsure. 152 153endmenu 154 155endmenu 156 157menu "Executable file formats" 158 159source "fs/Kconfig.binfmt" 160 161endmenu 162 163source "net/Kconfig" 164 165source "drivers/Kconfig" 166 167source "fs/Kconfig" 168 169source "security/Kconfig" 170 171source "crypto/Kconfig" 172 173source "lib/Kconfig" 174 175menu "Kernel hacking" 176 177source "lib/Kconfig.debug" 178 179endmenu 180