1# 2# For a description of the syntax of this configuration file, 3# see Documentation/kbuild/kconfig-language.txt. 4# 5 6config OPENRISC 7 def_bool y 8 select OF 9 select OF_EARLY_FLATTREE 10 select IRQ_DOMAIN 11 select HANDLE_DOMAIN_IRQ 12 select HAVE_MEMBLOCK 13 select ARCH_REQUIRE_GPIOLIB 14 select HAVE_ARCH_TRACEHOOK 15 select GENERIC_IRQ_CHIP 16 select GENERIC_IRQ_PROBE 17 select GENERIC_IRQ_SHOW 18 select GENERIC_IOMAP 19 select GENERIC_CPU_DEVICES 20 select HAVE_UID16 21 select GENERIC_ATOMIC64 22 select GENERIC_CLOCKEVENTS 23 select GENERIC_STRNCPY_FROM_USER 24 select GENERIC_STRNLEN_USER 25 select MODULES_USE_ELF_RELA 26 select HAVE_DEBUG_STACKOVERFLOW 27 select OR1K_PIC 28 29config MMU 30 def_bool y 31 32config RWSEM_GENERIC_SPINLOCK 33 def_bool y 34 35config RWSEM_XCHGADD_ALGORITHM 36 def_bool n 37 38config GENERIC_HWEIGHT 39 def_bool y 40 41config NO_IOPORT_MAP 42 def_bool y 43 44config TRACE_IRQFLAGS_SUPPORT 45 def_bool y 46 47# For now, use generic checksum functions 48#These can be reimplemented in assembly later if so inclined 49config GENERIC_CSUM 50 def_bool y 51 52source "init/Kconfig" 53 54source "kernel/Kconfig.freezer" 55 56menu "Processor type and features" 57 58choice 59 prompt "Subarchitecture" 60 default OR1K_1200 61 62config OR1K_1200 63 bool "OR1200" 64 help 65 Generic OpenRISC 1200 architecture 66 67endchoice 68 69config OPENRISC_BUILTIN_DTB 70 string "Builtin DTB" 71 default "" 72 73menu "Class II Instructions" 74 75config OPENRISC_HAVE_INST_FF1 76 bool "Have instruction l.ff1" 77 default y 78 help 79 Select this if your implementation has the Class II instruction l.ff1 80 81config OPENRISC_HAVE_INST_FL1 82 bool "Have instruction l.fl1" 83 default y 84 help 85 Select this if your implementation has the Class II instruction l.fl1 86 87config OPENRISC_HAVE_INST_MUL 88 bool "Have instruction l.mul for hardware multiply" 89 default y 90 help 91 Select this if your implementation has a hardware multiply instruction 92 93config OPENRISC_HAVE_INST_DIV 94 bool "Have instruction l.div for hardware divide" 95 default y 96 help 97 Select this if your implementation has a hardware divide instruction 98endmenu 99 100 101source kernel/Kconfig.hz 102source kernel/Kconfig.preempt 103source "mm/Kconfig" 104 105config OPENRISC_NO_SPR_SR_DSX 106 bool "use SPR_SR_DSX software emulation" if OR1K_1200 107 default y 108 help 109 SPR_SR_DSX bit is status register bit indicating whether 110 the last exception has happened in delay slot. 111 112 OpenRISC architecture makes it optional to have it implemented 113 in hardware and the OR1200 does not have it. 114 115 Say N here if you know that your OpenRISC processor has 116 SPR_SR_DSX bit implemented. Say Y if you are unsure. 117 118config CMDLINE 119 string "Default kernel command string" 120 default "" 121 help 122 On some architectures there is currently no way for the boot loader 123 to pass arguments to the kernel. For these architectures, you should 124 supply some command-line options at build time by entering them 125 here. 126 127menu "Debugging options" 128 129config JUMP_UPON_UNHANDLED_EXCEPTION 130 bool "Try to die gracefully" 131 default y 132 help 133 Now this puts kernel into infinite loop after first oops. Till 134 your kernel crashes this doesn't have any influence. 135 136 Say Y if you are unsure. 137 138config OPENRISC_ESR_EXCEPTION_BUG_CHECK 139 bool "Check for possible ESR exception bug" 140 default n 141 help 142 This option enables some checks that might expose some problems 143 in kernel. 144 145 Say N if you are unsure. 146 147endmenu 148 149endmenu 150 151menu "Executable file formats" 152 153source "fs/Kconfig.binfmt" 154 155endmenu 156 157source "net/Kconfig" 158 159source "drivers/Kconfig" 160 161source "fs/Kconfig" 162 163source "security/Kconfig" 164 165source "crypto/Kconfig" 166 167source "lib/Kconfig" 168 169menu "Kernel hacking" 170 171source "lib/Kconfig.debug" 172 173endmenu 174