1 /* 2 * Copyright (C) 2013 Altera Corporation 3 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> 4 * 5 * Based on cpuinfo.c from microblaze 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program. If not, see <http://www.gnu.org/licenses/>. 19 * 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/init.h> 24 #include <linux/delay.h> 25 #include <linux/seq_file.h> 26 #include <linux/string.h> 27 #include <linux/of.h> 28 #include <asm/cpuinfo.h> 29 30 struct cpuinfo cpuinfo; 31 32 #define err_cpu(x) \ 33 pr_err("ERROR: Nios II " x " different for kernel and DTS\n") 34 35 static inline u32 fcpu(struct device_node *cpu, const char *n) 36 { 37 u32 val = 0; 38 39 of_property_read_u32(cpu, n, &val); 40 41 return val; 42 } 43 44 static inline u32 fcpu_has(struct device_node *cpu, const char *n) 45 { 46 return of_get_property(cpu, n, NULL) ? 1 : 0; 47 } 48 49 void __init setup_cpuinfo(void) 50 { 51 struct device_node *cpu; 52 const char *str; 53 int len; 54 55 cpu = of_find_node_by_type(NULL, "cpu"); 56 if (!cpu) 57 panic("%s: No CPU found in devicetree!\n", __func__); 58 59 if (!fcpu_has(cpu, "altr,has-initda")) 60 panic("initda instruction is unimplemented. Please update your " 61 "hardware system to have more than 4-byte line data " 62 "cache\n"); 63 64 cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency"); 65 66 str = of_get_property(cpu, "altr,implementation", &len); 67 if (str) 68 strlcpy(cpuinfo.cpu_impl, str, sizeof(cpuinfo.cpu_impl)); 69 else 70 strcpy(cpuinfo.cpu_impl, "<unknown>"); 71 72 cpuinfo.has_div = fcpu_has(cpu, "altr,has-div"); 73 cpuinfo.has_mul = fcpu_has(cpu, "altr,has-mul"); 74 cpuinfo.has_mulx = fcpu_has(cpu, "altr,has-mulx"); 75 cpuinfo.mmu = fcpu_has(cpu, "altr,has-mmu"); 76 77 if (IS_ENABLED(CONFIG_NIOS2_HW_DIV_SUPPORT) && !cpuinfo.has_div) 78 err_cpu("DIV"); 79 80 if (IS_ENABLED(CONFIG_NIOS2_HW_MUL_SUPPORT) && !cpuinfo.has_mul) 81 err_cpu("MUL"); 82 83 if (IS_ENABLED(CONFIG_NIOS2_HW_MULX_SUPPORT) && !cpuinfo.has_mulx) 84 err_cpu("MULX"); 85 86 cpuinfo.tlb_num_ways = fcpu(cpu, "altr,tlb-num-ways"); 87 if (!cpuinfo.tlb_num_ways) 88 panic("altr,tlb-num-ways can't be 0. Please check your hardware " 89 "system\n"); 90 cpuinfo.icache_line_size = fcpu(cpu, "icache-line-size"); 91 cpuinfo.icache_size = fcpu(cpu, "icache-size"); 92 if (CONFIG_NIOS2_ICACHE_SIZE != cpuinfo.icache_size) 93 pr_warn("Warning: icache size configuration mismatch " 94 "(0x%x vs 0x%x) of CONFIG_NIOS2_ICACHE_SIZE vs " 95 "device tree icache-size\n", 96 CONFIG_NIOS2_ICACHE_SIZE, cpuinfo.icache_size); 97 98 cpuinfo.dcache_line_size = fcpu(cpu, "dcache-line-size"); 99 if (CONFIG_NIOS2_DCACHE_LINE_SIZE != cpuinfo.dcache_line_size) 100 pr_warn("Warning: dcache line size configuration mismatch " 101 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_LINE_SIZE vs " 102 "device tree dcache-line-size\n", 103 CONFIG_NIOS2_DCACHE_LINE_SIZE, cpuinfo.dcache_line_size); 104 cpuinfo.dcache_size = fcpu(cpu, "dcache-size"); 105 if (CONFIG_NIOS2_DCACHE_SIZE != cpuinfo.dcache_size) 106 pr_warn("Warning: dcache size configuration mismatch " 107 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_SIZE vs " 108 "device tree dcache-size\n", 109 CONFIG_NIOS2_DCACHE_SIZE, cpuinfo.dcache_size); 110 111 cpuinfo.tlb_pid_num_bits = fcpu(cpu, "altr,pid-num-bits"); 112 cpuinfo.tlb_num_ways_log2 = ilog2(cpuinfo.tlb_num_ways); 113 cpuinfo.tlb_num_entries = fcpu(cpu, "altr,tlb-num-entries"); 114 cpuinfo.tlb_num_lines = cpuinfo.tlb_num_entries / cpuinfo.tlb_num_ways; 115 cpuinfo.tlb_ptr_sz = fcpu(cpu, "altr,tlb-ptr-sz"); 116 117 cpuinfo.reset_addr = fcpu(cpu, "altr,reset-addr"); 118 cpuinfo.exception_addr = fcpu(cpu, "altr,exception-addr"); 119 cpuinfo.fast_tlb_miss_exc_addr = fcpu(cpu, "altr,fast-tlb-miss-addr"); 120 } 121 122 #ifdef CONFIG_PROC_FS 123 124 /* 125 * Get CPU information for use by the procfs. 126 */ 127 static int show_cpuinfo(struct seq_file *m, void *v) 128 { 129 const u32 clockfreq = cpuinfo.cpu_clock_freq; 130 131 seq_printf(m, 132 "CPU:\t\tNios II/%s\n" 133 "MMU:\t\t%s\n" 134 "FPU:\t\tnone\n" 135 "Clocking:\t%u.%02u MHz\n" 136 "BogoMips:\t%lu.%02lu\n" 137 "Calibration:\t%lu loops\n", 138 cpuinfo.cpu_impl, 139 cpuinfo.mmu ? "present" : "none", 140 clockfreq / 1000000, (clockfreq / 100000) % 10, 141 (loops_per_jiffy * HZ) / 500000, 142 ((loops_per_jiffy * HZ) / 5000) % 100, 143 (loops_per_jiffy * HZ)); 144 145 seq_printf(m, 146 "HW:\n" 147 " MUL:\t\t%s\n" 148 " MULX:\t\t%s\n" 149 " DIV:\t\t%s\n", 150 cpuinfo.has_mul ? "yes" : "no", 151 cpuinfo.has_mulx ? "yes" : "no", 152 cpuinfo.has_div ? "yes" : "no"); 153 154 seq_printf(m, 155 "Icache:\t\t%ukB, line length: %u\n", 156 cpuinfo.icache_size >> 10, 157 cpuinfo.icache_line_size); 158 159 seq_printf(m, 160 "Dcache:\t\t%ukB, line length: %u\n", 161 cpuinfo.dcache_size >> 10, 162 cpuinfo.dcache_line_size); 163 164 seq_printf(m, 165 "TLB:\t\t%u ways, %u entries, %u PID bits\n", 166 cpuinfo.tlb_num_ways, 167 cpuinfo.tlb_num_entries, 168 cpuinfo.tlb_pid_num_bits); 169 170 return 0; 171 } 172 173 static void *cpuinfo_start(struct seq_file *m, loff_t *pos) 174 { 175 unsigned long i = *pos; 176 177 return i < num_possible_cpus() ? (void *) (i + 1) : NULL; 178 } 179 180 static void *cpuinfo_next(struct seq_file *m, void *v, loff_t *pos) 181 { 182 ++*pos; 183 return cpuinfo_start(m, pos); 184 } 185 186 static void cpuinfo_stop(struct seq_file *m, void *v) 187 { 188 } 189 190 const struct seq_operations cpuinfo_op = { 191 .start = cpuinfo_start, 192 .next = cpuinfo_next, 193 .stop = cpuinfo_stop, 194 .show = show_cpuinfo 195 }; 196 197 #endif /* CONFIG_PROC_FS */ 198