xref: /openbmc/linux/arch/nios2/kernel/cpuinfo.c (revision e3d786a3)
1 /*
2  * Copyright (C) 2013 Altera Corporation
3  * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
4  *
5  * Based on cpuinfo.c from microblaze
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19  *
20  */
21 
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/seq_file.h>
26 #include <linux/string.h>
27 #include <linux/of.h>
28 #include <asm/cpuinfo.h>
29 
30 struct cpuinfo cpuinfo;
31 
32 #define err_cpu(x) \
33 	pr_err("ERROR: Nios II " x " different for kernel and DTS\n")
34 
35 static inline u32 fcpu(struct device_node *cpu, const char *n)
36 {
37 	u32 val = 0;
38 
39 	of_property_read_u32(cpu, n, &val);
40 
41 	return val;
42 }
43 
44 void __init setup_cpuinfo(void)
45 {
46 	struct device_node *cpu;
47 	const char *str;
48 	int len;
49 
50 	cpu = of_get_cpu_node(0, NULL);
51 	if (!cpu)
52 		panic("%s: No CPU found in devicetree!\n", __func__);
53 
54 	if (!of_property_read_bool(cpu, "altr,has-initda"))
55 		panic("initda instruction is unimplemented. Please update your "
56 			"hardware system to have more than 4-byte line data "
57 			"cache\n");
58 
59 	cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency");
60 
61 	str = of_get_property(cpu, "altr,implementation", &len);
62 	if (str)
63 		strlcpy(cpuinfo.cpu_impl, str, sizeof(cpuinfo.cpu_impl));
64 	else
65 		strcpy(cpuinfo.cpu_impl, "<unknown>");
66 
67 	cpuinfo.has_div = of_property_read_bool(cpu, "altr,has-div");
68 	cpuinfo.has_mul = of_property_read_bool(cpu, "altr,has-mul");
69 	cpuinfo.has_mulx = of_property_read_bool(cpu, "altr,has-mulx");
70 	cpuinfo.has_bmx = of_property_read_bool(cpu, "altr,has-bmx");
71 	cpuinfo.has_cdx = of_property_read_bool(cpu, "altr,has-cdx");
72 	cpuinfo.mmu = of_property_read_bool(cpu, "altr,has-mmu");
73 
74 	if (IS_ENABLED(CONFIG_NIOS2_HW_DIV_SUPPORT) && !cpuinfo.has_div)
75 		err_cpu("DIV");
76 
77 	if (IS_ENABLED(CONFIG_NIOS2_HW_MUL_SUPPORT) && !cpuinfo.has_mul)
78 		err_cpu("MUL");
79 
80 	if (IS_ENABLED(CONFIG_NIOS2_HW_MULX_SUPPORT) && !cpuinfo.has_mulx)
81 		err_cpu("MULX");
82 
83 	if (IS_ENABLED(CONFIG_NIOS2_BMX_SUPPORT) && !cpuinfo.has_bmx)
84 		err_cpu("BMX");
85 
86 	if (IS_ENABLED(CONFIG_NIOS2_CDX_SUPPORT) && !cpuinfo.has_cdx)
87 		err_cpu("CDX");
88 
89 	cpuinfo.tlb_num_ways = fcpu(cpu, "altr,tlb-num-ways");
90 	if (!cpuinfo.tlb_num_ways)
91 		panic("altr,tlb-num-ways can't be 0. Please check your hardware "
92 			"system\n");
93 	cpuinfo.icache_line_size = fcpu(cpu, "icache-line-size");
94 	cpuinfo.icache_size = fcpu(cpu, "icache-size");
95 	if (CONFIG_NIOS2_ICACHE_SIZE != cpuinfo.icache_size)
96 		pr_warn("Warning: icache size configuration mismatch "
97 		"(0x%x vs 0x%x) of CONFIG_NIOS2_ICACHE_SIZE vs "
98 		"device tree icache-size\n",
99 		CONFIG_NIOS2_ICACHE_SIZE, cpuinfo.icache_size);
100 
101 	cpuinfo.dcache_line_size = fcpu(cpu, "dcache-line-size");
102 	if (CONFIG_NIOS2_DCACHE_LINE_SIZE != cpuinfo.dcache_line_size)
103 		pr_warn("Warning: dcache line size configuration mismatch "
104 		"(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_LINE_SIZE vs "
105 		"device tree dcache-line-size\n",
106 		CONFIG_NIOS2_DCACHE_LINE_SIZE, cpuinfo.dcache_line_size);
107 	cpuinfo.dcache_size = fcpu(cpu, "dcache-size");
108 	if (CONFIG_NIOS2_DCACHE_SIZE != cpuinfo.dcache_size)
109 		pr_warn("Warning: dcache size configuration mismatch "
110 			"(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_SIZE vs "
111 			"device tree dcache-size\n",
112 			CONFIG_NIOS2_DCACHE_SIZE, cpuinfo.dcache_size);
113 
114 	cpuinfo.tlb_pid_num_bits = fcpu(cpu, "altr,pid-num-bits");
115 	cpuinfo.tlb_num_ways_log2 = ilog2(cpuinfo.tlb_num_ways);
116 	cpuinfo.tlb_num_entries = fcpu(cpu, "altr,tlb-num-entries");
117 	cpuinfo.tlb_num_lines = cpuinfo.tlb_num_entries / cpuinfo.tlb_num_ways;
118 	cpuinfo.tlb_ptr_sz = fcpu(cpu, "altr,tlb-ptr-sz");
119 
120 	cpuinfo.reset_addr = fcpu(cpu, "altr,reset-addr");
121 	cpuinfo.exception_addr = fcpu(cpu, "altr,exception-addr");
122 	cpuinfo.fast_tlb_miss_exc_addr = fcpu(cpu, "altr,fast-tlb-miss-addr");
123 
124 	of_node_put(cpu);
125 }
126 
127 #ifdef CONFIG_PROC_FS
128 
129 /*
130  * Get CPU information for use by the procfs.
131  */
132 static int show_cpuinfo(struct seq_file *m, void *v)
133 {
134 	const u32 clockfreq = cpuinfo.cpu_clock_freq;
135 
136 	seq_printf(m,
137 		   "CPU:\t\tNios II/%s\n"
138 		   "REV:\t\t%i\n"
139 		   "MMU:\t\t%s\n"
140 		   "FPU:\t\tnone\n"
141 		   "Clocking:\t%u.%02u MHz\n"
142 		   "BogoMips:\t%lu.%02lu\n"
143 		   "Calibration:\t%lu loops\n",
144 		   cpuinfo.cpu_impl,
145 		   CONFIG_NIOS2_ARCH_REVISION,
146 		   cpuinfo.mmu ? "present" : "none",
147 		   clockfreq / 1000000, (clockfreq / 100000) % 10,
148 		   (loops_per_jiffy * HZ) / 500000,
149 		   ((loops_per_jiffy * HZ) / 5000) % 100,
150 		   (loops_per_jiffy * HZ));
151 
152 	seq_printf(m,
153 		   "HW:\n"
154 		   " MUL:\t\t%s\n"
155 		   " MULX:\t\t%s\n"
156 		   " DIV:\t\t%s\n"
157 		   " BMX:\t\t%s\n"
158 		   " CDX:\t\t%s\n",
159 		   cpuinfo.has_mul ? "yes" : "no",
160 		   cpuinfo.has_mulx ? "yes" : "no",
161 		   cpuinfo.has_div ? "yes" : "no",
162 		   cpuinfo.has_bmx ? "yes" : "no",
163 		   cpuinfo.has_cdx ? "yes" : "no");
164 
165 	seq_printf(m,
166 		   "Icache:\t\t%ukB, line length: %u\n",
167 		   cpuinfo.icache_size >> 10,
168 		   cpuinfo.icache_line_size);
169 
170 	seq_printf(m,
171 		   "Dcache:\t\t%ukB, line length: %u\n",
172 		   cpuinfo.dcache_size >> 10,
173 		   cpuinfo.dcache_line_size);
174 
175 	seq_printf(m,
176 		   "TLB:\t\t%u ways, %u entries, %u PID bits\n",
177 		   cpuinfo.tlb_num_ways,
178 		   cpuinfo.tlb_num_entries,
179 		   cpuinfo.tlb_pid_num_bits);
180 
181 	return 0;
182 }
183 
184 static void *cpuinfo_start(struct seq_file *m, loff_t *pos)
185 {
186 	unsigned long i = *pos;
187 
188 	return i < num_possible_cpus() ? (void *) (i + 1) : NULL;
189 }
190 
191 static void *cpuinfo_next(struct seq_file *m, void *v, loff_t *pos)
192 {
193 	++*pos;
194 	return cpuinfo_start(m, pos);
195 }
196 
197 static void cpuinfo_stop(struct seq_file *m, void *v)
198 {
199 }
200 
201 const struct seq_operations cpuinfo_op = {
202 	.start	= cpuinfo_start,
203 	.next	= cpuinfo_next,
204 	.stop	= cpuinfo_stop,
205 	.show	= show_cpuinfo
206 };
207 
208 #endif /* CONFIG_PROC_FS */
209