1 /* 2 * Toshiba rbtx4927 specific setup 3 * 4 * Author: MontaVista Software, Inc. 5 * source@mvista.com 6 * 7 * Copyright 2001-2002 MontaVista Software Inc. 8 * 9 * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org) 10 * Copyright (C) 2000 RidgeRun, Inc. 11 * Author: RidgeRun, Inc. 12 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com 13 * 14 * Copyright 2001 MontaVista Software Inc. 15 * Author: jsun@mvista.com or jsun@junsun.net 16 * 17 * Copyright 2002 MontaVista Software Inc. 18 * Author: Michael Pruznick, michael_pruznick@mvista.com 19 * 20 * Copyright (C) 2000-2001 Toshiba Corporation 21 * 22 * Copyright (C) 2004 MontaVista Software Inc. 23 * Author: Manish Lachwani, mlachwani@mvista.com 24 * 25 * This program is free software; you can redistribute it and/or modify it 26 * under the terms of the GNU General Public License as published by the 27 * Free Software Foundation; either version 2 of the License, or (at your 28 * option) any later version. 29 * 30 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 31 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 32 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 33 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 34 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 36 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 37 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 38 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 39 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * You should have received a copy of the GNU General Public License along 42 * with this program; if not, write to the Free Software Foundation, Inc., 43 * 675 Mass Ave, Cambridge, MA 02139, USA. 44 */ 45 #include <linux/init.h> 46 #include <linux/kernel.h> 47 #include <linux/types.h> 48 #include <linux/ioport.h> 49 #include <linux/platform_device.h> 50 #include <linux/delay.h> 51 #include <linux/gpio.h> 52 #include <asm/io.h> 53 #include <asm/reboot.h> 54 #include <asm/txx9/generic.h> 55 #include <asm/txx9/pci.h> 56 #include <asm/txx9/rbtx4927.h> 57 #include <asm/txx9/tx4938.h> /* for TX4937 */ 58 59 #ifdef CONFIG_PCI 60 static void __init tx4927_pci_setup(void) 61 { 62 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB); 63 struct pci_controller *c = &txx9_primary_pcic; 64 65 register_pci_controller(c); 66 67 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) 68 txx9_pci_option = 69 (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) | 70 TXX9_PCI_OPT_CLK_66; /* already configured */ 71 72 /* Reset PCI Bus */ 73 writeb(1, rbtx4927_pcireset_addr); 74 /* Reset PCIC */ 75 txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST); 76 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) == 77 TXX9_PCI_OPT_CLK_66) 78 tx4927_pciclk66_setup(); 79 mdelay(10); 80 /* clear PCIC reset */ 81 txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST); 82 writeb(0, rbtx4927_pcireset_addr); 83 iob(); 84 85 tx4927_report_pciclk(); 86 tx4927_pcic_setup(tx4927_pcicptr, c, extarb); 87 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) == 88 TXX9_PCI_OPT_CLK_AUTO && 89 txx9_pci66_check(c, 0, 0)) { 90 /* Reset PCI Bus */ 91 writeb(1, rbtx4927_pcireset_addr); 92 /* Reset PCIC */ 93 txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST); 94 tx4927_pciclk66_setup(); 95 mdelay(10); 96 /* clear PCIC reset */ 97 txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST); 98 writeb(0, rbtx4927_pcireset_addr); 99 iob(); 100 /* Reinitialize PCIC */ 101 tx4927_report_pciclk(); 102 tx4927_pcic_setup(tx4927_pcicptr, c, extarb); 103 } 104 tx4927_setup_pcierr_irq(); 105 } 106 107 static void __init tx4937_pci_setup(void) 108 { 109 int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB); 110 struct pci_controller *c = &txx9_primary_pcic; 111 112 register_pci_controller(c); 113 114 if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) 115 txx9_pci_option = 116 (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) | 117 TXX9_PCI_OPT_CLK_66; /* already configured */ 118 119 /* Reset PCI Bus */ 120 writeb(1, rbtx4927_pcireset_addr); 121 /* Reset PCIC */ 122 txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST); 123 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) == 124 TXX9_PCI_OPT_CLK_66) 125 tx4938_pciclk66_setup(); 126 mdelay(10); 127 /* clear PCIC reset */ 128 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST); 129 writeb(0, rbtx4927_pcireset_addr); 130 iob(); 131 132 tx4938_report_pciclk(); 133 tx4927_pcic_setup(tx4938_pcicptr, c, extarb); 134 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) == 135 TXX9_PCI_OPT_CLK_AUTO && 136 txx9_pci66_check(c, 0, 0)) { 137 /* Reset PCI Bus */ 138 writeb(1, rbtx4927_pcireset_addr); 139 /* Reset PCIC */ 140 txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST); 141 tx4938_pciclk66_setup(); 142 mdelay(10); 143 /* clear PCIC reset */ 144 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST); 145 writeb(0, rbtx4927_pcireset_addr); 146 iob(); 147 /* Reinitialize PCIC */ 148 tx4938_report_pciclk(); 149 tx4927_pcic_setup(tx4938_pcicptr, c, extarb); 150 } 151 tx4938_setup_pcierr_irq(); 152 } 153 154 static void __init rbtx4927_arch_init(void) 155 { 156 tx4927_pci_setup(); 157 } 158 159 static void __init rbtx4937_arch_init(void) 160 { 161 tx4937_pci_setup(); 162 } 163 #else 164 #define rbtx4927_arch_init NULL 165 #define rbtx4937_arch_init NULL 166 #endif /* CONFIG_PCI */ 167 168 static void toshiba_rbtx4927_restart(char *command) 169 { 170 /* enable the s/w reset register */ 171 writeb(1, rbtx4927_softresetlock_addr); 172 173 /* wait for enable to be seen */ 174 while (!(readb(rbtx4927_softresetlock_addr) & 1)) 175 ; 176 177 /* do a s/w reset */ 178 writeb(1, rbtx4927_softreset_addr); 179 180 /* fallback */ 181 (*_machine_halt)(); 182 } 183 184 static void __init rbtx4927_clock_init(void); 185 static void __init rbtx4937_clock_init(void); 186 187 static void __init rbtx4927_mem_setup(void) 188 { 189 char *argptr; 190 191 if (TX4927_REV_PCODE() == 0x4927) { 192 rbtx4927_clock_init(); 193 tx4927_setup(); 194 } else { 195 rbtx4937_clock_init(); 196 tx4938_setup(); 197 } 198 199 _machine_restart = toshiba_rbtx4927_restart; 200 201 #ifdef CONFIG_PCI 202 txx9_alloc_pci_controller(&txx9_primary_pcic, 203 RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE, 204 RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE); 205 txx9_board_pcibios_setup = tx4927_pcibios_setup; 206 #else 207 set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET); 208 #endif 209 210 /* TX4927-SIO DTR on (PIO[15]) */ 211 gpio_request(15, "sio-dtr"); 212 gpio_direction_output(15, 1); 213 gpio_request(0, "led"); 214 gpio_direction_output(0, 1); 215 gpio_request(1, "led"); 216 gpio_direction_output(1, 1); 217 218 tx4927_sio_init(0, 0); 219 #ifdef CONFIG_SERIAL_TXX9_CONSOLE 220 argptr = prom_getcmdline(); 221 if (!strstr(argptr, "console=")) 222 strcat(argptr, " console=ttyS0,38400"); 223 #endif 224 } 225 226 static void __init rbtx4927_clock_init(void) 227 { 228 /* 229 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz. 230 * 231 * For TX4927: 232 * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1). 233 * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5) 234 * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3) 235 * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5) 236 * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6) 237 * i.e. S9[3]: ON (83MHz), OFF (100MHz) 238 */ 239 switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) & 240 TX4927_CCFG_PCIDIVMODE_MASK) { 241 case TX4927_CCFG_PCIDIVMODE_2_5: 242 case TX4927_CCFG_PCIDIVMODE_5: 243 txx9_cpu_clock = 166666666; /* 166MHz */ 244 break; 245 default: 246 txx9_cpu_clock = 200000000; /* 200MHz */ 247 } 248 } 249 250 static void __init rbtx4937_clock_init(void) 251 { 252 /* 253 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz. 254 * 255 * For TX4937: 256 * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1) 257 * PCIDIVMODE[10] is 0. 258 * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8) 259 * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4) 260 * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9) 261 * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5) 262 * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10) 263 * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5) 264 */ 265 switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) & 266 TX4938_CCFG_PCIDIVMODE_MASK) { 267 case TX4938_CCFG_PCIDIVMODE_8: 268 case TX4938_CCFG_PCIDIVMODE_4: 269 txx9_cpu_clock = 266666666; /* 266MHz */ 270 break; 271 case TX4938_CCFG_PCIDIVMODE_9: 272 case TX4938_CCFG_PCIDIVMODE_4_5: 273 txx9_cpu_clock = 300000000; /* 300MHz */ 274 break; 275 default: 276 txx9_cpu_clock = 333333333; /* 333MHz */ 277 } 278 } 279 280 static void __init rbtx4927_time_init(void) 281 { 282 tx4927_time_init(0); 283 } 284 285 static void __init toshiba_rbtx4927_rtc_init(void) 286 { 287 struct resource res = { 288 .start = RBTX4927_BRAMRTC_BASE - IO_BASE, 289 .end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1, 290 .flags = IORESOURCE_MEM, 291 }; 292 platform_device_register_simple("rtc-ds1742", -1, &res, 1); 293 } 294 295 static void __init rbtx4927_ne_init(void) 296 { 297 struct resource res[] = { 298 { 299 .start = RBTX4927_RTL_8019_BASE, 300 .end = RBTX4927_RTL_8019_BASE + 0x20 - 1, 301 .flags = IORESOURCE_IO, 302 }, { 303 .start = RBTX4927_RTL_8019_IRQ, 304 .flags = IORESOURCE_IRQ, 305 } 306 }; 307 platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res)); 308 } 309 310 static void __init rbtx4927_mtd_init(void) 311 { 312 int i; 313 314 for (i = 0; i < 2; i++) 315 tx4927_mtd_init(i); 316 } 317 318 static void __init rbtx4927_device_init(void) 319 { 320 toshiba_rbtx4927_rtc_init(); 321 rbtx4927_ne_init(); 322 tx4927_wdt_init(); 323 rbtx4927_mtd_init(); 324 txx9_iocled_init(RBTX4927_LED_ADDR - IO_BASE, -1, 3, 1, "green", NULL); 325 } 326 327 struct txx9_board_vec rbtx4927_vec __initdata = { 328 .system = "Toshiba RBTX4927", 329 .prom_init = rbtx4927_prom_init, 330 .mem_setup = rbtx4927_mem_setup, 331 .irq_setup = rbtx4927_irq_setup, 332 .time_init = rbtx4927_time_init, 333 .device_init = rbtx4927_device_init, 334 .arch_init = rbtx4927_arch_init, 335 #ifdef CONFIG_PCI 336 .pci_map_irq = rbtx4927_pci_map_irq, 337 #endif 338 }; 339 struct txx9_board_vec rbtx4937_vec __initdata = { 340 .system = "Toshiba RBTX4937", 341 .prom_init = rbtx4927_prom_init, 342 .mem_setup = rbtx4927_mem_setup, 343 .irq_setup = rbtx4927_irq_setup, 344 .time_init = rbtx4927_time_init, 345 .device_init = rbtx4927_device_init, 346 .arch_init = rbtx4937_arch_init, 347 #ifdef CONFIG_PCI 348 .pci_map_irq = rbtx4927_pci_map_irq, 349 #endif 350 }; 351