xref: /openbmc/linux/arch/mips/txx9/rbtx4927/irq.c (revision f89d416a)
1 /*
2  * Toshiba RBTX4927 specific interrupt handlers
3  *
4  * Author: MontaVista Software, Inc.
5  *	   source@mvista.com
6  *
7  * Copyright 2001-2002 MontaVista Software Inc.
8  *
9  *  This program is free software; you can redistribute it and/or modify it
10  *  under the terms of the GNU General Public License as published by the
11  *  Free Software Foundation; either version 2 of the License, or (at your
12  *  option) any later version.
13  *
14  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
20  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
21  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
22  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
23  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  *
25  *  You should have received a copy of the GNU General Public License along
26  *  with this program; if not, write to the Free Software Foundation, Inc.,
27  *  675 Mass Ave, Cambridge, MA 02139, USA.
28  */
29 /*
30  * I8259A_IRQ_BASE+00
31  * I8259A_IRQ_BASE+01 PS2/Keyboard
32  * I8259A_IRQ_BASE+02 Cascade RBTX4927-ISA (irqs 8-15)
33  * I8259A_IRQ_BASE+03
34  * I8259A_IRQ_BASE+04
35  * I8259A_IRQ_BASE+05
36  * I8259A_IRQ_BASE+06
37  * I8259A_IRQ_BASE+07
38  * I8259A_IRQ_BASE+08
39  * I8259A_IRQ_BASE+09
40  * I8259A_IRQ_BASE+10
41  * I8259A_IRQ_BASE+11
42  * I8259A_IRQ_BASE+12 PS2/Mouse (not supported at this time)
43  * I8259A_IRQ_BASE+13
44  * I8259A_IRQ_BASE+14 IDE
45  * I8259A_IRQ_BASE+15
46  *
47  * MIPS_CPU_IRQ_BASE+00 Software 0
48  * MIPS_CPU_IRQ_BASE+01 Software 1
49  * MIPS_CPU_IRQ_BASE+02 Cascade TX4927-CP0
50  * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use
51  * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use
52  * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use
53  * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use
54  * MIPS_CPU_IRQ_BASE+07 CPU TIMER
55  *
56  * TXX9_IRQ_BASE+00
57  * TXX9_IRQ_BASE+01
58  * TXX9_IRQ_BASE+02
59  * TXX9_IRQ_BASE+03 Cascade RBTX4927-IOC
60  * TXX9_IRQ_BASE+04
61  * TXX9_IRQ_BASE+05 RBTX4927 RTL-8019AS ethernet
62  * TXX9_IRQ_BASE+06
63  * TXX9_IRQ_BASE+07
64  * TXX9_IRQ_BASE+08 TX4927 SerialIO Channel 0
65  * TXX9_IRQ_BASE+09 TX4927 SerialIO Channel 1
66  * TXX9_IRQ_BASE+10
67  * TXX9_IRQ_BASE+11
68  * TXX9_IRQ_BASE+12
69  * TXX9_IRQ_BASE+13
70  * TXX9_IRQ_BASE+14
71  * TXX9_IRQ_BASE+15
72  * TXX9_IRQ_BASE+16 TX4927 PCI PCI-C
73  * TXX9_IRQ_BASE+17
74  * TXX9_IRQ_BASE+18
75  * TXX9_IRQ_BASE+19
76  * TXX9_IRQ_BASE+20
77  * TXX9_IRQ_BASE+21
78  * TXX9_IRQ_BASE+22 TX4927 PCI PCI-ERR
79  * TXX9_IRQ_BASE+23 TX4927 PCI PCI-PMA (not used)
80  * TXX9_IRQ_BASE+24
81  * TXX9_IRQ_BASE+25
82  * TXX9_IRQ_BASE+26
83  * TXX9_IRQ_BASE+27
84  * TXX9_IRQ_BASE+28
85  * TXX9_IRQ_BASE+29
86  * TXX9_IRQ_BASE+30
87  * TXX9_IRQ_BASE+31
88  *
89  * RBTX4927_IRQ_IOC+00 FPCIB0 PCI-D (SouthBridge)
90  * RBTX4927_IRQ_IOC+01 FPCIB0 PCI-C (SouthBridge)
91  * RBTX4927_IRQ_IOC+02 FPCIB0 PCI-B (SouthBridge/IDE/pin=1,INTR)
92  * RBTX4927_IRQ_IOC+03 FPCIB0 PCI-A (SouthBridge/USB/pin=4)
93  * RBTX4927_IRQ_IOC+04
94  * RBTX4927_IRQ_IOC+05
95  * RBTX4927_IRQ_IOC+06
96  * RBTX4927_IRQ_IOC+07
97  *
98  * NOTES:
99  * SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
100  * SouthBridge/ISA/pin=0 no pci irq used by this device
101  * SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR
102  * via ISA IRQ14
103  * SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
104  * SouthBridge/PMC/pin=0 no pci irq used by this device
105  * SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
106  * SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
107  * JP7 is not bus master -- do NOT use -- only 4 pci bus master's
108  * allowed -- SouthBridge, JP4, JP5, JP6
109  */
110 
111 #include <linux/init.h>
112 #include <linux/types.h>
113 #include <linux/interrupt.h>
114 #include <linux/irq.h>
115 #include <asm/io.h>
116 #include <asm/mipsregs.h>
117 #include <asm/txx9/generic.h>
118 #include <asm/txx9/rbtx4927.h>
119 
120 static int toshiba_rbtx4927_irq_nested(int sw_irq)
121 {
122 	u8 level3;
123 
124 	level3 = readb(rbtx4927_imstat_addr) & 0x1f;
125 	if (unlikely(!level3))
126 		return -1;
127 	return RBTX4927_IRQ_IOC + __fls8(level3);
128 }
129 
130 static void toshiba_rbtx4927_irq_ioc_enable(struct irq_data *d)
131 {
132 	unsigned char v;
133 
134 	v = readb(rbtx4927_imask_addr);
135 	v |= (1 << (d->irq - RBTX4927_IRQ_IOC));
136 	writeb(v, rbtx4927_imask_addr);
137 }
138 
139 static void toshiba_rbtx4927_irq_ioc_disable(struct irq_data *d)
140 {
141 	unsigned char v;
142 
143 	v = readb(rbtx4927_imask_addr);
144 	v &= ~(1 << (d->irq - RBTX4927_IRQ_IOC));
145 	writeb(v, rbtx4927_imask_addr);
146 	mmiowb();
147 }
148 
149 #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
150 static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
151 	.name = TOSHIBA_RBTX4927_IOC_NAME,
152 	.irq_mask = toshiba_rbtx4927_irq_ioc_disable,
153 	.irq_unmask = toshiba_rbtx4927_irq_ioc_enable,
154 };
155 
156 static void __init toshiba_rbtx4927_irq_ioc_init(void)
157 {
158 	int i;
159 
160 	/* mask all IOC interrupts */
161 	writeb(0, rbtx4927_imask_addr);
162 	/* clear SoftInt interrupts */
163 	writeb(0, rbtx4927_softint_addr);
164 
165 	for (i = RBTX4927_IRQ_IOC;
166 	     i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
167 		irq_set_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
168 					 handle_level_irq);
169 	irq_set_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
170 }
171 
172 static int rbtx4927_irq_dispatch(int pending)
173 {
174 	int irq;
175 
176 	if (pending & STATUSF_IP7)			/* cpu timer */
177 		irq = MIPS_CPU_IRQ_BASE + 7;
178 	else if (pending & STATUSF_IP2) {		/* tx4927 pic */
179 		irq = txx9_irq();
180 		if (irq == RBTX4927_IRQ_IOCINT)
181 			irq = toshiba_rbtx4927_irq_nested(irq);
182 	} else if (pending & STATUSF_IP0)		/* user line 0 */
183 		irq = MIPS_CPU_IRQ_BASE + 0;
184 	else if (pending & STATUSF_IP1)			/* user line 1 */
185 		irq = MIPS_CPU_IRQ_BASE + 1;
186 	else
187 		irq = -1;
188 	return irq;
189 }
190 
191 void __init rbtx4927_irq_setup(void)
192 {
193 	txx9_irq_dispatch = rbtx4927_irq_dispatch;
194 	tx4927_irq_init();
195 	toshiba_rbtx4927_irq_ioc_init();
196 	/* Onboard 10M Ether: High Active */
197 	irq_set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
198 }
199