xref: /openbmc/linux/arch/mips/txx9/generic/setup.c (revision f48c8c95)
1 /*
2  * linux/arch/mips/txx9/generic/setup.c
3  *
4  * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
5  *	    and RBTX49xx patch from CELF patch archive.
6  *
7  * 2003-2005 (c) MontaVista Software, Inc.
8  * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
9  *
10  * This file is subject to the terms and conditions of the GNU General Public
11  * License.  See the file "COPYING" in the main directory of this archive
12  * for more details.
13  */
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/string.h>
19 #include <linux/module.h>
20 #include <linux/clk.h>
21 #include <linux/err.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/serial_core.h>
25 #include <linux/mtd/physmap.h>
26 #include <linux/leds.h>
27 #include <asm/bootinfo.h>
28 #include <asm/time.h>
29 #include <asm/reboot.h>
30 #include <asm/r4kcache.h>
31 #include <asm/sections.h>
32 #include <asm/txx9/generic.h>
33 #include <asm/txx9/pci.h>
34 #include <asm/txx9tmr.h>
35 #include <asm/txx9/ndfmc.h>
36 #include <asm/txx9/dmac.h>
37 #ifdef CONFIG_CPU_TX49XX
38 #include <asm/txx9/tx4938.h>
39 #endif
40 
41 /* EBUSC settings of TX4927, etc. */
42 struct resource txx9_ce_res[8];
43 static char txx9_ce_res_name[8][4];	/* "CEn" */
44 
45 /* pcode, internal register */
46 unsigned int txx9_pcode;
47 char txx9_pcode_str[8];
48 static struct resource txx9_reg_res = {
49 	.name = txx9_pcode_str,
50 	.flags = IORESOURCE_MEM,
51 };
52 void __init
53 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
54 {
55 	int i;
56 
57 	for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
58 		sprintf(txx9_ce_res_name[i], "CE%d", i);
59 		txx9_ce_res[i].flags = IORESOURCE_MEM;
60 		txx9_ce_res[i].name = txx9_ce_res_name[i];
61 	}
62 
63 	txx9_pcode = pcode;
64 	sprintf(txx9_pcode_str, "TX%x", pcode);
65 	if (base) {
66 		txx9_reg_res.start = base & 0xfffffffffULL;
67 		txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
68 		request_resource(&iomem_resource, &txx9_reg_res);
69 	}
70 }
71 
72 /* clocks */
73 unsigned int txx9_master_clock;
74 unsigned int txx9_cpu_clock;
75 unsigned int txx9_gbus_clock;
76 
77 #ifdef CONFIG_CPU_TX39XX
78 /* don't enable by default - see errata */
79 int txx9_ccfg_toeon __initdata;
80 #else
81 int txx9_ccfg_toeon __initdata = 1;
82 #endif
83 
84 /* Minimum CLK support */
85 
86 struct clk *clk_get(struct device *dev, const char *id)
87 {
88 	if (!strcmp(id, "spi-baseclk"))
89 		return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
90 	if (!strcmp(id, "imbus_clk"))
91 		return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
92 	return ERR_PTR(-ENOENT);
93 }
94 EXPORT_SYMBOL(clk_get);
95 
96 int clk_enable(struct clk *clk)
97 {
98 	return 0;
99 }
100 EXPORT_SYMBOL(clk_enable);
101 
102 void clk_disable(struct clk *clk)
103 {
104 }
105 EXPORT_SYMBOL(clk_disable);
106 
107 unsigned long clk_get_rate(struct clk *clk)
108 {
109 	return (unsigned long)clk;
110 }
111 EXPORT_SYMBOL(clk_get_rate);
112 
113 void clk_put(struct clk *clk)
114 {
115 }
116 EXPORT_SYMBOL(clk_put);
117 
118 /* GPIO support */
119 
120 #ifdef CONFIG_GENERIC_GPIO
121 int gpio_to_irq(unsigned gpio)
122 {
123 	return -EINVAL;
124 }
125 EXPORT_SYMBOL(gpio_to_irq);
126 
127 int irq_to_gpio(unsigned irq)
128 {
129 	return -EINVAL;
130 }
131 EXPORT_SYMBOL(irq_to_gpio);
132 #endif
133 
134 #define BOARD_VEC(board)	extern struct txx9_board_vec board;
135 #include <asm/txx9/boards.h>
136 #undef BOARD_VEC
137 
138 struct txx9_board_vec *txx9_board_vec __initdata;
139 static char txx9_system_type[32];
140 
141 static struct txx9_board_vec *board_vecs[] __initdata = {
142 #define BOARD_VEC(board)	&board,
143 #include <asm/txx9/boards.h>
144 #undef BOARD_VEC
145 };
146 
147 static struct txx9_board_vec *__init find_board_byname(const char *name)
148 {
149 	int i;
150 
151 	/* search board_vecs table */
152 	for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
153 		if (strstr(board_vecs[i]->system, name))
154 			return board_vecs[i];
155 	}
156 	return NULL;
157 }
158 
159 static void __init prom_init_cmdline(void)
160 {
161 	int argc;
162 	int *argv32;
163 	int i;			/* Always ignore the "-c" at argv[0] */
164 	char builtin[CL_SIZE];
165 
166 	if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
167 		/*
168 		 * argc is not a valid number, or argv32 is not a valid
169 		 * pointer
170 		 */
171 		argc = 0;
172 		argv32 = NULL;
173 	} else {
174 		argc = (int)fw_arg0;
175 		argv32 = (int *)fw_arg1;
176 	}
177 
178 	/* ignore all built-in args if any f/w args given */
179 	/*
180 	 * But if built-in strings was started with '+', append them
181 	 * to command line args.  If built-in was started with '-',
182 	 * ignore all f/w args.
183 	 */
184 	builtin[0] = '\0';
185 	if (arcs_cmdline[0] == '+')
186 		strcpy(builtin, arcs_cmdline + 1);
187 	else if (arcs_cmdline[0] == '-') {
188 		strcpy(builtin, arcs_cmdline + 1);
189 		argc = 0;
190 	} else if (argc <= 1)
191 		strcpy(builtin, arcs_cmdline);
192 	arcs_cmdline[0] = '\0';
193 
194 	for (i = 1; i < argc; i++) {
195 		char *str = (char *)(long)argv32[i];
196 		if (i != 1)
197 			strcat(arcs_cmdline, " ");
198 		if (strchr(str, ' ')) {
199 			strcat(arcs_cmdline, "\"");
200 			strcat(arcs_cmdline, str);
201 			strcat(arcs_cmdline, "\"");
202 		} else
203 			strcat(arcs_cmdline, str);
204 	}
205 	/* append saved builtin args */
206 	if (builtin[0]) {
207 		if (arcs_cmdline[0])
208 			strcat(arcs_cmdline, " ");
209 		strcat(arcs_cmdline, builtin);
210 	}
211 }
212 
213 static int txx9_ic_disable __initdata;
214 static int txx9_dc_disable __initdata;
215 
216 #if defined(CONFIG_CPU_TX49XX)
217 /* flush all cache on very early stage (before 4k_cache_init) */
218 static void __init early_flush_dcache(void)
219 {
220 	unsigned int conf = read_c0_config();
221 	unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
222 	unsigned int linesz = 32;
223 	unsigned long addr, end;
224 
225 	end = INDEX_BASE + dc_size / 4;
226 	/* 4way, waybit=0 */
227 	for (addr = INDEX_BASE; addr < end; addr += linesz) {
228 		cache_op(Index_Writeback_Inv_D, addr | 0);
229 		cache_op(Index_Writeback_Inv_D, addr | 1);
230 		cache_op(Index_Writeback_Inv_D, addr | 2);
231 		cache_op(Index_Writeback_Inv_D, addr | 3);
232 	}
233 }
234 
235 static void __init txx9_cache_fixup(void)
236 {
237 	unsigned int conf;
238 
239 	conf = read_c0_config();
240 	/* flush and disable */
241 	if (txx9_ic_disable) {
242 		conf |= TX49_CONF_IC;
243 		write_c0_config(conf);
244 	}
245 	if (txx9_dc_disable) {
246 		early_flush_dcache();
247 		conf |= TX49_CONF_DC;
248 		write_c0_config(conf);
249 	}
250 
251 	/* enable cache */
252 	conf = read_c0_config();
253 	if (!txx9_ic_disable)
254 		conf &= ~TX49_CONF_IC;
255 	if (!txx9_dc_disable)
256 		conf &= ~TX49_CONF_DC;
257 	write_c0_config(conf);
258 
259 	if (conf & TX49_CONF_IC)
260 		pr_info("TX49XX I-Cache disabled.\n");
261 	if (conf & TX49_CONF_DC)
262 		pr_info("TX49XX D-Cache disabled.\n");
263 }
264 #elif defined(CONFIG_CPU_TX39XX)
265 /* flush all cache on very early stage (before tx39_cache_init) */
266 static void __init early_flush_dcache(void)
267 {
268 	unsigned int conf = read_c0_config();
269 	unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
270 					   TX39_CONF_DCS_SHIFT));
271 	unsigned int linesz = 16;
272 	unsigned long addr, end;
273 
274 	end = INDEX_BASE + dc_size / 2;
275 	/* 2way, waybit=0 */
276 	for (addr = INDEX_BASE; addr < end; addr += linesz) {
277 		cache_op(Index_Writeback_Inv_D, addr | 0);
278 		cache_op(Index_Writeback_Inv_D, addr | 1);
279 	}
280 }
281 
282 static void __init txx9_cache_fixup(void)
283 {
284 	unsigned int conf;
285 
286 	conf = read_c0_config();
287 	/* flush and disable */
288 	if (txx9_ic_disable) {
289 		conf &= ~TX39_CONF_ICE;
290 		write_c0_config(conf);
291 	}
292 	if (txx9_dc_disable) {
293 		early_flush_dcache();
294 		conf &= ~TX39_CONF_DCE;
295 		write_c0_config(conf);
296 	}
297 
298 	/* enable cache */
299 	conf = read_c0_config();
300 	if (!txx9_ic_disable)
301 		conf |= TX39_CONF_ICE;
302 	if (!txx9_dc_disable)
303 		conf |= TX39_CONF_DCE;
304 	write_c0_config(conf);
305 
306 	if (!(conf & TX39_CONF_ICE))
307 		pr_info("TX39XX I-Cache disabled.\n");
308 	if (!(conf & TX39_CONF_DCE))
309 		pr_info("TX39XX D-Cache disabled.\n");
310 }
311 #else
312 static inline void txx9_cache_fixup(void)
313 {
314 }
315 #endif
316 
317 static void __init preprocess_cmdline(void)
318 {
319 	char cmdline[CL_SIZE];
320 	char *s;
321 
322 	strcpy(cmdline, arcs_cmdline);
323 	s = cmdline;
324 	arcs_cmdline[0] = '\0';
325 	while (s && *s) {
326 		char *str = strsep(&s, " ");
327 		if (strncmp(str, "board=", 6) == 0) {
328 			txx9_board_vec = find_board_byname(str + 6);
329 			continue;
330 		} else if (strncmp(str, "masterclk=", 10) == 0) {
331 			unsigned long val;
332 			if (strict_strtoul(str + 10, 10, &val) == 0)
333 				txx9_master_clock = val;
334 			continue;
335 		} else if (strcmp(str, "icdisable") == 0) {
336 			txx9_ic_disable = 1;
337 			continue;
338 		} else if (strcmp(str, "dcdisable") == 0) {
339 			txx9_dc_disable = 1;
340 			continue;
341 		} else if (strcmp(str, "toeoff") == 0) {
342 			txx9_ccfg_toeon = 0;
343 			continue;
344 		} else if (strcmp(str, "toeon") == 0) {
345 			txx9_ccfg_toeon = 1;
346 			continue;
347 		}
348 		if (arcs_cmdline[0])
349 			strcat(arcs_cmdline, " ");
350 		strcat(arcs_cmdline, str);
351 	}
352 
353 	txx9_cache_fixup();
354 }
355 
356 static void __init select_board(void)
357 {
358 	const char *envstr;
359 
360 	/* first, determine by "board=" argument in preprocess_cmdline() */
361 	if (txx9_board_vec)
362 		return;
363 	/* next, determine by "board" envvar */
364 	envstr = prom_getenv("board");
365 	if (envstr) {
366 		txx9_board_vec = find_board_byname(envstr);
367 		if (txx9_board_vec)
368 			return;
369 	}
370 
371 	/* select "default" board */
372 #ifdef CONFIG_CPU_TX39XX
373 	txx9_board_vec = &jmr3927_vec;
374 #endif
375 #ifdef CONFIG_CPU_TX49XX
376 	switch (TX4938_REV_PCODE()) {
377 #ifdef CONFIG_TOSHIBA_RBTX4927
378 	case 0x4927:
379 		txx9_board_vec = &rbtx4927_vec;
380 		break;
381 	case 0x4937:
382 		txx9_board_vec = &rbtx4937_vec;
383 		break;
384 #endif
385 #ifdef CONFIG_TOSHIBA_RBTX4938
386 	case 0x4938:
387 		txx9_board_vec = &rbtx4938_vec;
388 		break;
389 #endif
390 #ifdef CONFIG_TOSHIBA_RBTX4939
391 	case 0x4939:
392 		txx9_board_vec = &rbtx4939_vec;
393 		break;
394 #endif
395 	}
396 #endif
397 }
398 
399 void __init prom_init(void)
400 {
401 	prom_init_cmdline();
402 	preprocess_cmdline();
403 	select_board();
404 
405 	strcpy(txx9_system_type, txx9_board_vec->system);
406 
407 	txx9_board_vec->prom_init();
408 }
409 
410 void __init prom_free_prom_memory(void)
411 {
412 	unsigned long saddr = PAGE_SIZE;
413 	unsigned long eaddr = __pa_symbol(&_text);
414 
415 	if (saddr < eaddr)
416 		free_init_pages("prom memory", saddr, eaddr);
417 }
418 
419 const char *get_system_type(void)
420 {
421 	return txx9_system_type;
422 }
423 
424 char * __init prom_getcmdline(void)
425 {
426 	return &(arcs_cmdline[0]);
427 }
428 
429 const char *__init prom_getenv(const char *name)
430 {
431 	const s32 *str;
432 
433 	if (fw_arg2 < CKSEG0)
434 		return NULL;
435 
436 	str = (const s32 *)fw_arg2;
437 	/* YAMON style ("name", "value" pairs) */
438 	while (str[0] && str[1]) {
439 		if (!strcmp((const char *)(unsigned long)str[0], name))
440 			return (const char *)(unsigned long)str[1];
441 		str += 2;
442 	}
443 	return NULL;
444 }
445 
446 static void __noreturn txx9_machine_halt(void)
447 {
448 	local_irq_disable();
449 	clear_c0_status(ST0_IM);
450 	while (1) {
451 		if (cpu_wait) {
452 			(*cpu_wait)();
453 			if (cpu_has_counter) {
454 				/*
455 				 * Clear counter interrupt while it
456 				 * breaks WAIT instruction even if
457 				 * masked.
458 				 */
459 				write_c0_compare(0);
460 			}
461 		}
462 	}
463 }
464 
465 /* Watchdog support */
466 void __init txx9_wdt_init(unsigned long base)
467 {
468 	struct resource res = {
469 		.start	= base,
470 		.end	= base + 0x100 - 1,
471 		.flags	= IORESOURCE_MEM,
472 	};
473 	platform_device_register_simple("txx9wdt", -1, &res, 1);
474 }
475 
476 void txx9_wdt_now(unsigned long base)
477 {
478 	struct txx9_tmr_reg __iomem *tmrptr =
479 		ioremap(base, sizeof(struct txx9_tmr_reg));
480 	/* disable watch dog timer */
481 	__raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
482 	__raw_writel(0, &tmrptr->tcr);
483 	/* kick watchdog */
484 	__raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
485 	__raw_writel(1, &tmrptr->cpra); /* immediate */
486 	__raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
487 		     &tmrptr->tcr);
488 }
489 
490 /* SPI support */
491 void __init txx9_spi_init(int busid, unsigned long base, int irq)
492 {
493 	struct resource res[] = {
494 		{
495 			.start	= base,
496 			.end	= base + 0x20 - 1,
497 			.flags	= IORESOURCE_MEM,
498 		}, {
499 			.start	= irq,
500 			.flags	= IORESOURCE_IRQ,
501 		},
502 	};
503 	platform_device_register_simple("spi_txx9", busid,
504 					res, ARRAY_SIZE(res));
505 }
506 
507 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
508 {
509 	struct platform_device *pdev =
510 		platform_device_alloc("tc35815-mac", id);
511 	if (!pdev ||
512 	    platform_device_add_data(pdev, ethaddr, 6) ||
513 	    platform_device_add(pdev))
514 		platform_device_put(pdev);
515 }
516 
517 void __init txx9_sio_init(unsigned long baseaddr, int irq,
518 			  unsigned int line, unsigned int sclk, int nocts)
519 {
520 #ifdef CONFIG_SERIAL_TXX9
521 	struct uart_port req;
522 
523 	memset(&req, 0, sizeof(req));
524 	req.line = line;
525 	req.iotype = UPIO_MEM;
526 	req.membase = ioremap(baseaddr, 0x24);
527 	req.mapbase = baseaddr;
528 	req.irq = irq;
529 	if (!nocts)
530 		req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
531 	if (sclk) {
532 		req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
533 		req.uartclk = sclk;
534 	} else
535 		req.uartclk = TXX9_IMCLK;
536 	early_serial_txx9_setup(&req);
537 #endif /* CONFIG_SERIAL_TXX9 */
538 }
539 
540 #ifdef CONFIG_EARLY_PRINTK
541 static void __init null_prom_putchar(char c)
542 {
543 }
544 void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
545 
546 void __init prom_putchar(char c)
547 {
548 	txx9_prom_putchar(c);
549 }
550 
551 static void __iomem *early_txx9_sio_port;
552 
553 static void __init early_txx9_sio_putchar(char c)
554 {
555 #define TXX9_SICISR	0x0c
556 #define TXX9_SITFIFO	0x1c
557 #define TXX9_SICISR_TXALS	0x00000002
558 	while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
559 		 TXX9_SICISR_TXALS))
560 		;
561 	__raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
562 }
563 
564 void __init txx9_sio_putchar_init(unsigned long baseaddr)
565 {
566 	early_txx9_sio_port = ioremap(baseaddr, 0x24);
567 	txx9_prom_putchar = early_txx9_sio_putchar;
568 }
569 #endif /* CONFIG_EARLY_PRINTK */
570 
571 /* wrappers */
572 void __init plat_mem_setup(void)
573 {
574 	ioport_resource.start = 0;
575 	ioport_resource.end = ~0UL;	/* no limit */
576 	iomem_resource.start = 0;
577 	iomem_resource.end = ~0UL;	/* no limit */
578 
579 	/* fallback restart/halt routines */
580 	_machine_restart = (void (*)(char *))txx9_machine_halt;
581 	_machine_halt = txx9_machine_halt;
582 	pm_power_off = txx9_machine_halt;
583 
584 #ifdef CONFIG_PCI
585 	pcibios_plat_setup = txx9_pcibios_setup;
586 #endif
587 	txx9_board_vec->mem_setup();
588 }
589 
590 void __init arch_init_irq(void)
591 {
592 	txx9_board_vec->irq_setup();
593 }
594 
595 void __init plat_time_init(void)
596 {
597 #ifdef CONFIG_CPU_TX49XX
598 	mips_hpt_frequency = txx9_cpu_clock / 2;
599 #endif
600 	txx9_board_vec->time_init();
601 }
602 
603 static int __init _txx9_arch_init(void)
604 {
605 	if (txx9_board_vec->arch_init)
606 		txx9_board_vec->arch_init();
607 	return 0;
608 }
609 arch_initcall(_txx9_arch_init);
610 
611 static int __init _txx9_device_init(void)
612 {
613 	if (txx9_board_vec->device_init)
614 		txx9_board_vec->device_init();
615 	return 0;
616 }
617 device_initcall(_txx9_device_init);
618 
619 int (*txx9_irq_dispatch)(int pending);
620 asmlinkage void plat_irq_dispatch(void)
621 {
622 	int pending = read_c0_status() & read_c0_cause() & ST0_IM;
623 	int irq = txx9_irq_dispatch(pending);
624 
625 	if (likely(irq >= 0))
626 		do_IRQ(irq);
627 	else
628 		spurious_interrupt();
629 }
630 
631 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
632 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
633 static unsigned long __swizzle_addr_none(unsigned long port)
634 {
635 	return port;
636 }
637 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
638 EXPORT_SYMBOL(__swizzle_addr_b);
639 #endif
640 
641 #ifdef NEEDS_TXX9_IOSWABW
642 static u16 ioswabw_default(volatile u16 *a, u16 x)
643 {
644 	return le16_to_cpu(x);
645 }
646 static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
647 {
648 	return x;
649 }
650 u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
651 EXPORT_SYMBOL(ioswabw);
652 u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
653 EXPORT_SYMBOL(__mem_ioswabw);
654 #endif
655 
656 void __init txx9_physmap_flash_init(int no, unsigned long addr,
657 				    unsigned long size,
658 				    const struct physmap_flash_data *pdata)
659 {
660 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
661 	struct resource res = {
662 		.start = addr,
663 		.end = addr + size - 1,
664 		.flags = IORESOURCE_MEM,
665 	};
666 	struct platform_device *pdev;
667 #ifdef CONFIG_MTD_PARTITIONS
668 	static struct mtd_partition parts[2];
669 	struct physmap_flash_data pdata_part;
670 
671 	/* If this area contained boot area, make separate partition */
672 	if (pdata->nr_parts == 0 && !pdata->parts &&
673 	    addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
674 	    !parts[0].name) {
675 		parts[0].name = "boot";
676 		parts[0].offset = 0x1fc00000 - addr;
677 		parts[0].size = addr + size - 0x1fc00000;
678 		parts[1].name = "user";
679 		parts[1].offset = 0;
680 		parts[1].size = 0x1fc00000 - addr;
681 		pdata_part = *pdata;
682 		pdata_part.nr_parts = ARRAY_SIZE(parts);
683 		pdata_part.parts = parts;
684 		pdata = &pdata_part;
685 	}
686 #endif
687 	pdev = platform_device_alloc("physmap-flash", no);
688 	if (!pdev ||
689 	    platform_device_add_resources(pdev, &res, 1) ||
690 	    platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
691 	    platform_device_add(pdev))
692 		platform_device_put(pdev);
693 #endif
694 }
695 
696 void __init txx9_ndfmc_init(unsigned long baseaddr,
697 			    const struct txx9ndfmc_platform_data *pdata)
698 {
699 #if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \
700 	defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE)
701 	struct resource res = {
702 		.start = baseaddr,
703 		.end = baseaddr + 0x1000 - 1,
704 		.flags = IORESOURCE_MEM,
705 	};
706 	struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
707 
708 	if (!pdev ||
709 	    platform_device_add_resources(pdev, &res, 1) ||
710 	    platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
711 	    platform_device_add(pdev))
712 		platform_device_put(pdev);
713 #endif
714 }
715 
716 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
717 static DEFINE_SPINLOCK(txx9_iocled_lock);
718 
719 #define TXX9_IOCLED_MAXLEDS 8
720 
721 struct txx9_iocled_data {
722 	struct gpio_chip chip;
723 	u8 cur_val;
724 	void __iomem *mmioaddr;
725 	struct gpio_led_platform_data pdata;
726 	struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
727 	char names[TXX9_IOCLED_MAXLEDS][32];
728 };
729 
730 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
731 {
732 	struct txx9_iocled_data *data =
733 		container_of(chip, struct txx9_iocled_data, chip);
734 	return data->cur_val & (1 << offset);
735 }
736 
737 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
738 			    int value)
739 {
740 	struct txx9_iocled_data *data =
741 		container_of(chip, struct txx9_iocled_data, chip);
742 	unsigned long flags;
743 	spin_lock_irqsave(&txx9_iocled_lock, flags);
744 	if (value)
745 		data->cur_val |= 1 << offset;
746 	else
747 		data->cur_val &= ~(1 << offset);
748 	writeb(data->cur_val, data->mmioaddr);
749 	mmiowb();
750 	spin_unlock_irqrestore(&txx9_iocled_lock, flags);
751 }
752 
753 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
754 {
755 	return 0;
756 }
757 
758 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
759 			       int value)
760 {
761 	txx9_iocled_set(chip, offset, value);
762 	return 0;
763 }
764 
765 void __init txx9_iocled_init(unsigned long baseaddr,
766 			     int basenum, unsigned int num, int lowactive,
767 			     const char *color, char **deftriggers)
768 {
769 	struct txx9_iocled_data *iocled;
770 	struct platform_device *pdev;
771 	int i;
772 	static char *default_triggers[] __initdata = {
773 		"heartbeat",
774 		"ide-disk",
775 		"nand-disk",
776 		NULL,
777 	};
778 
779 	if (!deftriggers)
780 		deftriggers = default_triggers;
781 	iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
782 	if (!iocled)
783 		return;
784 	iocled->mmioaddr = ioremap(baseaddr, 1);
785 	if (!iocled->mmioaddr)
786 		return;
787 	iocled->chip.get = txx9_iocled_get;
788 	iocled->chip.set = txx9_iocled_set;
789 	iocled->chip.direction_input = txx9_iocled_dir_in;
790 	iocled->chip.direction_output = txx9_iocled_dir_out;
791 	iocled->chip.label = "iocled";
792 	iocled->chip.base = basenum;
793 	iocled->chip.ngpio = num;
794 	if (gpiochip_add(&iocled->chip))
795 		return;
796 	if (basenum < 0)
797 		basenum = iocled->chip.base;
798 
799 	pdev = platform_device_alloc("leds-gpio", basenum);
800 	if (!pdev)
801 		return;
802 	iocled->pdata.num_leds = num;
803 	iocled->pdata.leds = iocled->leds;
804 	for (i = 0; i < num; i++) {
805 		struct gpio_led *led = &iocled->leds[i];
806 		snprintf(iocled->names[i], sizeof(iocled->names[i]),
807 			 "iocled:%s:%u", color, i);
808 		led->name = iocled->names[i];
809 		led->gpio = basenum + i;
810 		led->active_low = lowactive;
811 		if (deftriggers && *deftriggers)
812 			led->default_trigger = *deftriggers++;
813 	}
814 	pdev->dev.platform_data = &iocled->pdata;
815 	if (platform_device_add(pdev))
816 		platform_device_put(pdev);
817 }
818 #else /* CONFIG_LEDS_GPIO */
819 void __init txx9_iocled_init(unsigned long baseaddr,
820 			     int basenum, unsigned int num, int lowactive,
821 			     const char *color, char **deftriggers)
822 {
823 }
824 #endif /* CONFIG_LEDS_GPIO */
825 
826 void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
827 			   const struct txx9dmac_platform_data *pdata)
828 {
829 #if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE)
830 	struct resource res[] = {
831 		{
832 			.start = baseaddr,
833 			.end = baseaddr + 0x800 - 1,
834 			.flags = IORESOURCE_MEM,
835 #ifndef CONFIG_MACH_TX49XX
836 		}, {
837 			.start = irq,
838 			.flags = IORESOURCE_IRQ,
839 #endif
840 		}
841 	};
842 #ifdef CONFIG_MACH_TX49XX
843 	struct resource chan_res[] = {
844 		{
845 			.flags = IORESOURCE_IRQ,
846 		}
847 	};
848 #endif
849 	struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
850 	struct txx9dmac_chan_platform_data cpdata;
851 	int i;
852 
853 	if (!pdev ||
854 	    platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
855 	    platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
856 	    platform_device_add(pdev)) {
857 		platform_device_put(pdev);
858 		return;
859 	}
860 	memset(&cpdata, 0, sizeof(cpdata));
861 	cpdata.dmac_dev = pdev;
862 	for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
863 #ifdef CONFIG_MACH_TX49XX
864 		chan_res[0].start = irq + i;
865 #endif
866 		pdev = platform_device_alloc("txx9dmac-chan",
867 					     id * TXX9_DMA_MAX_NR_CHANNELS + i);
868 		if (!pdev ||
869 #ifdef CONFIG_MACH_TX49XX
870 		    platform_device_add_resources(pdev, chan_res,
871 						  ARRAY_SIZE(chan_res)) ||
872 #endif
873 		    platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
874 		    platform_device_add(pdev))
875 			platform_device_put(pdev);
876 	}
877 #endif
878 }
879