xref: /openbmc/linux/arch/mips/txx9/generic/setup.c (revision c3b28ae2)
1 /*
2  * linux/arch/mips/txx9/generic/setup.c
3  *
4  * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
5  *	    and RBTX49xx patch from CELF patch archive.
6  *
7  * 2003-2005 (c) MontaVista Software, Inc.
8  * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
9  *
10  * This file is subject to the terms and conditions of the GNU General Public
11  * License.  See the file "COPYING" in the main directory of this archive
12  * for more details.
13  */
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/string.h>
19 #include <linux/module.h>
20 #include <linux/clk.h>
21 #include <linux/err.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/serial_core.h>
25 #include <linux/mtd/physmap.h>
26 #include <linux/leds.h>
27 #include <linux/sysdev.h>
28 #include <asm/bootinfo.h>
29 #include <asm/time.h>
30 #include <asm/reboot.h>
31 #include <asm/r4kcache.h>
32 #include <asm/sections.h>
33 #include <asm/txx9/generic.h>
34 #include <asm/txx9/pci.h>
35 #include <asm/txx9tmr.h>
36 #include <asm/txx9/ndfmc.h>
37 #include <asm/txx9/dmac.h>
38 #ifdef CONFIG_CPU_TX49XX
39 #include <asm/txx9/tx4938.h>
40 #endif
41 
42 /* EBUSC settings of TX4927, etc. */
43 struct resource txx9_ce_res[8];
44 static char txx9_ce_res_name[8][4];	/* "CEn" */
45 
46 /* pcode, internal register */
47 unsigned int txx9_pcode;
48 char txx9_pcode_str[8];
49 static struct resource txx9_reg_res = {
50 	.name = txx9_pcode_str,
51 	.flags = IORESOURCE_MEM,
52 };
53 void __init
54 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
55 {
56 	int i;
57 
58 	for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
59 		sprintf(txx9_ce_res_name[i], "CE%d", i);
60 		txx9_ce_res[i].flags = IORESOURCE_MEM;
61 		txx9_ce_res[i].name = txx9_ce_res_name[i];
62 	}
63 
64 	txx9_pcode = pcode;
65 	sprintf(txx9_pcode_str, "TX%x", pcode);
66 	if (base) {
67 		txx9_reg_res.start = base & 0xfffffffffULL;
68 		txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
69 		request_resource(&iomem_resource, &txx9_reg_res);
70 	}
71 }
72 
73 /* clocks */
74 unsigned int txx9_master_clock;
75 unsigned int txx9_cpu_clock;
76 unsigned int txx9_gbus_clock;
77 
78 #ifdef CONFIG_CPU_TX39XX
79 /* don't enable by default - see errata */
80 int txx9_ccfg_toeon __initdata;
81 #else
82 int txx9_ccfg_toeon __initdata = 1;
83 #endif
84 
85 /* Minimum CLK support */
86 
87 struct clk *clk_get(struct device *dev, const char *id)
88 {
89 	if (!strcmp(id, "spi-baseclk"))
90 		return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
91 	if (!strcmp(id, "imbus_clk"))
92 		return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
93 	return ERR_PTR(-ENOENT);
94 }
95 EXPORT_SYMBOL(clk_get);
96 
97 int clk_enable(struct clk *clk)
98 {
99 	return 0;
100 }
101 EXPORT_SYMBOL(clk_enable);
102 
103 void clk_disable(struct clk *clk)
104 {
105 }
106 EXPORT_SYMBOL(clk_disable);
107 
108 unsigned long clk_get_rate(struct clk *clk)
109 {
110 	return (unsigned long)clk;
111 }
112 EXPORT_SYMBOL(clk_get_rate);
113 
114 void clk_put(struct clk *clk)
115 {
116 }
117 EXPORT_SYMBOL(clk_put);
118 
119 /* GPIO support */
120 
121 #ifdef CONFIG_GENERIC_GPIO
122 int gpio_to_irq(unsigned gpio)
123 {
124 	return -EINVAL;
125 }
126 EXPORT_SYMBOL(gpio_to_irq);
127 
128 int irq_to_gpio(unsigned irq)
129 {
130 	return -EINVAL;
131 }
132 EXPORT_SYMBOL(irq_to_gpio);
133 #endif
134 
135 #define BOARD_VEC(board)	extern struct txx9_board_vec board;
136 #include <asm/txx9/boards.h>
137 #undef BOARD_VEC
138 
139 struct txx9_board_vec *txx9_board_vec __initdata;
140 static char txx9_system_type[32];
141 
142 static struct txx9_board_vec *board_vecs[] __initdata = {
143 #define BOARD_VEC(board)	&board,
144 #include <asm/txx9/boards.h>
145 #undef BOARD_VEC
146 };
147 
148 static struct txx9_board_vec *__init find_board_byname(const char *name)
149 {
150 	int i;
151 
152 	/* search board_vecs table */
153 	for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
154 		if (strstr(board_vecs[i]->system, name))
155 			return board_vecs[i];
156 	}
157 	return NULL;
158 }
159 
160 static void __init prom_init_cmdline(void)
161 {
162 	int argc;
163 	int *argv32;
164 	int i;			/* Always ignore the "-c" at argv[0] */
165 	char builtin[CL_SIZE];
166 
167 	if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
168 		/*
169 		 * argc is not a valid number, or argv32 is not a valid
170 		 * pointer
171 		 */
172 		argc = 0;
173 		argv32 = NULL;
174 	} else {
175 		argc = (int)fw_arg0;
176 		argv32 = (int *)fw_arg1;
177 	}
178 
179 	/* ignore all built-in args if any f/w args given */
180 	/*
181 	 * But if built-in strings was started with '+', append them
182 	 * to command line args.  If built-in was started with '-',
183 	 * ignore all f/w args.
184 	 */
185 	builtin[0] = '\0';
186 	if (arcs_cmdline[0] == '+')
187 		strcpy(builtin, arcs_cmdline + 1);
188 	else if (arcs_cmdline[0] == '-') {
189 		strcpy(builtin, arcs_cmdline + 1);
190 		argc = 0;
191 	} else if (argc <= 1)
192 		strcpy(builtin, arcs_cmdline);
193 	arcs_cmdline[0] = '\0';
194 
195 	for (i = 1; i < argc; i++) {
196 		char *str = (char *)(long)argv32[i];
197 		if (i != 1)
198 			strcat(arcs_cmdline, " ");
199 		if (strchr(str, ' ')) {
200 			strcat(arcs_cmdline, "\"");
201 			strcat(arcs_cmdline, str);
202 			strcat(arcs_cmdline, "\"");
203 		} else
204 			strcat(arcs_cmdline, str);
205 	}
206 	/* append saved builtin args */
207 	if (builtin[0]) {
208 		if (arcs_cmdline[0])
209 			strcat(arcs_cmdline, " ");
210 		strcat(arcs_cmdline, builtin);
211 	}
212 }
213 
214 static int txx9_ic_disable __initdata;
215 static int txx9_dc_disable __initdata;
216 
217 #if defined(CONFIG_CPU_TX49XX)
218 /* flush all cache on very early stage (before 4k_cache_init) */
219 static void __init early_flush_dcache(void)
220 {
221 	unsigned int conf = read_c0_config();
222 	unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
223 	unsigned int linesz = 32;
224 	unsigned long addr, end;
225 
226 	end = INDEX_BASE + dc_size / 4;
227 	/* 4way, waybit=0 */
228 	for (addr = INDEX_BASE; addr < end; addr += linesz) {
229 		cache_op(Index_Writeback_Inv_D, addr | 0);
230 		cache_op(Index_Writeback_Inv_D, addr | 1);
231 		cache_op(Index_Writeback_Inv_D, addr | 2);
232 		cache_op(Index_Writeback_Inv_D, addr | 3);
233 	}
234 }
235 
236 static void __init txx9_cache_fixup(void)
237 {
238 	unsigned int conf;
239 
240 	conf = read_c0_config();
241 	/* flush and disable */
242 	if (txx9_ic_disable) {
243 		conf |= TX49_CONF_IC;
244 		write_c0_config(conf);
245 	}
246 	if (txx9_dc_disable) {
247 		early_flush_dcache();
248 		conf |= TX49_CONF_DC;
249 		write_c0_config(conf);
250 	}
251 
252 	/* enable cache */
253 	conf = read_c0_config();
254 	if (!txx9_ic_disable)
255 		conf &= ~TX49_CONF_IC;
256 	if (!txx9_dc_disable)
257 		conf &= ~TX49_CONF_DC;
258 	write_c0_config(conf);
259 
260 	if (conf & TX49_CONF_IC)
261 		pr_info("TX49XX I-Cache disabled.\n");
262 	if (conf & TX49_CONF_DC)
263 		pr_info("TX49XX D-Cache disabled.\n");
264 }
265 #elif defined(CONFIG_CPU_TX39XX)
266 /* flush all cache on very early stage (before tx39_cache_init) */
267 static void __init early_flush_dcache(void)
268 {
269 	unsigned int conf = read_c0_config();
270 	unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
271 					   TX39_CONF_DCS_SHIFT));
272 	unsigned int linesz = 16;
273 	unsigned long addr, end;
274 
275 	end = INDEX_BASE + dc_size / 2;
276 	/* 2way, waybit=0 */
277 	for (addr = INDEX_BASE; addr < end; addr += linesz) {
278 		cache_op(Index_Writeback_Inv_D, addr | 0);
279 		cache_op(Index_Writeback_Inv_D, addr | 1);
280 	}
281 }
282 
283 static void __init txx9_cache_fixup(void)
284 {
285 	unsigned int conf;
286 
287 	conf = read_c0_config();
288 	/* flush and disable */
289 	if (txx9_ic_disable) {
290 		conf &= ~TX39_CONF_ICE;
291 		write_c0_config(conf);
292 	}
293 	if (txx9_dc_disable) {
294 		early_flush_dcache();
295 		conf &= ~TX39_CONF_DCE;
296 		write_c0_config(conf);
297 	}
298 
299 	/* enable cache */
300 	conf = read_c0_config();
301 	if (!txx9_ic_disable)
302 		conf |= TX39_CONF_ICE;
303 	if (!txx9_dc_disable)
304 		conf |= TX39_CONF_DCE;
305 	write_c0_config(conf);
306 
307 	if (!(conf & TX39_CONF_ICE))
308 		pr_info("TX39XX I-Cache disabled.\n");
309 	if (!(conf & TX39_CONF_DCE))
310 		pr_info("TX39XX D-Cache disabled.\n");
311 }
312 #else
313 static inline void txx9_cache_fixup(void)
314 {
315 }
316 #endif
317 
318 static void __init preprocess_cmdline(void)
319 {
320 	char cmdline[CL_SIZE];
321 	char *s;
322 
323 	strcpy(cmdline, arcs_cmdline);
324 	s = cmdline;
325 	arcs_cmdline[0] = '\0';
326 	while (s && *s) {
327 		char *str = strsep(&s, " ");
328 		if (strncmp(str, "board=", 6) == 0) {
329 			txx9_board_vec = find_board_byname(str + 6);
330 			continue;
331 		} else if (strncmp(str, "masterclk=", 10) == 0) {
332 			unsigned long val;
333 			if (strict_strtoul(str + 10, 10, &val) == 0)
334 				txx9_master_clock = val;
335 			continue;
336 		} else if (strcmp(str, "icdisable") == 0) {
337 			txx9_ic_disable = 1;
338 			continue;
339 		} else if (strcmp(str, "dcdisable") == 0) {
340 			txx9_dc_disable = 1;
341 			continue;
342 		} else if (strcmp(str, "toeoff") == 0) {
343 			txx9_ccfg_toeon = 0;
344 			continue;
345 		} else if (strcmp(str, "toeon") == 0) {
346 			txx9_ccfg_toeon = 1;
347 			continue;
348 		}
349 		if (arcs_cmdline[0])
350 			strcat(arcs_cmdline, " ");
351 		strcat(arcs_cmdline, str);
352 	}
353 
354 	txx9_cache_fixup();
355 }
356 
357 static void __init select_board(void)
358 {
359 	const char *envstr;
360 
361 	/* first, determine by "board=" argument in preprocess_cmdline() */
362 	if (txx9_board_vec)
363 		return;
364 	/* next, determine by "board" envvar */
365 	envstr = prom_getenv("board");
366 	if (envstr) {
367 		txx9_board_vec = find_board_byname(envstr);
368 		if (txx9_board_vec)
369 			return;
370 	}
371 
372 	/* select "default" board */
373 #ifdef CONFIG_CPU_TX39XX
374 	txx9_board_vec = &jmr3927_vec;
375 #endif
376 #ifdef CONFIG_CPU_TX49XX
377 	switch (TX4938_REV_PCODE()) {
378 #ifdef CONFIG_TOSHIBA_RBTX4927
379 	case 0x4927:
380 		txx9_board_vec = &rbtx4927_vec;
381 		break;
382 	case 0x4937:
383 		txx9_board_vec = &rbtx4937_vec;
384 		break;
385 #endif
386 #ifdef CONFIG_TOSHIBA_RBTX4938
387 	case 0x4938:
388 		txx9_board_vec = &rbtx4938_vec;
389 		break;
390 #endif
391 #ifdef CONFIG_TOSHIBA_RBTX4939
392 	case 0x4939:
393 		txx9_board_vec = &rbtx4939_vec;
394 		break;
395 #endif
396 	}
397 #endif
398 }
399 
400 void __init prom_init(void)
401 {
402 	prom_init_cmdline();
403 	preprocess_cmdline();
404 	select_board();
405 
406 	strcpy(txx9_system_type, txx9_board_vec->system);
407 
408 	txx9_board_vec->prom_init();
409 }
410 
411 void __init prom_free_prom_memory(void)
412 {
413 	unsigned long saddr = PAGE_SIZE;
414 	unsigned long eaddr = __pa_symbol(&_text);
415 
416 	if (saddr < eaddr)
417 		free_init_pages("prom memory", saddr, eaddr);
418 }
419 
420 const char *get_system_type(void)
421 {
422 	return txx9_system_type;
423 }
424 
425 char * __init prom_getcmdline(void)
426 {
427 	return &(arcs_cmdline[0]);
428 }
429 
430 const char *__init prom_getenv(const char *name)
431 {
432 	const s32 *str;
433 
434 	if (fw_arg2 < CKSEG0)
435 		return NULL;
436 
437 	str = (const s32 *)fw_arg2;
438 	/* YAMON style ("name", "value" pairs) */
439 	while (str[0] && str[1]) {
440 		if (!strcmp((const char *)(unsigned long)str[0], name))
441 			return (const char *)(unsigned long)str[1];
442 		str += 2;
443 	}
444 	return NULL;
445 }
446 
447 static void __noreturn txx9_machine_halt(void)
448 {
449 	local_irq_disable();
450 	clear_c0_status(ST0_IM);
451 	while (1) {
452 		if (cpu_wait) {
453 			(*cpu_wait)();
454 			if (cpu_has_counter) {
455 				/*
456 				 * Clear counter interrupt while it
457 				 * breaks WAIT instruction even if
458 				 * masked.
459 				 */
460 				write_c0_compare(0);
461 			}
462 		}
463 	}
464 }
465 
466 /* Watchdog support */
467 void __init txx9_wdt_init(unsigned long base)
468 {
469 	struct resource res = {
470 		.start	= base,
471 		.end	= base + 0x100 - 1,
472 		.flags	= IORESOURCE_MEM,
473 	};
474 	platform_device_register_simple("txx9wdt", -1, &res, 1);
475 }
476 
477 void txx9_wdt_now(unsigned long base)
478 {
479 	struct txx9_tmr_reg __iomem *tmrptr =
480 		ioremap(base, sizeof(struct txx9_tmr_reg));
481 	/* disable watch dog timer */
482 	__raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
483 	__raw_writel(0, &tmrptr->tcr);
484 	/* kick watchdog */
485 	__raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
486 	__raw_writel(1, &tmrptr->cpra); /* immediate */
487 	__raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
488 		     &tmrptr->tcr);
489 }
490 
491 /* SPI support */
492 void __init txx9_spi_init(int busid, unsigned long base, int irq)
493 {
494 	struct resource res[] = {
495 		{
496 			.start	= base,
497 			.end	= base + 0x20 - 1,
498 			.flags	= IORESOURCE_MEM,
499 		}, {
500 			.start	= irq,
501 			.flags	= IORESOURCE_IRQ,
502 		},
503 	};
504 	platform_device_register_simple("spi_txx9", busid,
505 					res, ARRAY_SIZE(res));
506 }
507 
508 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
509 {
510 	struct platform_device *pdev =
511 		platform_device_alloc("tc35815-mac", id);
512 	if (!pdev ||
513 	    platform_device_add_data(pdev, ethaddr, 6) ||
514 	    platform_device_add(pdev))
515 		platform_device_put(pdev);
516 }
517 
518 void __init txx9_sio_init(unsigned long baseaddr, int irq,
519 			  unsigned int line, unsigned int sclk, int nocts)
520 {
521 #ifdef CONFIG_SERIAL_TXX9
522 	struct uart_port req;
523 
524 	memset(&req, 0, sizeof(req));
525 	req.line = line;
526 	req.iotype = UPIO_MEM;
527 	req.membase = ioremap(baseaddr, 0x24);
528 	req.mapbase = baseaddr;
529 	req.irq = irq;
530 	if (!nocts)
531 		req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
532 	if (sclk) {
533 		req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
534 		req.uartclk = sclk;
535 	} else
536 		req.uartclk = TXX9_IMCLK;
537 	early_serial_txx9_setup(&req);
538 #endif /* CONFIG_SERIAL_TXX9 */
539 }
540 
541 #ifdef CONFIG_EARLY_PRINTK
542 static void __init null_prom_putchar(char c)
543 {
544 }
545 void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
546 
547 void __init prom_putchar(char c)
548 {
549 	txx9_prom_putchar(c);
550 }
551 
552 static void __iomem *early_txx9_sio_port;
553 
554 static void __init early_txx9_sio_putchar(char c)
555 {
556 #define TXX9_SICISR	0x0c
557 #define TXX9_SITFIFO	0x1c
558 #define TXX9_SICISR_TXALS	0x00000002
559 	while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
560 		 TXX9_SICISR_TXALS))
561 		;
562 	__raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
563 }
564 
565 void __init txx9_sio_putchar_init(unsigned long baseaddr)
566 {
567 	early_txx9_sio_port = ioremap(baseaddr, 0x24);
568 	txx9_prom_putchar = early_txx9_sio_putchar;
569 }
570 #endif /* CONFIG_EARLY_PRINTK */
571 
572 /* wrappers */
573 void __init plat_mem_setup(void)
574 {
575 	ioport_resource.start = 0;
576 	ioport_resource.end = ~0UL;	/* no limit */
577 	iomem_resource.start = 0;
578 	iomem_resource.end = ~0UL;	/* no limit */
579 
580 	/* fallback restart/halt routines */
581 	_machine_restart = (void (*)(char *))txx9_machine_halt;
582 	_machine_halt = txx9_machine_halt;
583 	pm_power_off = txx9_machine_halt;
584 
585 #ifdef CONFIG_PCI
586 	pcibios_plat_setup = txx9_pcibios_setup;
587 #endif
588 	txx9_board_vec->mem_setup();
589 }
590 
591 void __init arch_init_irq(void)
592 {
593 	txx9_board_vec->irq_setup();
594 }
595 
596 void __init plat_time_init(void)
597 {
598 #ifdef CONFIG_CPU_TX49XX
599 	mips_hpt_frequency = txx9_cpu_clock / 2;
600 #endif
601 	txx9_board_vec->time_init();
602 }
603 
604 static int __init _txx9_arch_init(void)
605 {
606 	if (txx9_board_vec->arch_init)
607 		txx9_board_vec->arch_init();
608 	return 0;
609 }
610 arch_initcall(_txx9_arch_init);
611 
612 static int __init _txx9_device_init(void)
613 {
614 	if (txx9_board_vec->device_init)
615 		txx9_board_vec->device_init();
616 	return 0;
617 }
618 device_initcall(_txx9_device_init);
619 
620 int (*txx9_irq_dispatch)(int pending);
621 asmlinkage void plat_irq_dispatch(void)
622 {
623 	int pending = read_c0_status() & read_c0_cause() & ST0_IM;
624 	int irq = txx9_irq_dispatch(pending);
625 
626 	if (likely(irq >= 0))
627 		do_IRQ(irq);
628 	else
629 		spurious_interrupt();
630 }
631 
632 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
633 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
634 static unsigned long __swizzle_addr_none(unsigned long port)
635 {
636 	return port;
637 }
638 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
639 EXPORT_SYMBOL(__swizzle_addr_b);
640 #endif
641 
642 #ifdef NEEDS_TXX9_IOSWABW
643 static u16 ioswabw_default(volatile u16 *a, u16 x)
644 {
645 	return le16_to_cpu(x);
646 }
647 static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
648 {
649 	return x;
650 }
651 u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
652 EXPORT_SYMBOL(ioswabw);
653 u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
654 EXPORT_SYMBOL(__mem_ioswabw);
655 #endif
656 
657 void __init txx9_physmap_flash_init(int no, unsigned long addr,
658 				    unsigned long size,
659 				    const struct physmap_flash_data *pdata)
660 {
661 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
662 	struct resource res = {
663 		.start = addr,
664 		.end = addr + size - 1,
665 		.flags = IORESOURCE_MEM,
666 	};
667 	struct platform_device *pdev;
668 #ifdef CONFIG_MTD_PARTITIONS
669 	static struct mtd_partition parts[2];
670 	struct physmap_flash_data pdata_part;
671 
672 	/* If this area contained boot area, make separate partition */
673 	if (pdata->nr_parts == 0 && !pdata->parts &&
674 	    addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
675 	    !parts[0].name) {
676 		parts[0].name = "boot";
677 		parts[0].offset = 0x1fc00000 - addr;
678 		parts[0].size = addr + size - 0x1fc00000;
679 		parts[1].name = "user";
680 		parts[1].offset = 0;
681 		parts[1].size = 0x1fc00000 - addr;
682 		pdata_part = *pdata;
683 		pdata_part.nr_parts = ARRAY_SIZE(parts);
684 		pdata_part.parts = parts;
685 		pdata = &pdata_part;
686 	}
687 #endif
688 	pdev = platform_device_alloc("physmap-flash", no);
689 	if (!pdev ||
690 	    platform_device_add_resources(pdev, &res, 1) ||
691 	    platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
692 	    platform_device_add(pdev))
693 		platform_device_put(pdev);
694 #endif
695 }
696 
697 void __init txx9_ndfmc_init(unsigned long baseaddr,
698 			    const struct txx9ndfmc_platform_data *pdata)
699 {
700 #if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \
701 	defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE)
702 	struct resource res = {
703 		.start = baseaddr,
704 		.end = baseaddr + 0x1000 - 1,
705 		.flags = IORESOURCE_MEM,
706 	};
707 	struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
708 
709 	if (!pdev ||
710 	    platform_device_add_resources(pdev, &res, 1) ||
711 	    platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
712 	    platform_device_add(pdev))
713 		platform_device_put(pdev);
714 #endif
715 }
716 
717 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
718 static DEFINE_SPINLOCK(txx9_iocled_lock);
719 
720 #define TXX9_IOCLED_MAXLEDS 8
721 
722 struct txx9_iocled_data {
723 	struct gpio_chip chip;
724 	u8 cur_val;
725 	void __iomem *mmioaddr;
726 	struct gpio_led_platform_data pdata;
727 	struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
728 	char names[TXX9_IOCLED_MAXLEDS][32];
729 };
730 
731 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
732 {
733 	struct txx9_iocled_data *data =
734 		container_of(chip, struct txx9_iocled_data, chip);
735 	return data->cur_val & (1 << offset);
736 }
737 
738 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
739 			    int value)
740 {
741 	struct txx9_iocled_data *data =
742 		container_of(chip, struct txx9_iocled_data, chip);
743 	unsigned long flags;
744 	spin_lock_irqsave(&txx9_iocled_lock, flags);
745 	if (value)
746 		data->cur_val |= 1 << offset;
747 	else
748 		data->cur_val &= ~(1 << offset);
749 	writeb(data->cur_val, data->mmioaddr);
750 	mmiowb();
751 	spin_unlock_irqrestore(&txx9_iocled_lock, flags);
752 }
753 
754 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
755 {
756 	return 0;
757 }
758 
759 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
760 			       int value)
761 {
762 	txx9_iocled_set(chip, offset, value);
763 	return 0;
764 }
765 
766 void __init txx9_iocled_init(unsigned long baseaddr,
767 			     int basenum, unsigned int num, int lowactive,
768 			     const char *color, char **deftriggers)
769 {
770 	struct txx9_iocled_data *iocled;
771 	struct platform_device *pdev;
772 	int i;
773 	static char *default_triggers[] __initdata = {
774 		"heartbeat",
775 		"ide-disk",
776 		"nand-disk",
777 		NULL,
778 	};
779 
780 	if (!deftriggers)
781 		deftriggers = default_triggers;
782 	iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
783 	if (!iocled)
784 		return;
785 	iocled->mmioaddr = ioremap(baseaddr, 1);
786 	if (!iocled->mmioaddr)
787 		return;
788 	iocled->chip.get = txx9_iocled_get;
789 	iocled->chip.set = txx9_iocled_set;
790 	iocled->chip.direction_input = txx9_iocled_dir_in;
791 	iocled->chip.direction_output = txx9_iocled_dir_out;
792 	iocled->chip.label = "iocled";
793 	iocled->chip.base = basenum;
794 	iocled->chip.ngpio = num;
795 	if (gpiochip_add(&iocled->chip))
796 		return;
797 	if (basenum < 0)
798 		basenum = iocled->chip.base;
799 
800 	pdev = platform_device_alloc("leds-gpio", basenum);
801 	if (!pdev)
802 		return;
803 	iocled->pdata.num_leds = num;
804 	iocled->pdata.leds = iocled->leds;
805 	for (i = 0; i < num; i++) {
806 		struct gpio_led *led = &iocled->leds[i];
807 		snprintf(iocled->names[i], sizeof(iocled->names[i]),
808 			 "iocled:%s:%u", color, i);
809 		led->name = iocled->names[i];
810 		led->gpio = basenum + i;
811 		led->active_low = lowactive;
812 		if (deftriggers && *deftriggers)
813 			led->default_trigger = *deftriggers++;
814 	}
815 	pdev->dev.platform_data = &iocled->pdata;
816 	if (platform_device_add(pdev))
817 		platform_device_put(pdev);
818 }
819 #else /* CONFIG_LEDS_GPIO */
820 void __init txx9_iocled_init(unsigned long baseaddr,
821 			     int basenum, unsigned int num, int lowactive,
822 			     const char *color, char **deftriggers)
823 {
824 }
825 #endif /* CONFIG_LEDS_GPIO */
826 
827 void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
828 			   const struct txx9dmac_platform_data *pdata)
829 {
830 #if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE)
831 	struct resource res[] = {
832 		{
833 			.start = baseaddr,
834 			.end = baseaddr + 0x800 - 1,
835 			.flags = IORESOURCE_MEM,
836 #ifndef CONFIG_MACH_TX49XX
837 		}, {
838 			.start = irq,
839 			.flags = IORESOURCE_IRQ,
840 #endif
841 		}
842 	};
843 #ifdef CONFIG_MACH_TX49XX
844 	struct resource chan_res[] = {
845 		{
846 			.flags = IORESOURCE_IRQ,
847 		}
848 	};
849 #endif
850 	struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
851 	struct txx9dmac_chan_platform_data cpdata;
852 	int i;
853 
854 	if (!pdev ||
855 	    platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
856 	    platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
857 	    platform_device_add(pdev)) {
858 		platform_device_put(pdev);
859 		return;
860 	}
861 	memset(&cpdata, 0, sizeof(cpdata));
862 	cpdata.dmac_dev = pdev;
863 	for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
864 #ifdef CONFIG_MACH_TX49XX
865 		chan_res[0].start = irq + i;
866 #endif
867 		pdev = platform_device_alloc("txx9dmac-chan",
868 					     id * TXX9_DMA_MAX_NR_CHANNELS + i);
869 		if (!pdev ||
870 #ifdef CONFIG_MACH_TX49XX
871 		    platform_device_add_resources(pdev, chan_res,
872 						  ARRAY_SIZE(chan_res)) ||
873 #endif
874 		    platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
875 		    platform_device_add(pdev))
876 			platform_device_put(pdev);
877 	}
878 #endif
879 }
880 
881 void __init txx9_aclc_init(unsigned long baseaddr, int irq,
882 			   unsigned int dmac_id,
883 			   unsigned int dma_chan_out,
884 			   unsigned int dma_chan_in)
885 {
886 #if defined(CONFIG_SND_SOC_TXX9ACLC) || \
887 	defined(CONFIG_SND_SOC_TXX9ACLC_MODULE)
888 	unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
889 	struct resource res[] = {
890 		{
891 			.start = baseaddr,
892 			.end = baseaddr + 0x100 - 1,
893 			.flags = IORESOURCE_MEM,
894 		}, {
895 			.start = irq,
896 			.flags = IORESOURCE_IRQ,
897 		}, {
898 			.name = "txx9dmac-chan",
899 			.start = dma_base + dma_chan_out,
900 			.flags = IORESOURCE_DMA,
901 		}, {
902 			.name = "txx9dmac-chan",
903 			.start = dma_base + dma_chan_in,
904 			.flags = IORESOURCE_DMA,
905 		}
906 	};
907 	struct platform_device *pdev =
908 		platform_device_alloc("txx9aclc-ac97", -1);
909 
910 	if (!pdev ||
911 	    platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
912 	    platform_device_add(pdev))
913 		platform_device_put(pdev);
914 #endif
915 }
916 
917 static struct sysdev_class txx9_sramc_sysdev_class;
918 
919 struct txx9_sramc_sysdev {
920 	struct sys_device dev;
921 	struct bin_attribute bindata_attr;
922 	void __iomem *base;
923 };
924 
925 static ssize_t txx9_sram_read(struct kobject *kobj,
926 			      struct bin_attribute *bin_attr,
927 			      char *buf, loff_t pos, size_t size)
928 {
929 	struct txx9_sramc_sysdev *dev = bin_attr->private;
930 	size_t ramsize = bin_attr->size;
931 
932 	if (pos >= ramsize)
933 		return 0;
934 	if (pos + size > ramsize)
935 		size = ramsize - pos;
936 	memcpy_fromio(buf, dev->base + pos, size);
937 	return size;
938 }
939 
940 static ssize_t txx9_sram_write(struct kobject *kobj,
941 			       struct bin_attribute *bin_attr,
942 			       char *buf, loff_t pos, size_t size)
943 {
944 	struct txx9_sramc_sysdev *dev = bin_attr->private;
945 	size_t ramsize = bin_attr->size;
946 
947 	if (pos >= ramsize)
948 		return 0;
949 	if (pos + size > ramsize)
950 		size = ramsize - pos;
951 	memcpy_toio(dev->base + pos, buf, size);
952 	return size;
953 }
954 
955 void __init txx9_sramc_init(struct resource *r)
956 {
957 	struct txx9_sramc_sysdev *dev;
958 	size_t size;
959 	int err;
960 
961 	if (!txx9_sramc_sysdev_class.name) {
962 		txx9_sramc_sysdev_class.name = "txx9_sram";
963 		err = sysdev_class_register(&txx9_sramc_sysdev_class);
964 		if (err) {
965 			txx9_sramc_sysdev_class.name = NULL;
966 			return;
967 		}
968 	}
969 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
970 	if (!dev)
971 		return;
972 	size = resource_size(r);
973 	dev->base = ioremap(r->start, size);
974 	if (!dev->base)
975 		goto exit;
976 	dev->dev.cls = &txx9_sramc_sysdev_class;
977 	dev->bindata_attr.attr.name = "bindata";
978 	dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
979 	dev->bindata_attr.read = txx9_sram_read;
980 	dev->bindata_attr.write = txx9_sram_write;
981 	dev->bindata_attr.size = size;
982 	dev->bindata_attr.private = dev;
983 	err = sysdev_register(&dev->dev);
984 	if (err)
985 		goto exit;
986 	err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
987 	if (err) {
988 		sysdev_unregister(&dev->dev);
989 		goto exit;
990 	}
991 	return;
992 exit:
993 	if (dev) {
994 		if (dev->base)
995 			iounmap(dev->base);
996 		kfree(dev);
997 	}
998 }
999