1 /* 2 * linux/arch/mips/txx9/generic/setup.c 3 * 4 * Based on linux/arch/mips/txx9/rbtx4938/setup.c, 5 * and RBTX49xx patch from CELF patch archive. 6 * 7 * 2003-2005 (c) MontaVista Software, Inc. 8 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 9 * 10 * This file is subject to the terms and conditions of the GNU General Public 11 * License. See the file "COPYING" in the main directory of this archive 12 * for more details. 13 */ 14 #include <linux/init.h> 15 #include <linux/kernel.h> 16 #include <linux/types.h> 17 #include <linux/interrupt.h> 18 #include <linux/string.h> 19 #include <linux/module.h> 20 #include <linux/clk.h> 21 #include <linux/err.h> 22 #include <linux/gpio.h> 23 #include <linux/platform_device.h> 24 #include <linux/serial_core.h> 25 #include <linux/mtd/physmap.h> 26 #include <linux/leds.h> 27 #include <asm/bootinfo.h> 28 #include <asm/time.h> 29 #include <asm/reboot.h> 30 #include <asm/r4kcache.h> 31 #include <asm/sections.h> 32 #include <asm/txx9/generic.h> 33 #include <asm/txx9/pci.h> 34 #include <asm/txx9tmr.h> 35 #ifdef CONFIG_CPU_TX49XX 36 #include <asm/txx9/tx4938.h> 37 #endif 38 39 /* EBUSC settings of TX4927, etc. */ 40 struct resource txx9_ce_res[8]; 41 static char txx9_ce_res_name[8][4]; /* "CEn" */ 42 43 /* pcode, internal register */ 44 unsigned int txx9_pcode; 45 char txx9_pcode_str[8]; 46 static struct resource txx9_reg_res = { 47 .name = txx9_pcode_str, 48 .flags = IORESOURCE_MEM, 49 }; 50 void __init 51 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size) 52 { 53 int i; 54 55 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) { 56 sprintf(txx9_ce_res_name[i], "CE%d", i); 57 txx9_ce_res[i].flags = IORESOURCE_MEM; 58 txx9_ce_res[i].name = txx9_ce_res_name[i]; 59 } 60 61 txx9_pcode = pcode; 62 sprintf(txx9_pcode_str, "TX%x", pcode); 63 if (base) { 64 txx9_reg_res.start = base & 0xfffffffffULL; 65 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1); 66 request_resource(&iomem_resource, &txx9_reg_res); 67 } 68 } 69 70 /* clocks */ 71 unsigned int txx9_master_clock; 72 unsigned int txx9_cpu_clock; 73 unsigned int txx9_gbus_clock; 74 75 #ifdef CONFIG_CPU_TX39XX 76 /* don't enable by default - see errata */ 77 int txx9_ccfg_toeon __initdata; 78 #else 79 int txx9_ccfg_toeon __initdata = 1; 80 #endif 81 82 /* Minimum CLK support */ 83 84 struct clk *clk_get(struct device *dev, const char *id) 85 { 86 if (!strcmp(id, "spi-baseclk")) 87 return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4); 88 if (!strcmp(id, "imbus_clk")) 89 return (struct clk *)((unsigned long)txx9_gbus_clock / 2); 90 return ERR_PTR(-ENOENT); 91 } 92 EXPORT_SYMBOL(clk_get); 93 94 int clk_enable(struct clk *clk) 95 { 96 return 0; 97 } 98 EXPORT_SYMBOL(clk_enable); 99 100 void clk_disable(struct clk *clk) 101 { 102 } 103 EXPORT_SYMBOL(clk_disable); 104 105 unsigned long clk_get_rate(struct clk *clk) 106 { 107 return (unsigned long)clk; 108 } 109 EXPORT_SYMBOL(clk_get_rate); 110 111 void clk_put(struct clk *clk) 112 { 113 } 114 EXPORT_SYMBOL(clk_put); 115 116 /* GPIO support */ 117 118 #ifdef CONFIG_GENERIC_GPIO 119 int gpio_to_irq(unsigned gpio) 120 { 121 return -EINVAL; 122 } 123 EXPORT_SYMBOL(gpio_to_irq); 124 125 int irq_to_gpio(unsigned irq) 126 { 127 return -EINVAL; 128 } 129 EXPORT_SYMBOL(irq_to_gpio); 130 #endif 131 132 #define BOARD_VEC(board) extern struct txx9_board_vec board; 133 #include <asm/txx9/boards.h> 134 #undef BOARD_VEC 135 136 struct txx9_board_vec *txx9_board_vec __initdata; 137 static char txx9_system_type[32]; 138 139 static struct txx9_board_vec *board_vecs[] __initdata = { 140 #define BOARD_VEC(board) &board, 141 #include <asm/txx9/boards.h> 142 #undef BOARD_VEC 143 }; 144 145 static struct txx9_board_vec *__init find_board_byname(const char *name) 146 { 147 int i; 148 149 /* search board_vecs table */ 150 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { 151 if (strstr(board_vecs[i]->system, name)) 152 return board_vecs[i]; 153 } 154 return NULL; 155 } 156 157 static void __init prom_init_cmdline(void) 158 { 159 int argc = (int)fw_arg0; 160 int *argv32 = (int *)fw_arg1; 161 int i; /* Always ignore the "-c" at argv[0] */ 162 char builtin[CL_SIZE]; 163 164 /* ignore all built-in args if any f/w args given */ 165 /* 166 * But if built-in strings was started with '+', append them 167 * to command line args. If built-in was started with '-', 168 * ignore all f/w args. 169 */ 170 builtin[0] = '\0'; 171 if (arcs_cmdline[0] == '+') 172 strcpy(builtin, arcs_cmdline + 1); 173 else if (arcs_cmdline[0] == '-') { 174 strcpy(builtin, arcs_cmdline + 1); 175 argc = 0; 176 } else if (argc <= 1) 177 strcpy(builtin, arcs_cmdline); 178 arcs_cmdline[0] = '\0'; 179 180 for (i = 1; i < argc; i++) { 181 char *str = (char *)(long)argv32[i]; 182 if (i != 1) 183 strcat(arcs_cmdline, " "); 184 if (strchr(str, ' ')) { 185 strcat(arcs_cmdline, "\""); 186 strcat(arcs_cmdline, str); 187 strcat(arcs_cmdline, "\""); 188 } else 189 strcat(arcs_cmdline, str); 190 } 191 /* append saved builtin args */ 192 if (builtin[0]) { 193 if (arcs_cmdline[0]) 194 strcat(arcs_cmdline, " "); 195 strcat(arcs_cmdline, builtin); 196 } 197 } 198 199 static int txx9_ic_disable __initdata; 200 static int txx9_dc_disable __initdata; 201 202 #if defined(CONFIG_CPU_TX49XX) 203 /* flush all cache on very early stage (before 4k_cache_init) */ 204 static void __init early_flush_dcache(void) 205 { 206 unsigned int conf = read_c0_config(); 207 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6)); 208 unsigned int linesz = 32; 209 unsigned long addr, end; 210 211 end = INDEX_BASE + dc_size / 4; 212 /* 4way, waybit=0 */ 213 for (addr = INDEX_BASE; addr < end; addr += linesz) { 214 cache_op(Index_Writeback_Inv_D, addr | 0); 215 cache_op(Index_Writeback_Inv_D, addr | 1); 216 cache_op(Index_Writeback_Inv_D, addr | 2); 217 cache_op(Index_Writeback_Inv_D, addr | 3); 218 } 219 } 220 221 static void __init txx9_cache_fixup(void) 222 { 223 unsigned int conf; 224 225 conf = read_c0_config(); 226 /* flush and disable */ 227 if (txx9_ic_disable) { 228 conf |= TX49_CONF_IC; 229 write_c0_config(conf); 230 } 231 if (txx9_dc_disable) { 232 early_flush_dcache(); 233 conf |= TX49_CONF_DC; 234 write_c0_config(conf); 235 } 236 237 /* enable cache */ 238 conf = read_c0_config(); 239 if (!txx9_ic_disable) 240 conf &= ~TX49_CONF_IC; 241 if (!txx9_dc_disable) 242 conf &= ~TX49_CONF_DC; 243 write_c0_config(conf); 244 245 if (conf & TX49_CONF_IC) 246 pr_info("TX49XX I-Cache disabled.\n"); 247 if (conf & TX49_CONF_DC) 248 pr_info("TX49XX D-Cache disabled.\n"); 249 } 250 #elif defined(CONFIG_CPU_TX39XX) 251 /* flush all cache on very early stage (before tx39_cache_init) */ 252 static void __init early_flush_dcache(void) 253 { 254 unsigned int conf = read_c0_config(); 255 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >> 256 TX39_CONF_DCS_SHIFT)); 257 unsigned int linesz = 16; 258 unsigned long addr, end; 259 260 end = INDEX_BASE + dc_size / 2; 261 /* 2way, waybit=0 */ 262 for (addr = INDEX_BASE; addr < end; addr += linesz) { 263 cache_op(Index_Writeback_Inv_D, addr | 0); 264 cache_op(Index_Writeback_Inv_D, addr | 1); 265 } 266 } 267 268 static void __init txx9_cache_fixup(void) 269 { 270 unsigned int conf; 271 272 conf = read_c0_config(); 273 /* flush and disable */ 274 if (txx9_ic_disable) { 275 conf &= ~TX39_CONF_ICE; 276 write_c0_config(conf); 277 } 278 if (txx9_dc_disable) { 279 early_flush_dcache(); 280 conf &= ~TX39_CONF_DCE; 281 write_c0_config(conf); 282 } 283 284 /* enable cache */ 285 conf = read_c0_config(); 286 if (!txx9_ic_disable) 287 conf |= TX39_CONF_ICE; 288 if (!txx9_dc_disable) 289 conf |= TX39_CONF_DCE; 290 write_c0_config(conf); 291 292 if (!(conf & TX39_CONF_ICE)) 293 pr_info("TX39XX I-Cache disabled.\n"); 294 if (!(conf & TX39_CONF_DCE)) 295 pr_info("TX39XX D-Cache disabled.\n"); 296 } 297 #else 298 static inline void txx9_cache_fixup(void) 299 { 300 } 301 #endif 302 303 static void __init preprocess_cmdline(void) 304 { 305 char cmdline[CL_SIZE]; 306 char *s; 307 308 strcpy(cmdline, arcs_cmdline); 309 s = cmdline; 310 arcs_cmdline[0] = '\0'; 311 while (s && *s) { 312 char *str = strsep(&s, " "); 313 if (strncmp(str, "board=", 6) == 0) { 314 txx9_board_vec = find_board_byname(str + 6); 315 continue; 316 } else if (strncmp(str, "masterclk=", 10) == 0) { 317 unsigned long val; 318 if (strict_strtoul(str + 10, 10, &val) == 0) 319 txx9_master_clock = val; 320 continue; 321 } else if (strcmp(str, "icdisable") == 0) { 322 txx9_ic_disable = 1; 323 continue; 324 } else if (strcmp(str, "dcdisable") == 0) { 325 txx9_dc_disable = 1; 326 continue; 327 } else if (strcmp(str, "toeoff") == 0) { 328 txx9_ccfg_toeon = 0; 329 continue; 330 } else if (strcmp(str, "toeon") == 0) { 331 txx9_ccfg_toeon = 1; 332 continue; 333 } 334 if (arcs_cmdline[0]) 335 strcat(arcs_cmdline, " "); 336 strcat(arcs_cmdline, str); 337 } 338 339 txx9_cache_fixup(); 340 } 341 342 static void __init select_board(void) 343 { 344 const char *envstr; 345 346 /* first, determine by "board=" argument in preprocess_cmdline() */ 347 if (txx9_board_vec) 348 return; 349 /* next, determine by "board" envvar */ 350 envstr = prom_getenv("board"); 351 if (envstr) { 352 txx9_board_vec = find_board_byname(envstr); 353 if (txx9_board_vec) 354 return; 355 } 356 357 /* select "default" board */ 358 #ifdef CONFIG_CPU_TX39XX 359 txx9_board_vec = &jmr3927_vec; 360 #endif 361 #ifdef CONFIG_CPU_TX49XX 362 switch (TX4938_REV_PCODE()) { 363 #ifdef CONFIG_TOSHIBA_RBTX4927 364 case 0x4927: 365 txx9_board_vec = &rbtx4927_vec; 366 break; 367 case 0x4937: 368 txx9_board_vec = &rbtx4937_vec; 369 break; 370 #endif 371 #ifdef CONFIG_TOSHIBA_RBTX4938 372 case 0x4938: 373 txx9_board_vec = &rbtx4938_vec; 374 break; 375 #endif 376 #ifdef CONFIG_TOSHIBA_RBTX4939 377 case 0x4939: 378 txx9_board_vec = &rbtx4939_vec; 379 break; 380 #endif 381 } 382 #endif 383 } 384 385 void __init prom_init(void) 386 { 387 prom_init_cmdline(); 388 preprocess_cmdline(); 389 select_board(); 390 391 strcpy(txx9_system_type, txx9_board_vec->system); 392 393 txx9_board_vec->prom_init(); 394 } 395 396 void __init prom_free_prom_memory(void) 397 { 398 unsigned long saddr = PAGE_SIZE; 399 unsigned long eaddr = __pa_symbol(&_text); 400 401 if (saddr < eaddr) 402 free_init_pages("prom memory", saddr, eaddr); 403 } 404 405 const char *get_system_type(void) 406 { 407 return txx9_system_type; 408 } 409 410 char * __init prom_getcmdline(void) 411 { 412 return &(arcs_cmdline[0]); 413 } 414 415 const char *__init prom_getenv(const char *name) 416 { 417 const s32 *str = (const s32 *)fw_arg2; 418 419 if (!str) 420 return NULL; 421 /* YAMON style ("name", "value" pairs) */ 422 while (str[0] && str[1]) { 423 if (!strcmp((const char *)(unsigned long)str[0], name)) 424 return (const char *)(unsigned long)str[1]; 425 str += 2; 426 } 427 return NULL; 428 } 429 430 static void __noreturn txx9_machine_halt(void) 431 { 432 local_irq_disable(); 433 clear_c0_status(ST0_IM); 434 while (1) { 435 if (cpu_wait) { 436 (*cpu_wait)(); 437 if (cpu_has_counter) { 438 /* 439 * Clear counter interrupt while it 440 * breaks WAIT instruction even if 441 * masked. 442 */ 443 write_c0_compare(0); 444 } 445 } 446 } 447 } 448 449 /* Watchdog support */ 450 void __init txx9_wdt_init(unsigned long base) 451 { 452 struct resource res = { 453 .start = base, 454 .end = base + 0x100 - 1, 455 .flags = IORESOURCE_MEM, 456 }; 457 platform_device_register_simple("txx9wdt", -1, &res, 1); 458 } 459 460 void txx9_wdt_now(unsigned long base) 461 { 462 struct txx9_tmr_reg __iomem *tmrptr = 463 ioremap(base, sizeof(struct txx9_tmr_reg)); 464 /* disable watch dog timer */ 465 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); 466 __raw_writel(0, &tmrptr->tcr); 467 /* kick watchdog */ 468 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); 469 __raw_writel(1, &tmrptr->cpra); /* immediate */ 470 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, 471 &tmrptr->tcr); 472 } 473 474 /* SPI support */ 475 void __init txx9_spi_init(int busid, unsigned long base, int irq) 476 { 477 struct resource res[] = { 478 { 479 .start = base, 480 .end = base + 0x20 - 1, 481 .flags = IORESOURCE_MEM, 482 }, { 483 .start = irq, 484 .flags = IORESOURCE_IRQ, 485 }, 486 }; 487 platform_device_register_simple("spi_txx9", busid, 488 res, ARRAY_SIZE(res)); 489 } 490 491 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) 492 { 493 struct platform_device *pdev = 494 platform_device_alloc("tc35815-mac", id); 495 if (!pdev || 496 platform_device_add_data(pdev, ethaddr, 6) || 497 platform_device_add(pdev)) 498 platform_device_put(pdev); 499 } 500 501 void __init txx9_sio_init(unsigned long baseaddr, int irq, 502 unsigned int line, unsigned int sclk, int nocts) 503 { 504 #ifdef CONFIG_SERIAL_TXX9 505 struct uart_port req; 506 507 memset(&req, 0, sizeof(req)); 508 req.line = line; 509 req.iotype = UPIO_MEM; 510 req.membase = ioremap(baseaddr, 0x24); 511 req.mapbase = baseaddr; 512 req.irq = irq; 513 if (!nocts) 514 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; 515 if (sclk) { 516 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; 517 req.uartclk = sclk; 518 } else 519 req.uartclk = TXX9_IMCLK; 520 early_serial_txx9_setup(&req); 521 #endif /* CONFIG_SERIAL_TXX9 */ 522 } 523 524 #ifdef CONFIG_EARLY_PRINTK 525 static void __init null_prom_putchar(char c) 526 { 527 } 528 void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; 529 530 void __init prom_putchar(char c) 531 { 532 txx9_prom_putchar(c); 533 } 534 535 static void __iomem *early_txx9_sio_port; 536 537 static void __init early_txx9_sio_putchar(char c) 538 { 539 #define TXX9_SICISR 0x0c 540 #define TXX9_SITFIFO 0x1c 541 #define TXX9_SICISR_TXALS 0x00000002 542 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & 543 TXX9_SICISR_TXALS)) 544 ; 545 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); 546 } 547 548 void __init txx9_sio_putchar_init(unsigned long baseaddr) 549 { 550 early_txx9_sio_port = ioremap(baseaddr, 0x24); 551 txx9_prom_putchar = early_txx9_sio_putchar; 552 } 553 #endif /* CONFIG_EARLY_PRINTK */ 554 555 /* wrappers */ 556 void __init plat_mem_setup(void) 557 { 558 ioport_resource.start = 0; 559 ioport_resource.end = ~0UL; /* no limit */ 560 iomem_resource.start = 0; 561 iomem_resource.end = ~0UL; /* no limit */ 562 563 /* fallback restart/halt routines */ 564 _machine_restart = (void (*)(char *))txx9_machine_halt; 565 _machine_halt = txx9_machine_halt; 566 pm_power_off = txx9_machine_halt; 567 568 #ifdef CONFIG_PCI 569 pcibios_plat_setup = txx9_pcibios_setup; 570 #endif 571 txx9_board_vec->mem_setup(); 572 } 573 574 void __init arch_init_irq(void) 575 { 576 txx9_board_vec->irq_setup(); 577 } 578 579 void __init plat_time_init(void) 580 { 581 #ifdef CONFIG_CPU_TX49XX 582 mips_hpt_frequency = txx9_cpu_clock / 2; 583 #endif 584 txx9_board_vec->time_init(); 585 } 586 587 static int __init _txx9_arch_init(void) 588 { 589 if (txx9_board_vec->arch_init) 590 txx9_board_vec->arch_init(); 591 return 0; 592 } 593 arch_initcall(_txx9_arch_init); 594 595 static int __init _txx9_device_init(void) 596 { 597 if (txx9_board_vec->device_init) 598 txx9_board_vec->device_init(); 599 return 0; 600 } 601 device_initcall(_txx9_device_init); 602 603 int (*txx9_irq_dispatch)(int pending); 604 asmlinkage void plat_irq_dispatch(void) 605 { 606 int pending = read_c0_status() & read_c0_cause() & ST0_IM; 607 int irq = txx9_irq_dispatch(pending); 608 609 if (likely(irq >= 0)) 610 do_IRQ(irq); 611 else 612 spurious_interrupt(); 613 } 614 615 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */ 616 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B 617 static unsigned long __swizzle_addr_none(unsigned long port) 618 { 619 return port; 620 } 621 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; 622 EXPORT_SYMBOL(__swizzle_addr_b); 623 #endif 624 625 void __init txx9_physmap_flash_init(int no, unsigned long addr, 626 unsigned long size, 627 const struct physmap_flash_data *pdata) 628 { 629 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 630 struct resource res = { 631 .start = addr, 632 .end = addr + size - 1, 633 .flags = IORESOURCE_MEM, 634 }; 635 struct platform_device *pdev; 636 #ifdef CONFIG_MTD_PARTITIONS 637 static struct mtd_partition parts[2]; 638 struct physmap_flash_data pdata_part; 639 640 /* If this area contained boot area, make separate partition */ 641 if (pdata->nr_parts == 0 && !pdata->parts && 642 addr < 0x1fc00000 && addr + size > 0x1fc00000 && 643 !parts[0].name) { 644 parts[0].name = "boot"; 645 parts[0].offset = 0x1fc00000 - addr; 646 parts[0].size = addr + size - 0x1fc00000; 647 parts[1].name = "user"; 648 parts[1].offset = 0; 649 parts[1].size = 0x1fc00000 - addr; 650 pdata_part = *pdata; 651 pdata_part.nr_parts = ARRAY_SIZE(parts); 652 pdata_part.parts = parts; 653 pdata = &pdata_part; 654 } 655 #endif 656 pdev = platform_device_alloc("physmap-flash", no); 657 if (!pdev || 658 platform_device_add_resources(pdev, &res, 1) || 659 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 660 platform_device_add(pdev)) 661 platform_device_put(pdev); 662 #endif 663 } 664 665 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 666 static DEFINE_SPINLOCK(txx9_iocled_lock); 667 668 #define TXX9_IOCLED_MAXLEDS 8 669 670 struct txx9_iocled_data { 671 struct gpio_chip chip; 672 u8 cur_val; 673 void __iomem *mmioaddr; 674 struct gpio_led_platform_data pdata; 675 struct gpio_led leds[TXX9_IOCLED_MAXLEDS]; 676 char names[TXX9_IOCLED_MAXLEDS][32]; 677 }; 678 679 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset) 680 { 681 struct txx9_iocled_data *data = 682 container_of(chip, struct txx9_iocled_data, chip); 683 return data->cur_val & (1 << offset); 684 } 685 686 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset, 687 int value) 688 { 689 struct txx9_iocled_data *data = 690 container_of(chip, struct txx9_iocled_data, chip); 691 unsigned long flags; 692 spin_lock_irqsave(&txx9_iocled_lock, flags); 693 if (value) 694 data->cur_val |= 1 << offset; 695 else 696 data->cur_val &= ~(1 << offset); 697 writeb(data->cur_val, data->mmioaddr); 698 mmiowb(); 699 spin_unlock_irqrestore(&txx9_iocled_lock, flags); 700 } 701 702 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset) 703 { 704 return 0; 705 } 706 707 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset, 708 int value) 709 { 710 txx9_iocled_set(chip, offset, value); 711 return 0; 712 } 713 714 void __init txx9_iocled_init(unsigned long baseaddr, 715 int basenum, unsigned int num, int lowactive, 716 const char *color, char **deftriggers) 717 { 718 struct txx9_iocled_data *iocled; 719 struct platform_device *pdev; 720 int i; 721 static char *default_triggers[] __initdata = { 722 "heartbeat", 723 "ide-disk", 724 "nand-disk", 725 NULL, 726 }; 727 728 if (!deftriggers) 729 deftriggers = default_triggers; 730 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL); 731 if (!iocled) 732 return; 733 iocled->mmioaddr = ioremap(baseaddr, 1); 734 if (!iocled->mmioaddr) 735 return; 736 iocled->chip.get = txx9_iocled_get; 737 iocled->chip.set = txx9_iocled_set; 738 iocled->chip.direction_input = txx9_iocled_dir_in; 739 iocled->chip.direction_output = txx9_iocled_dir_out; 740 iocled->chip.label = "iocled"; 741 iocled->chip.base = basenum; 742 iocled->chip.ngpio = num; 743 if (gpiochip_add(&iocled->chip)) 744 return; 745 if (basenum < 0) 746 basenum = iocled->chip.base; 747 748 pdev = platform_device_alloc("leds-gpio", basenum); 749 if (!pdev) 750 return; 751 iocled->pdata.num_leds = num; 752 iocled->pdata.leds = iocled->leds; 753 for (i = 0; i < num; i++) { 754 struct gpio_led *led = &iocled->leds[i]; 755 snprintf(iocled->names[i], sizeof(iocled->names[i]), 756 "iocled:%s:%u", color, i); 757 led->name = iocled->names[i]; 758 led->gpio = basenum + i; 759 led->active_low = lowactive; 760 if (deftriggers && *deftriggers) 761 led->default_trigger = *deftriggers++; 762 } 763 pdev->dev.platform_data = &iocled->pdata; 764 if (platform_device_add(pdev)) 765 platform_device_put(pdev); 766 } 767 #else /* CONFIG_LEDS_GPIO */ 768 void __init txx9_iocled_init(unsigned long baseaddr, 769 int basenum, unsigned int num, int lowactive, 770 const char *color, char **deftriggers) 771 { 772 } 773 #endif /* CONFIG_LEDS_GPIO */ 774