1 /* 2 * Based on linux/arch/mips/txx9/rbtx4938/setup.c, 3 * and RBTX49xx patch from CELF patch archive. 4 * 5 * 2003-2005 (c) MontaVista Software, Inc. 6 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 #include <linux/init.h> 13 #include <linux/kernel.h> 14 #include <linux/types.h> 15 #include <linux/interrupt.h> 16 #include <linux/string.h> 17 #include <linux/module.h> 18 #include <linux/clk.h> 19 #include <linux/err.h> 20 #include <linux/gpio.h> 21 #include <linux/platform_device.h> 22 #include <linux/serial_core.h> 23 #include <linux/mtd/physmap.h> 24 #include <linux/leds.h> 25 #include <linux/sysdev.h> 26 #include <asm/bootinfo.h> 27 #include <asm/time.h> 28 #include <asm/reboot.h> 29 #include <asm/r4kcache.h> 30 #include <asm/sections.h> 31 #include <asm/txx9/generic.h> 32 #include <asm/txx9/pci.h> 33 #include <asm/txx9tmr.h> 34 #include <asm/txx9/ndfmc.h> 35 #include <asm/txx9/dmac.h> 36 #ifdef CONFIG_CPU_TX49XX 37 #include <asm/txx9/tx4938.h> 38 #endif 39 40 /* EBUSC settings of TX4927, etc. */ 41 struct resource txx9_ce_res[8]; 42 static char txx9_ce_res_name[8][4]; /* "CEn" */ 43 44 /* pcode, internal register */ 45 unsigned int txx9_pcode; 46 char txx9_pcode_str[8]; 47 static struct resource txx9_reg_res = { 48 .name = txx9_pcode_str, 49 .flags = IORESOURCE_MEM, 50 }; 51 void __init 52 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size) 53 { 54 int i; 55 56 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) { 57 sprintf(txx9_ce_res_name[i], "CE%d", i); 58 txx9_ce_res[i].flags = IORESOURCE_MEM; 59 txx9_ce_res[i].name = txx9_ce_res_name[i]; 60 } 61 62 txx9_pcode = pcode; 63 sprintf(txx9_pcode_str, "TX%x", pcode); 64 if (base) { 65 txx9_reg_res.start = base & 0xfffffffffULL; 66 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1); 67 request_resource(&iomem_resource, &txx9_reg_res); 68 } 69 } 70 71 /* clocks */ 72 unsigned int txx9_master_clock; 73 unsigned int txx9_cpu_clock; 74 unsigned int txx9_gbus_clock; 75 76 #ifdef CONFIG_CPU_TX39XX 77 /* don't enable by default - see errata */ 78 int txx9_ccfg_toeon __initdata; 79 #else 80 int txx9_ccfg_toeon __initdata = 1; 81 #endif 82 83 /* Minimum CLK support */ 84 85 struct clk *clk_get(struct device *dev, const char *id) 86 { 87 if (!strcmp(id, "spi-baseclk")) 88 return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 2); 89 if (!strcmp(id, "imbus_clk")) 90 return (struct clk *)((unsigned long)txx9_gbus_clock / 2); 91 return ERR_PTR(-ENOENT); 92 } 93 EXPORT_SYMBOL(clk_get); 94 95 int clk_enable(struct clk *clk) 96 { 97 return 0; 98 } 99 EXPORT_SYMBOL(clk_enable); 100 101 void clk_disable(struct clk *clk) 102 { 103 } 104 EXPORT_SYMBOL(clk_disable); 105 106 unsigned long clk_get_rate(struct clk *clk) 107 { 108 return (unsigned long)clk; 109 } 110 EXPORT_SYMBOL(clk_get_rate); 111 112 void clk_put(struct clk *clk) 113 { 114 } 115 EXPORT_SYMBOL(clk_put); 116 117 /* GPIO support */ 118 119 #ifdef CONFIG_GENERIC_GPIO 120 int gpio_to_irq(unsigned gpio) 121 { 122 return -EINVAL; 123 } 124 EXPORT_SYMBOL(gpio_to_irq); 125 126 int irq_to_gpio(unsigned irq) 127 { 128 return -EINVAL; 129 } 130 EXPORT_SYMBOL(irq_to_gpio); 131 #endif 132 133 #define BOARD_VEC(board) extern struct txx9_board_vec board; 134 #include <asm/txx9/boards.h> 135 #undef BOARD_VEC 136 137 struct txx9_board_vec *txx9_board_vec __initdata; 138 static char txx9_system_type[32]; 139 140 static struct txx9_board_vec *board_vecs[] __initdata = { 141 #define BOARD_VEC(board) &board, 142 #include <asm/txx9/boards.h> 143 #undef BOARD_VEC 144 }; 145 146 static struct txx9_board_vec *__init find_board_byname(const char *name) 147 { 148 int i; 149 150 /* search board_vecs table */ 151 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { 152 if (strstr(board_vecs[i]->system, name)) 153 return board_vecs[i]; 154 } 155 return NULL; 156 } 157 158 static void __init prom_init_cmdline(void) 159 { 160 int argc; 161 int *argv32; 162 int i; /* Always ignore the "-c" at argv[0] */ 163 164 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { 165 /* 166 * argc is not a valid number, or argv32 is not a valid 167 * pointer 168 */ 169 argc = 0; 170 argv32 = NULL; 171 } else { 172 argc = (int)fw_arg0; 173 argv32 = (int *)fw_arg1; 174 } 175 176 arcs_cmdline[0] = '\0'; 177 178 for (i = 1; i < argc; i++) { 179 char *str = (char *)(long)argv32[i]; 180 if (i != 1) 181 strcat(arcs_cmdline, " "); 182 if (strchr(str, ' ')) { 183 strcat(arcs_cmdline, "\""); 184 strcat(arcs_cmdline, str); 185 strcat(arcs_cmdline, "\""); 186 } else 187 strcat(arcs_cmdline, str); 188 } 189 } 190 191 static int txx9_ic_disable __initdata; 192 static int txx9_dc_disable __initdata; 193 194 #if defined(CONFIG_CPU_TX49XX) 195 /* flush all cache on very early stage (before 4k_cache_init) */ 196 static void __init early_flush_dcache(void) 197 { 198 unsigned int conf = read_c0_config(); 199 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6)); 200 unsigned int linesz = 32; 201 unsigned long addr, end; 202 203 end = INDEX_BASE + dc_size / 4; 204 /* 4way, waybit=0 */ 205 for (addr = INDEX_BASE; addr < end; addr += linesz) { 206 cache_op(Index_Writeback_Inv_D, addr | 0); 207 cache_op(Index_Writeback_Inv_D, addr | 1); 208 cache_op(Index_Writeback_Inv_D, addr | 2); 209 cache_op(Index_Writeback_Inv_D, addr | 3); 210 } 211 } 212 213 static void __init txx9_cache_fixup(void) 214 { 215 unsigned int conf; 216 217 conf = read_c0_config(); 218 /* flush and disable */ 219 if (txx9_ic_disable) { 220 conf |= TX49_CONF_IC; 221 write_c0_config(conf); 222 } 223 if (txx9_dc_disable) { 224 early_flush_dcache(); 225 conf |= TX49_CONF_DC; 226 write_c0_config(conf); 227 } 228 229 /* enable cache */ 230 conf = read_c0_config(); 231 if (!txx9_ic_disable) 232 conf &= ~TX49_CONF_IC; 233 if (!txx9_dc_disable) 234 conf &= ~TX49_CONF_DC; 235 write_c0_config(conf); 236 237 if (conf & TX49_CONF_IC) 238 pr_info("TX49XX I-Cache disabled.\n"); 239 if (conf & TX49_CONF_DC) 240 pr_info("TX49XX D-Cache disabled.\n"); 241 } 242 #elif defined(CONFIG_CPU_TX39XX) 243 /* flush all cache on very early stage (before tx39_cache_init) */ 244 static void __init early_flush_dcache(void) 245 { 246 unsigned int conf = read_c0_config(); 247 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >> 248 TX39_CONF_DCS_SHIFT)); 249 unsigned int linesz = 16; 250 unsigned long addr, end; 251 252 end = INDEX_BASE + dc_size / 2; 253 /* 2way, waybit=0 */ 254 for (addr = INDEX_BASE; addr < end; addr += linesz) { 255 cache_op(Index_Writeback_Inv_D, addr | 0); 256 cache_op(Index_Writeback_Inv_D, addr | 1); 257 } 258 } 259 260 static void __init txx9_cache_fixup(void) 261 { 262 unsigned int conf; 263 264 conf = read_c0_config(); 265 /* flush and disable */ 266 if (txx9_ic_disable) { 267 conf &= ~TX39_CONF_ICE; 268 write_c0_config(conf); 269 } 270 if (txx9_dc_disable) { 271 early_flush_dcache(); 272 conf &= ~TX39_CONF_DCE; 273 write_c0_config(conf); 274 } 275 276 /* enable cache */ 277 conf = read_c0_config(); 278 if (!txx9_ic_disable) 279 conf |= TX39_CONF_ICE; 280 if (!txx9_dc_disable) 281 conf |= TX39_CONF_DCE; 282 write_c0_config(conf); 283 284 if (!(conf & TX39_CONF_ICE)) 285 pr_info("TX39XX I-Cache disabled.\n"); 286 if (!(conf & TX39_CONF_DCE)) 287 pr_info("TX39XX D-Cache disabled.\n"); 288 } 289 #else 290 static inline void txx9_cache_fixup(void) 291 { 292 } 293 #endif 294 295 static void __init preprocess_cmdline(void) 296 { 297 static char cmdline[COMMAND_LINE_SIZE] __initdata; 298 char *s; 299 300 strcpy(cmdline, arcs_cmdline); 301 s = cmdline; 302 arcs_cmdline[0] = '\0'; 303 while (s && *s) { 304 char *str = strsep(&s, " "); 305 if (strncmp(str, "board=", 6) == 0) { 306 txx9_board_vec = find_board_byname(str + 6); 307 continue; 308 } else if (strncmp(str, "masterclk=", 10) == 0) { 309 unsigned long val; 310 if (strict_strtoul(str + 10, 10, &val) == 0) 311 txx9_master_clock = val; 312 continue; 313 } else if (strcmp(str, "icdisable") == 0) { 314 txx9_ic_disable = 1; 315 continue; 316 } else if (strcmp(str, "dcdisable") == 0) { 317 txx9_dc_disable = 1; 318 continue; 319 } else if (strcmp(str, "toeoff") == 0) { 320 txx9_ccfg_toeon = 0; 321 continue; 322 } else if (strcmp(str, "toeon") == 0) { 323 txx9_ccfg_toeon = 1; 324 continue; 325 } 326 if (arcs_cmdline[0]) 327 strcat(arcs_cmdline, " "); 328 strcat(arcs_cmdline, str); 329 } 330 331 txx9_cache_fixup(); 332 } 333 334 static void __init select_board(void) 335 { 336 const char *envstr; 337 338 /* first, determine by "board=" argument in preprocess_cmdline() */ 339 if (txx9_board_vec) 340 return; 341 /* next, determine by "board" envvar */ 342 envstr = prom_getenv("board"); 343 if (envstr) { 344 txx9_board_vec = find_board_byname(envstr); 345 if (txx9_board_vec) 346 return; 347 } 348 349 /* select "default" board */ 350 #ifdef CONFIG_CPU_TX39XX 351 txx9_board_vec = &jmr3927_vec; 352 #endif 353 #ifdef CONFIG_CPU_TX49XX 354 switch (TX4938_REV_PCODE()) { 355 #ifdef CONFIG_TOSHIBA_RBTX4927 356 case 0x4927: 357 txx9_board_vec = &rbtx4927_vec; 358 break; 359 case 0x4937: 360 txx9_board_vec = &rbtx4937_vec; 361 break; 362 #endif 363 #ifdef CONFIG_TOSHIBA_RBTX4938 364 case 0x4938: 365 txx9_board_vec = &rbtx4938_vec; 366 break; 367 #endif 368 #ifdef CONFIG_TOSHIBA_RBTX4939 369 case 0x4939: 370 txx9_board_vec = &rbtx4939_vec; 371 break; 372 #endif 373 } 374 #endif 375 } 376 377 void __init prom_init(void) 378 { 379 prom_init_cmdline(); 380 preprocess_cmdline(); 381 select_board(); 382 383 strcpy(txx9_system_type, txx9_board_vec->system); 384 385 txx9_board_vec->prom_init(); 386 } 387 388 void __init prom_free_prom_memory(void) 389 { 390 unsigned long saddr = PAGE_SIZE; 391 unsigned long eaddr = __pa_symbol(&_text); 392 393 if (saddr < eaddr) 394 free_init_pages("prom memory", saddr, eaddr); 395 } 396 397 const char *get_system_type(void) 398 { 399 return txx9_system_type; 400 } 401 402 char * __init prom_getcmdline(void) 403 { 404 return &(arcs_cmdline[0]); 405 } 406 407 const char *__init prom_getenv(const char *name) 408 { 409 const s32 *str; 410 411 if (fw_arg2 < CKSEG0) 412 return NULL; 413 414 str = (const s32 *)fw_arg2; 415 /* YAMON style ("name", "value" pairs) */ 416 while (str[0] && str[1]) { 417 if (!strcmp((const char *)(unsigned long)str[0], name)) 418 return (const char *)(unsigned long)str[1]; 419 str += 2; 420 } 421 return NULL; 422 } 423 424 static void __noreturn txx9_machine_halt(void) 425 { 426 local_irq_disable(); 427 clear_c0_status(ST0_IM); 428 while (1) { 429 if (cpu_wait) { 430 (*cpu_wait)(); 431 if (cpu_has_counter) { 432 /* 433 * Clear counter interrupt while it 434 * breaks WAIT instruction even if 435 * masked. 436 */ 437 write_c0_compare(0); 438 } 439 } 440 } 441 } 442 443 /* Watchdog support */ 444 void __init txx9_wdt_init(unsigned long base) 445 { 446 struct resource res = { 447 .start = base, 448 .end = base + 0x100 - 1, 449 .flags = IORESOURCE_MEM, 450 }; 451 platform_device_register_simple("txx9wdt", -1, &res, 1); 452 } 453 454 void txx9_wdt_now(unsigned long base) 455 { 456 struct txx9_tmr_reg __iomem *tmrptr = 457 ioremap(base, sizeof(struct txx9_tmr_reg)); 458 /* disable watch dog timer */ 459 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); 460 __raw_writel(0, &tmrptr->tcr); 461 /* kick watchdog */ 462 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); 463 __raw_writel(1, &tmrptr->cpra); /* immediate */ 464 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, 465 &tmrptr->tcr); 466 } 467 468 /* SPI support */ 469 void __init txx9_spi_init(int busid, unsigned long base, int irq) 470 { 471 struct resource res[] = { 472 { 473 .start = base, 474 .end = base + 0x20 - 1, 475 .flags = IORESOURCE_MEM, 476 }, { 477 .start = irq, 478 .flags = IORESOURCE_IRQ, 479 }, 480 }; 481 platform_device_register_simple("spi_txx9", busid, 482 res, ARRAY_SIZE(res)); 483 } 484 485 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) 486 { 487 struct platform_device *pdev = 488 platform_device_alloc("tc35815-mac", id); 489 if (!pdev || 490 platform_device_add_data(pdev, ethaddr, 6) || 491 platform_device_add(pdev)) 492 platform_device_put(pdev); 493 } 494 495 void __init txx9_sio_init(unsigned long baseaddr, int irq, 496 unsigned int line, unsigned int sclk, int nocts) 497 { 498 #ifdef CONFIG_SERIAL_TXX9 499 struct uart_port req; 500 501 memset(&req, 0, sizeof(req)); 502 req.line = line; 503 req.iotype = UPIO_MEM; 504 req.membase = ioremap(baseaddr, 0x24); 505 req.mapbase = baseaddr; 506 req.irq = irq; 507 if (!nocts) 508 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; 509 if (sclk) { 510 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; 511 req.uartclk = sclk; 512 } else 513 req.uartclk = TXX9_IMCLK; 514 early_serial_txx9_setup(&req); 515 #endif /* CONFIG_SERIAL_TXX9 */ 516 } 517 518 #ifdef CONFIG_EARLY_PRINTK 519 static void __init null_prom_putchar(char c) 520 { 521 } 522 void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; 523 524 void __init prom_putchar(char c) 525 { 526 txx9_prom_putchar(c); 527 } 528 529 static void __iomem *early_txx9_sio_port; 530 531 static void __init early_txx9_sio_putchar(char c) 532 { 533 #define TXX9_SICISR 0x0c 534 #define TXX9_SITFIFO 0x1c 535 #define TXX9_SICISR_TXALS 0x00000002 536 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & 537 TXX9_SICISR_TXALS)) 538 ; 539 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); 540 } 541 542 void __init txx9_sio_putchar_init(unsigned long baseaddr) 543 { 544 early_txx9_sio_port = ioremap(baseaddr, 0x24); 545 txx9_prom_putchar = early_txx9_sio_putchar; 546 } 547 #endif /* CONFIG_EARLY_PRINTK */ 548 549 /* wrappers */ 550 void __init plat_mem_setup(void) 551 { 552 ioport_resource.start = 0; 553 ioport_resource.end = ~0UL; /* no limit */ 554 iomem_resource.start = 0; 555 iomem_resource.end = ~0UL; /* no limit */ 556 557 /* fallback restart/halt routines */ 558 _machine_restart = (void (*)(char *))txx9_machine_halt; 559 _machine_halt = txx9_machine_halt; 560 pm_power_off = txx9_machine_halt; 561 562 #ifdef CONFIG_PCI 563 pcibios_plat_setup = txx9_pcibios_setup; 564 #endif 565 txx9_board_vec->mem_setup(); 566 } 567 568 void __init arch_init_irq(void) 569 { 570 txx9_board_vec->irq_setup(); 571 } 572 573 void __init plat_time_init(void) 574 { 575 #ifdef CONFIG_CPU_TX49XX 576 mips_hpt_frequency = txx9_cpu_clock / 2; 577 #endif 578 txx9_board_vec->time_init(); 579 } 580 581 static int __init _txx9_arch_init(void) 582 { 583 if (txx9_board_vec->arch_init) 584 txx9_board_vec->arch_init(); 585 return 0; 586 } 587 arch_initcall(_txx9_arch_init); 588 589 static int __init _txx9_device_init(void) 590 { 591 if (txx9_board_vec->device_init) 592 txx9_board_vec->device_init(); 593 return 0; 594 } 595 device_initcall(_txx9_device_init); 596 597 int (*txx9_irq_dispatch)(int pending); 598 asmlinkage void plat_irq_dispatch(void) 599 { 600 int pending = read_c0_status() & read_c0_cause() & ST0_IM; 601 int irq = txx9_irq_dispatch(pending); 602 603 if (likely(irq >= 0)) 604 do_IRQ(irq); 605 else 606 spurious_interrupt(); 607 } 608 609 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */ 610 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B 611 static unsigned long __swizzle_addr_none(unsigned long port) 612 { 613 return port; 614 } 615 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; 616 EXPORT_SYMBOL(__swizzle_addr_b); 617 #endif 618 619 #ifdef NEEDS_TXX9_IOSWABW 620 static u16 ioswabw_default(volatile u16 *a, u16 x) 621 { 622 return le16_to_cpu(x); 623 } 624 static u16 __mem_ioswabw_default(volatile u16 *a, u16 x) 625 { 626 return x; 627 } 628 u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default; 629 EXPORT_SYMBOL(ioswabw); 630 u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default; 631 EXPORT_SYMBOL(__mem_ioswabw); 632 #endif 633 634 void __init txx9_physmap_flash_init(int no, unsigned long addr, 635 unsigned long size, 636 const struct physmap_flash_data *pdata) 637 { 638 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 639 struct resource res = { 640 .start = addr, 641 .end = addr + size - 1, 642 .flags = IORESOURCE_MEM, 643 }; 644 struct platform_device *pdev; 645 #ifdef CONFIG_MTD_PARTITIONS 646 static struct mtd_partition parts[2]; 647 struct physmap_flash_data pdata_part; 648 649 /* If this area contained boot area, make separate partition */ 650 if (pdata->nr_parts == 0 && !pdata->parts && 651 addr < 0x1fc00000 && addr + size > 0x1fc00000 && 652 !parts[0].name) { 653 parts[0].name = "boot"; 654 parts[0].offset = 0x1fc00000 - addr; 655 parts[0].size = addr + size - 0x1fc00000; 656 parts[1].name = "user"; 657 parts[1].offset = 0; 658 parts[1].size = 0x1fc00000 - addr; 659 pdata_part = *pdata; 660 pdata_part.nr_parts = ARRAY_SIZE(parts); 661 pdata_part.parts = parts; 662 pdata = &pdata_part; 663 } 664 #endif 665 pdev = platform_device_alloc("physmap-flash", no); 666 if (!pdev || 667 platform_device_add_resources(pdev, &res, 1) || 668 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 669 platform_device_add(pdev)) 670 platform_device_put(pdev); 671 #endif 672 } 673 674 void __init txx9_ndfmc_init(unsigned long baseaddr, 675 const struct txx9ndfmc_platform_data *pdata) 676 { 677 #if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \ 678 defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE) 679 struct resource res = { 680 .start = baseaddr, 681 .end = baseaddr + 0x1000 - 1, 682 .flags = IORESOURCE_MEM, 683 }; 684 struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1); 685 686 if (!pdev || 687 platform_device_add_resources(pdev, &res, 1) || 688 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 689 platform_device_add(pdev)) 690 platform_device_put(pdev); 691 #endif 692 } 693 694 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 695 static DEFINE_SPINLOCK(txx9_iocled_lock); 696 697 #define TXX9_IOCLED_MAXLEDS 8 698 699 struct txx9_iocled_data { 700 struct gpio_chip chip; 701 u8 cur_val; 702 void __iomem *mmioaddr; 703 struct gpio_led_platform_data pdata; 704 struct gpio_led leds[TXX9_IOCLED_MAXLEDS]; 705 char names[TXX9_IOCLED_MAXLEDS][32]; 706 }; 707 708 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset) 709 { 710 struct txx9_iocled_data *data = 711 container_of(chip, struct txx9_iocled_data, chip); 712 return data->cur_val & (1 << offset); 713 } 714 715 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset, 716 int value) 717 { 718 struct txx9_iocled_data *data = 719 container_of(chip, struct txx9_iocled_data, chip); 720 unsigned long flags; 721 spin_lock_irqsave(&txx9_iocled_lock, flags); 722 if (value) 723 data->cur_val |= 1 << offset; 724 else 725 data->cur_val &= ~(1 << offset); 726 writeb(data->cur_val, data->mmioaddr); 727 mmiowb(); 728 spin_unlock_irqrestore(&txx9_iocled_lock, flags); 729 } 730 731 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset) 732 { 733 return 0; 734 } 735 736 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset, 737 int value) 738 { 739 txx9_iocled_set(chip, offset, value); 740 return 0; 741 } 742 743 void __init txx9_iocled_init(unsigned long baseaddr, 744 int basenum, unsigned int num, int lowactive, 745 const char *color, char **deftriggers) 746 { 747 struct txx9_iocled_data *iocled; 748 struct platform_device *pdev; 749 int i; 750 static char *default_triggers[] __initdata = { 751 "heartbeat", 752 "ide-disk", 753 "nand-disk", 754 NULL, 755 }; 756 757 if (!deftriggers) 758 deftriggers = default_triggers; 759 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL); 760 if (!iocled) 761 return; 762 iocled->mmioaddr = ioremap(baseaddr, 1); 763 if (!iocled->mmioaddr) 764 goto out_free; 765 iocled->chip.get = txx9_iocled_get; 766 iocled->chip.set = txx9_iocled_set; 767 iocled->chip.direction_input = txx9_iocled_dir_in; 768 iocled->chip.direction_output = txx9_iocled_dir_out; 769 iocled->chip.label = "iocled"; 770 iocled->chip.base = basenum; 771 iocled->chip.ngpio = num; 772 if (gpiochip_add(&iocled->chip)) 773 goto out_unmap; 774 if (basenum < 0) 775 basenum = iocled->chip.base; 776 777 pdev = platform_device_alloc("leds-gpio", basenum); 778 if (!pdev) 779 goto out_gpio; 780 iocled->pdata.num_leds = num; 781 iocled->pdata.leds = iocled->leds; 782 for (i = 0; i < num; i++) { 783 struct gpio_led *led = &iocled->leds[i]; 784 snprintf(iocled->names[i], sizeof(iocled->names[i]), 785 "iocled:%s:%u", color, i); 786 led->name = iocled->names[i]; 787 led->gpio = basenum + i; 788 led->active_low = lowactive; 789 if (deftriggers && *deftriggers) 790 led->default_trigger = *deftriggers++; 791 } 792 pdev->dev.platform_data = &iocled->pdata; 793 if (platform_device_add(pdev)) 794 goto out_pdev; 795 return; 796 out_pdev: 797 platform_device_put(pdev); 798 out_gpio: 799 if (gpiochip_remove(&iocled->chip)) 800 return; 801 out_unmap: 802 iounmap(iocled->mmioaddr); 803 out_free: 804 kfree(iocled); 805 } 806 #else /* CONFIG_LEDS_GPIO */ 807 void __init txx9_iocled_init(unsigned long baseaddr, 808 int basenum, unsigned int num, int lowactive, 809 const char *color, char **deftriggers) 810 { 811 } 812 #endif /* CONFIG_LEDS_GPIO */ 813 814 void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq, 815 const struct txx9dmac_platform_data *pdata) 816 { 817 #if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE) 818 struct resource res[] = { 819 { 820 .start = baseaddr, 821 .end = baseaddr + 0x800 - 1, 822 .flags = IORESOURCE_MEM, 823 #ifndef CONFIG_MACH_TX49XX 824 }, { 825 .start = irq, 826 .flags = IORESOURCE_IRQ, 827 #endif 828 } 829 }; 830 #ifdef CONFIG_MACH_TX49XX 831 struct resource chan_res[] = { 832 { 833 .flags = IORESOURCE_IRQ, 834 } 835 }; 836 #endif 837 struct platform_device *pdev = platform_device_alloc("txx9dmac", id); 838 struct txx9dmac_chan_platform_data cpdata; 839 int i; 840 841 if (!pdev || 842 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || 843 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 844 platform_device_add(pdev)) { 845 platform_device_put(pdev); 846 return; 847 } 848 memset(&cpdata, 0, sizeof(cpdata)); 849 cpdata.dmac_dev = pdev; 850 for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) { 851 #ifdef CONFIG_MACH_TX49XX 852 chan_res[0].start = irq + i; 853 #endif 854 pdev = platform_device_alloc("txx9dmac-chan", 855 id * TXX9_DMA_MAX_NR_CHANNELS + i); 856 if (!pdev || 857 #ifdef CONFIG_MACH_TX49XX 858 platform_device_add_resources(pdev, chan_res, 859 ARRAY_SIZE(chan_res)) || 860 #endif 861 platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) || 862 platform_device_add(pdev)) 863 platform_device_put(pdev); 864 } 865 #endif 866 } 867 868 void __init txx9_aclc_init(unsigned long baseaddr, int irq, 869 unsigned int dmac_id, 870 unsigned int dma_chan_out, 871 unsigned int dma_chan_in) 872 { 873 #if defined(CONFIG_SND_SOC_TXX9ACLC) || \ 874 defined(CONFIG_SND_SOC_TXX9ACLC_MODULE) 875 unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS; 876 struct resource res[] = { 877 { 878 .start = baseaddr, 879 .end = baseaddr + 0x100 - 1, 880 .flags = IORESOURCE_MEM, 881 }, { 882 .start = irq, 883 .flags = IORESOURCE_IRQ, 884 }, { 885 .name = "txx9dmac-chan", 886 .start = dma_base + dma_chan_out, 887 .flags = IORESOURCE_DMA, 888 }, { 889 .name = "txx9dmac-chan", 890 .start = dma_base + dma_chan_in, 891 .flags = IORESOURCE_DMA, 892 } 893 }; 894 struct platform_device *pdev = 895 platform_device_alloc("txx9aclc-ac97", -1); 896 897 if (!pdev || 898 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || 899 platform_device_add(pdev)) 900 platform_device_put(pdev); 901 #endif 902 } 903 904 static struct sysdev_class txx9_sramc_sysdev_class; 905 906 struct txx9_sramc_sysdev { 907 struct sys_device dev; 908 struct bin_attribute bindata_attr; 909 void __iomem *base; 910 }; 911 912 static ssize_t txx9_sram_read(struct kobject *kobj, 913 struct bin_attribute *bin_attr, 914 char *buf, loff_t pos, size_t size) 915 { 916 struct txx9_sramc_sysdev *dev = bin_attr->private; 917 size_t ramsize = bin_attr->size; 918 919 if (pos >= ramsize) 920 return 0; 921 if (pos + size > ramsize) 922 size = ramsize - pos; 923 memcpy_fromio(buf, dev->base + pos, size); 924 return size; 925 } 926 927 static ssize_t txx9_sram_write(struct kobject *kobj, 928 struct bin_attribute *bin_attr, 929 char *buf, loff_t pos, size_t size) 930 { 931 struct txx9_sramc_sysdev *dev = bin_attr->private; 932 size_t ramsize = bin_attr->size; 933 934 if (pos >= ramsize) 935 return 0; 936 if (pos + size > ramsize) 937 size = ramsize - pos; 938 memcpy_toio(dev->base + pos, buf, size); 939 return size; 940 } 941 942 void __init txx9_sramc_init(struct resource *r) 943 { 944 struct txx9_sramc_sysdev *dev; 945 size_t size; 946 int err; 947 948 if (!txx9_sramc_sysdev_class.name) { 949 txx9_sramc_sysdev_class.name = "txx9_sram"; 950 err = sysdev_class_register(&txx9_sramc_sysdev_class); 951 if (err) { 952 txx9_sramc_sysdev_class.name = NULL; 953 return; 954 } 955 } 956 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 957 if (!dev) 958 return; 959 size = resource_size(r); 960 dev->base = ioremap(r->start, size); 961 if (!dev->base) 962 goto exit; 963 dev->dev.cls = &txx9_sramc_sysdev_class; 964 dev->bindata_attr.attr.name = "bindata"; 965 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR; 966 dev->bindata_attr.read = txx9_sram_read; 967 dev->bindata_attr.write = txx9_sram_write; 968 dev->bindata_attr.size = size; 969 dev->bindata_attr.private = dev; 970 err = sysdev_register(&dev->dev); 971 if (err) 972 goto exit; 973 err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr); 974 if (err) { 975 sysdev_unregister(&dev->dev); 976 goto exit; 977 } 978 return; 979 exit: 980 if (dev) { 981 if (dev->base) 982 iounmap(dev->base); 983 kfree(dev); 984 } 985 } 986