xref: /openbmc/linux/arch/mips/txx9/generic/setup.c (revision 97b0511c)
1 /*
2  * linux/arch/mips/txx9/generic/setup.c
3  *
4  * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
5  *	    and RBTX49xx patch from CELF patch archive.
6  *
7  * 2003-2005 (c) MontaVista Software, Inc.
8  * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
9  *
10  * This file is subject to the terms and conditions of the GNU General Public
11  * License.  See the file "COPYING" in the main directory of this archive
12  * for more details.
13  */
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/string.h>
19 #include <linux/module.h>
20 #include <linux/clk.h>
21 #include <linux/err.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/serial_core.h>
25 #include <linux/mtd/physmap.h>
26 #include <linux/leds.h>
27 #include <asm/bootinfo.h>
28 #include <asm/time.h>
29 #include <asm/reboot.h>
30 #include <asm/r4kcache.h>
31 #include <asm/sections.h>
32 #include <asm/txx9/generic.h>
33 #include <asm/txx9/pci.h>
34 #include <asm/txx9tmr.h>
35 #ifdef CONFIG_CPU_TX49XX
36 #include <asm/txx9/tx4938.h>
37 #endif
38 
39 /* EBUSC settings of TX4927, etc. */
40 struct resource txx9_ce_res[8];
41 static char txx9_ce_res_name[8][4];	/* "CEn" */
42 
43 /* pcode, internal register */
44 unsigned int txx9_pcode;
45 char txx9_pcode_str[8];
46 static struct resource txx9_reg_res = {
47 	.name = txx9_pcode_str,
48 	.flags = IORESOURCE_MEM,
49 };
50 void __init
51 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
52 {
53 	int i;
54 
55 	for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
56 		sprintf(txx9_ce_res_name[i], "CE%d", i);
57 		txx9_ce_res[i].flags = IORESOURCE_MEM;
58 		txx9_ce_res[i].name = txx9_ce_res_name[i];
59 	}
60 
61 	txx9_pcode = pcode;
62 	sprintf(txx9_pcode_str, "TX%x", pcode);
63 	if (base) {
64 		txx9_reg_res.start = base & 0xfffffffffULL;
65 		txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
66 		request_resource(&iomem_resource, &txx9_reg_res);
67 	}
68 }
69 
70 /* clocks */
71 unsigned int txx9_master_clock;
72 unsigned int txx9_cpu_clock;
73 unsigned int txx9_gbus_clock;
74 
75 #ifdef CONFIG_CPU_TX39XX
76 /* don't enable by default - see errata */
77 int txx9_ccfg_toeon __initdata;
78 #else
79 int txx9_ccfg_toeon __initdata = 1;
80 #endif
81 
82 /* Minimum CLK support */
83 
84 struct clk *clk_get(struct device *dev, const char *id)
85 {
86 	if (!strcmp(id, "spi-baseclk"))
87 		return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
88 	if (!strcmp(id, "imbus_clk"))
89 		return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
90 	return ERR_PTR(-ENOENT);
91 }
92 EXPORT_SYMBOL(clk_get);
93 
94 int clk_enable(struct clk *clk)
95 {
96 	return 0;
97 }
98 EXPORT_SYMBOL(clk_enable);
99 
100 void clk_disable(struct clk *clk)
101 {
102 }
103 EXPORT_SYMBOL(clk_disable);
104 
105 unsigned long clk_get_rate(struct clk *clk)
106 {
107 	return (unsigned long)clk;
108 }
109 EXPORT_SYMBOL(clk_get_rate);
110 
111 void clk_put(struct clk *clk)
112 {
113 }
114 EXPORT_SYMBOL(clk_put);
115 
116 /* GPIO support */
117 
118 #ifdef CONFIG_GENERIC_GPIO
119 int gpio_to_irq(unsigned gpio)
120 {
121 	return -EINVAL;
122 }
123 EXPORT_SYMBOL(gpio_to_irq);
124 
125 int irq_to_gpio(unsigned irq)
126 {
127 	return -EINVAL;
128 }
129 EXPORT_SYMBOL(irq_to_gpio);
130 #endif
131 
132 #define BOARD_VEC(board)	extern struct txx9_board_vec board;
133 #include <asm/txx9/boards.h>
134 #undef BOARD_VEC
135 
136 struct txx9_board_vec *txx9_board_vec __initdata;
137 static char txx9_system_type[32];
138 
139 static struct txx9_board_vec *board_vecs[] __initdata = {
140 #define BOARD_VEC(board)	&board,
141 #include <asm/txx9/boards.h>
142 #undef BOARD_VEC
143 };
144 
145 static struct txx9_board_vec *__init find_board_byname(const char *name)
146 {
147 	int i;
148 
149 	/* search board_vecs table */
150 	for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
151 		if (strstr(board_vecs[i]->system, name))
152 			return board_vecs[i];
153 	}
154 	return NULL;
155 }
156 
157 static void __init prom_init_cmdline(void)
158 {
159 	int argc;
160 	int *argv32;
161 	int i;			/* Always ignore the "-c" at argv[0] */
162 	char builtin[CL_SIZE];
163 
164 	if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
165 		/*
166 		 * argc is not a valid number, or argv32 is not a valid
167 		 * pointer
168 		 */
169 		argc = 0;
170 		argv32 = NULL;
171 	} else {
172 		argc = (int)fw_arg0;
173 		argv32 = (int *)fw_arg1;
174 	}
175 
176 	/* ignore all built-in args if any f/w args given */
177 	/*
178 	 * But if built-in strings was started with '+', append them
179 	 * to command line args.  If built-in was started with '-',
180 	 * ignore all f/w args.
181 	 */
182 	builtin[0] = '\0';
183 	if (arcs_cmdline[0] == '+')
184 		strcpy(builtin, arcs_cmdline + 1);
185 	else if (arcs_cmdline[0] == '-') {
186 		strcpy(builtin, arcs_cmdline + 1);
187 		argc = 0;
188 	} else if (argc <= 1)
189 		strcpy(builtin, arcs_cmdline);
190 	arcs_cmdline[0] = '\0';
191 
192 	for (i = 1; i < argc; i++) {
193 		char *str = (char *)(long)argv32[i];
194 		if (i != 1)
195 			strcat(arcs_cmdline, " ");
196 		if (strchr(str, ' ')) {
197 			strcat(arcs_cmdline, "\"");
198 			strcat(arcs_cmdline, str);
199 			strcat(arcs_cmdline, "\"");
200 		} else
201 			strcat(arcs_cmdline, str);
202 	}
203 	/* append saved builtin args */
204 	if (builtin[0]) {
205 		if (arcs_cmdline[0])
206 			strcat(arcs_cmdline, " ");
207 		strcat(arcs_cmdline, builtin);
208 	}
209 }
210 
211 static int txx9_ic_disable __initdata;
212 static int txx9_dc_disable __initdata;
213 
214 #if defined(CONFIG_CPU_TX49XX)
215 /* flush all cache on very early stage (before 4k_cache_init) */
216 static void __init early_flush_dcache(void)
217 {
218 	unsigned int conf = read_c0_config();
219 	unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
220 	unsigned int linesz = 32;
221 	unsigned long addr, end;
222 
223 	end = INDEX_BASE + dc_size / 4;
224 	/* 4way, waybit=0 */
225 	for (addr = INDEX_BASE; addr < end; addr += linesz) {
226 		cache_op(Index_Writeback_Inv_D, addr | 0);
227 		cache_op(Index_Writeback_Inv_D, addr | 1);
228 		cache_op(Index_Writeback_Inv_D, addr | 2);
229 		cache_op(Index_Writeback_Inv_D, addr | 3);
230 	}
231 }
232 
233 static void __init txx9_cache_fixup(void)
234 {
235 	unsigned int conf;
236 
237 	conf = read_c0_config();
238 	/* flush and disable */
239 	if (txx9_ic_disable) {
240 		conf |= TX49_CONF_IC;
241 		write_c0_config(conf);
242 	}
243 	if (txx9_dc_disable) {
244 		early_flush_dcache();
245 		conf |= TX49_CONF_DC;
246 		write_c0_config(conf);
247 	}
248 
249 	/* enable cache */
250 	conf = read_c0_config();
251 	if (!txx9_ic_disable)
252 		conf &= ~TX49_CONF_IC;
253 	if (!txx9_dc_disable)
254 		conf &= ~TX49_CONF_DC;
255 	write_c0_config(conf);
256 
257 	if (conf & TX49_CONF_IC)
258 		pr_info("TX49XX I-Cache disabled.\n");
259 	if (conf & TX49_CONF_DC)
260 		pr_info("TX49XX D-Cache disabled.\n");
261 }
262 #elif defined(CONFIG_CPU_TX39XX)
263 /* flush all cache on very early stage (before tx39_cache_init) */
264 static void __init early_flush_dcache(void)
265 {
266 	unsigned int conf = read_c0_config();
267 	unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
268 					   TX39_CONF_DCS_SHIFT));
269 	unsigned int linesz = 16;
270 	unsigned long addr, end;
271 
272 	end = INDEX_BASE + dc_size / 2;
273 	/* 2way, waybit=0 */
274 	for (addr = INDEX_BASE; addr < end; addr += linesz) {
275 		cache_op(Index_Writeback_Inv_D, addr | 0);
276 		cache_op(Index_Writeback_Inv_D, addr | 1);
277 	}
278 }
279 
280 static void __init txx9_cache_fixup(void)
281 {
282 	unsigned int conf;
283 
284 	conf = read_c0_config();
285 	/* flush and disable */
286 	if (txx9_ic_disable) {
287 		conf &= ~TX39_CONF_ICE;
288 		write_c0_config(conf);
289 	}
290 	if (txx9_dc_disable) {
291 		early_flush_dcache();
292 		conf &= ~TX39_CONF_DCE;
293 		write_c0_config(conf);
294 	}
295 
296 	/* enable cache */
297 	conf = read_c0_config();
298 	if (!txx9_ic_disable)
299 		conf |= TX39_CONF_ICE;
300 	if (!txx9_dc_disable)
301 		conf |= TX39_CONF_DCE;
302 	write_c0_config(conf);
303 
304 	if (!(conf & TX39_CONF_ICE))
305 		pr_info("TX39XX I-Cache disabled.\n");
306 	if (!(conf & TX39_CONF_DCE))
307 		pr_info("TX39XX D-Cache disabled.\n");
308 }
309 #else
310 static inline void txx9_cache_fixup(void)
311 {
312 }
313 #endif
314 
315 static void __init preprocess_cmdline(void)
316 {
317 	char cmdline[CL_SIZE];
318 	char *s;
319 
320 	strcpy(cmdline, arcs_cmdline);
321 	s = cmdline;
322 	arcs_cmdline[0] = '\0';
323 	while (s && *s) {
324 		char *str = strsep(&s, " ");
325 		if (strncmp(str, "board=", 6) == 0) {
326 			txx9_board_vec = find_board_byname(str + 6);
327 			continue;
328 		} else if (strncmp(str, "masterclk=", 10) == 0) {
329 			unsigned long val;
330 			if (strict_strtoul(str + 10, 10, &val) == 0)
331 				txx9_master_clock = val;
332 			continue;
333 		} else if (strcmp(str, "icdisable") == 0) {
334 			txx9_ic_disable = 1;
335 			continue;
336 		} else if (strcmp(str, "dcdisable") == 0) {
337 			txx9_dc_disable = 1;
338 			continue;
339 		} else if (strcmp(str, "toeoff") == 0) {
340 			txx9_ccfg_toeon = 0;
341 			continue;
342 		} else if (strcmp(str, "toeon") == 0) {
343 			txx9_ccfg_toeon = 1;
344 			continue;
345 		}
346 		if (arcs_cmdline[0])
347 			strcat(arcs_cmdline, " ");
348 		strcat(arcs_cmdline, str);
349 	}
350 
351 	txx9_cache_fixup();
352 }
353 
354 static void __init select_board(void)
355 {
356 	const char *envstr;
357 
358 	/* first, determine by "board=" argument in preprocess_cmdline() */
359 	if (txx9_board_vec)
360 		return;
361 	/* next, determine by "board" envvar */
362 	envstr = prom_getenv("board");
363 	if (envstr) {
364 		txx9_board_vec = find_board_byname(envstr);
365 		if (txx9_board_vec)
366 			return;
367 	}
368 
369 	/* select "default" board */
370 #ifdef CONFIG_CPU_TX39XX
371 	txx9_board_vec = &jmr3927_vec;
372 #endif
373 #ifdef CONFIG_CPU_TX49XX
374 	switch (TX4938_REV_PCODE()) {
375 #ifdef CONFIG_TOSHIBA_RBTX4927
376 	case 0x4927:
377 		txx9_board_vec = &rbtx4927_vec;
378 		break;
379 	case 0x4937:
380 		txx9_board_vec = &rbtx4937_vec;
381 		break;
382 #endif
383 #ifdef CONFIG_TOSHIBA_RBTX4938
384 	case 0x4938:
385 		txx9_board_vec = &rbtx4938_vec;
386 		break;
387 #endif
388 #ifdef CONFIG_TOSHIBA_RBTX4939
389 	case 0x4939:
390 		txx9_board_vec = &rbtx4939_vec;
391 		break;
392 #endif
393 	}
394 #endif
395 }
396 
397 void __init prom_init(void)
398 {
399 	prom_init_cmdline();
400 	preprocess_cmdline();
401 	select_board();
402 
403 	strcpy(txx9_system_type, txx9_board_vec->system);
404 
405 	txx9_board_vec->prom_init();
406 }
407 
408 void __init prom_free_prom_memory(void)
409 {
410 	unsigned long saddr = PAGE_SIZE;
411 	unsigned long eaddr = __pa_symbol(&_text);
412 
413 	if (saddr < eaddr)
414 		free_init_pages("prom memory", saddr, eaddr);
415 }
416 
417 const char *get_system_type(void)
418 {
419 	return txx9_system_type;
420 }
421 
422 char * __init prom_getcmdline(void)
423 {
424 	return &(arcs_cmdline[0]);
425 }
426 
427 const char *__init prom_getenv(const char *name)
428 {
429 	const s32 *str;
430 
431 	if (fw_arg2 < CKSEG0)
432 		return NULL;
433 
434 	str = (const s32 *)fw_arg2;
435 	/* YAMON style ("name", "value" pairs) */
436 	while (str[0] && str[1]) {
437 		if (!strcmp((const char *)(unsigned long)str[0], name))
438 			return (const char *)(unsigned long)str[1];
439 		str += 2;
440 	}
441 	return NULL;
442 }
443 
444 static void __noreturn txx9_machine_halt(void)
445 {
446 	local_irq_disable();
447 	clear_c0_status(ST0_IM);
448 	while (1) {
449 		if (cpu_wait) {
450 			(*cpu_wait)();
451 			if (cpu_has_counter) {
452 				/*
453 				 * Clear counter interrupt while it
454 				 * breaks WAIT instruction even if
455 				 * masked.
456 				 */
457 				write_c0_compare(0);
458 			}
459 		}
460 	}
461 }
462 
463 /* Watchdog support */
464 void __init txx9_wdt_init(unsigned long base)
465 {
466 	struct resource res = {
467 		.start	= base,
468 		.end	= base + 0x100 - 1,
469 		.flags	= IORESOURCE_MEM,
470 	};
471 	platform_device_register_simple("txx9wdt", -1, &res, 1);
472 }
473 
474 void txx9_wdt_now(unsigned long base)
475 {
476 	struct txx9_tmr_reg __iomem *tmrptr =
477 		ioremap(base, sizeof(struct txx9_tmr_reg));
478 	/* disable watch dog timer */
479 	__raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
480 	__raw_writel(0, &tmrptr->tcr);
481 	/* kick watchdog */
482 	__raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
483 	__raw_writel(1, &tmrptr->cpra); /* immediate */
484 	__raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
485 		     &tmrptr->tcr);
486 }
487 
488 /* SPI support */
489 void __init txx9_spi_init(int busid, unsigned long base, int irq)
490 {
491 	struct resource res[] = {
492 		{
493 			.start	= base,
494 			.end	= base + 0x20 - 1,
495 			.flags	= IORESOURCE_MEM,
496 		}, {
497 			.start	= irq,
498 			.flags	= IORESOURCE_IRQ,
499 		},
500 	};
501 	platform_device_register_simple("spi_txx9", busid,
502 					res, ARRAY_SIZE(res));
503 }
504 
505 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
506 {
507 	struct platform_device *pdev =
508 		platform_device_alloc("tc35815-mac", id);
509 	if (!pdev ||
510 	    platform_device_add_data(pdev, ethaddr, 6) ||
511 	    platform_device_add(pdev))
512 		platform_device_put(pdev);
513 }
514 
515 void __init txx9_sio_init(unsigned long baseaddr, int irq,
516 			  unsigned int line, unsigned int sclk, int nocts)
517 {
518 #ifdef CONFIG_SERIAL_TXX9
519 	struct uart_port req;
520 
521 	memset(&req, 0, sizeof(req));
522 	req.line = line;
523 	req.iotype = UPIO_MEM;
524 	req.membase = ioremap(baseaddr, 0x24);
525 	req.mapbase = baseaddr;
526 	req.irq = irq;
527 	if (!nocts)
528 		req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
529 	if (sclk) {
530 		req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
531 		req.uartclk = sclk;
532 	} else
533 		req.uartclk = TXX9_IMCLK;
534 	early_serial_txx9_setup(&req);
535 #endif /* CONFIG_SERIAL_TXX9 */
536 }
537 
538 #ifdef CONFIG_EARLY_PRINTK
539 static void __init null_prom_putchar(char c)
540 {
541 }
542 void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
543 
544 void __init prom_putchar(char c)
545 {
546 	txx9_prom_putchar(c);
547 }
548 
549 static void __iomem *early_txx9_sio_port;
550 
551 static void __init early_txx9_sio_putchar(char c)
552 {
553 #define TXX9_SICISR	0x0c
554 #define TXX9_SITFIFO	0x1c
555 #define TXX9_SICISR_TXALS	0x00000002
556 	while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
557 		 TXX9_SICISR_TXALS))
558 		;
559 	__raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
560 }
561 
562 void __init txx9_sio_putchar_init(unsigned long baseaddr)
563 {
564 	early_txx9_sio_port = ioremap(baseaddr, 0x24);
565 	txx9_prom_putchar = early_txx9_sio_putchar;
566 }
567 #endif /* CONFIG_EARLY_PRINTK */
568 
569 /* wrappers */
570 void __init plat_mem_setup(void)
571 {
572 	ioport_resource.start = 0;
573 	ioport_resource.end = ~0UL;	/* no limit */
574 	iomem_resource.start = 0;
575 	iomem_resource.end = ~0UL;	/* no limit */
576 
577 	/* fallback restart/halt routines */
578 	_machine_restart = (void (*)(char *))txx9_machine_halt;
579 	_machine_halt = txx9_machine_halt;
580 	pm_power_off = txx9_machine_halt;
581 
582 #ifdef CONFIG_PCI
583 	pcibios_plat_setup = txx9_pcibios_setup;
584 #endif
585 	txx9_board_vec->mem_setup();
586 }
587 
588 void __init arch_init_irq(void)
589 {
590 	txx9_board_vec->irq_setup();
591 }
592 
593 void __init plat_time_init(void)
594 {
595 #ifdef CONFIG_CPU_TX49XX
596 	mips_hpt_frequency = txx9_cpu_clock / 2;
597 #endif
598 	txx9_board_vec->time_init();
599 }
600 
601 static int __init _txx9_arch_init(void)
602 {
603 	if (txx9_board_vec->arch_init)
604 		txx9_board_vec->arch_init();
605 	return 0;
606 }
607 arch_initcall(_txx9_arch_init);
608 
609 static int __init _txx9_device_init(void)
610 {
611 	if (txx9_board_vec->device_init)
612 		txx9_board_vec->device_init();
613 	return 0;
614 }
615 device_initcall(_txx9_device_init);
616 
617 int (*txx9_irq_dispatch)(int pending);
618 asmlinkage void plat_irq_dispatch(void)
619 {
620 	int pending = read_c0_status() & read_c0_cause() & ST0_IM;
621 	int irq = txx9_irq_dispatch(pending);
622 
623 	if (likely(irq >= 0))
624 		do_IRQ(irq);
625 	else
626 		spurious_interrupt();
627 }
628 
629 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
630 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
631 static unsigned long __swizzle_addr_none(unsigned long port)
632 {
633 	return port;
634 }
635 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
636 EXPORT_SYMBOL(__swizzle_addr_b);
637 #endif
638 
639 #ifdef NEEDS_TXX9_IOSWABW
640 static u16 ioswabw_default(volatile u16 *a, u16 x)
641 {
642 	return le16_to_cpu(x);
643 }
644 static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
645 {
646 	return x;
647 }
648 u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
649 EXPORT_SYMBOL(ioswabw);
650 u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
651 EXPORT_SYMBOL(__mem_ioswabw);
652 #endif
653 
654 void __init txx9_physmap_flash_init(int no, unsigned long addr,
655 				    unsigned long size,
656 				    const struct physmap_flash_data *pdata)
657 {
658 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
659 	struct resource res = {
660 		.start = addr,
661 		.end = addr + size - 1,
662 		.flags = IORESOURCE_MEM,
663 	};
664 	struct platform_device *pdev;
665 #ifdef CONFIG_MTD_PARTITIONS
666 	static struct mtd_partition parts[2];
667 	struct physmap_flash_data pdata_part;
668 
669 	/* If this area contained boot area, make separate partition */
670 	if (pdata->nr_parts == 0 && !pdata->parts &&
671 	    addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
672 	    !parts[0].name) {
673 		parts[0].name = "boot";
674 		parts[0].offset = 0x1fc00000 - addr;
675 		parts[0].size = addr + size - 0x1fc00000;
676 		parts[1].name = "user";
677 		parts[1].offset = 0;
678 		parts[1].size = 0x1fc00000 - addr;
679 		pdata_part = *pdata;
680 		pdata_part.nr_parts = ARRAY_SIZE(parts);
681 		pdata_part.parts = parts;
682 		pdata = &pdata_part;
683 	}
684 #endif
685 	pdev = platform_device_alloc("physmap-flash", no);
686 	if (!pdev ||
687 	    platform_device_add_resources(pdev, &res, 1) ||
688 	    platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
689 	    platform_device_add(pdev))
690 		platform_device_put(pdev);
691 #endif
692 }
693 
694 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
695 static DEFINE_SPINLOCK(txx9_iocled_lock);
696 
697 #define TXX9_IOCLED_MAXLEDS 8
698 
699 struct txx9_iocled_data {
700 	struct gpio_chip chip;
701 	u8 cur_val;
702 	void __iomem *mmioaddr;
703 	struct gpio_led_platform_data pdata;
704 	struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
705 	char names[TXX9_IOCLED_MAXLEDS][32];
706 };
707 
708 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
709 {
710 	struct txx9_iocled_data *data =
711 		container_of(chip, struct txx9_iocled_data, chip);
712 	return data->cur_val & (1 << offset);
713 }
714 
715 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
716 			    int value)
717 {
718 	struct txx9_iocled_data *data =
719 		container_of(chip, struct txx9_iocled_data, chip);
720 	unsigned long flags;
721 	spin_lock_irqsave(&txx9_iocled_lock, flags);
722 	if (value)
723 		data->cur_val |= 1 << offset;
724 	else
725 		data->cur_val &= ~(1 << offset);
726 	writeb(data->cur_val, data->mmioaddr);
727 	mmiowb();
728 	spin_unlock_irqrestore(&txx9_iocled_lock, flags);
729 }
730 
731 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
732 {
733 	return 0;
734 }
735 
736 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
737 			       int value)
738 {
739 	txx9_iocled_set(chip, offset, value);
740 	return 0;
741 }
742 
743 void __init txx9_iocled_init(unsigned long baseaddr,
744 			     int basenum, unsigned int num, int lowactive,
745 			     const char *color, char **deftriggers)
746 {
747 	struct txx9_iocled_data *iocled;
748 	struct platform_device *pdev;
749 	int i;
750 	static char *default_triggers[] __initdata = {
751 		"heartbeat",
752 		"ide-disk",
753 		"nand-disk",
754 		NULL,
755 	};
756 
757 	if (!deftriggers)
758 		deftriggers = default_triggers;
759 	iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
760 	if (!iocled)
761 		return;
762 	iocled->mmioaddr = ioremap(baseaddr, 1);
763 	if (!iocled->mmioaddr)
764 		return;
765 	iocled->chip.get = txx9_iocled_get;
766 	iocled->chip.set = txx9_iocled_set;
767 	iocled->chip.direction_input = txx9_iocled_dir_in;
768 	iocled->chip.direction_output = txx9_iocled_dir_out;
769 	iocled->chip.label = "iocled";
770 	iocled->chip.base = basenum;
771 	iocled->chip.ngpio = num;
772 	if (gpiochip_add(&iocled->chip))
773 		return;
774 	if (basenum < 0)
775 		basenum = iocled->chip.base;
776 
777 	pdev = platform_device_alloc("leds-gpio", basenum);
778 	if (!pdev)
779 		return;
780 	iocled->pdata.num_leds = num;
781 	iocled->pdata.leds = iocled->leds;
782 	for (i = 0; i < num; i++) {
783 		struct gpio_led *led = &iocled->leds[i];
784 		snprintf(iocled->names[i], sizeof(iocled->names[i]),
785 			 "iocled:%s:%u", color, i);
786 		led->name = iocled->names[i];
787 		led->gpio = basenum + i;
788 		led->active_low = lowactive;
789 		if (deftriggers && *deftriggers)
790 			led->default_trigger = *deftriggers++;
791 	}
792 	pdev->dev.platform_data = &iocled->pdata;
793 	if (platform_device_add(pdev))
794 		platform_device_put(pdev);
795 }
796 #else /* CONFIG_LEDS_GPIO */
797 void __init txx9_iocled_init(unsigned long baseaddr,
798 			     int basenum, unsigned int num, int lowactive,
799 			     const char *color, char **deftriggers)
800 {
801 }
802 #endif /* CONFIG_LEDS_GPIO */
803