1 /* 2 * Based on linux/arch/mips/txx9/rbtx4938/setup.c, 3 * and RBTX49xx patch from CELF patch archive. 4 * 5 * 2003-2005 (c) MontaVista Software, Inc. 6 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 #include <linux/init.h> 13 #include <linux/kernel.h> 14 #include <linux/types.h> 15 #include <linux/interrupt.h> 16 #include <linux/string.h> 17 #include <linux/export.h> 18 #include <linux/clk-provider.h> 19 #include <linux/clkdev.h> 20 #include <linux/err.h> 21 #include <linux/gpio/driver.h> 22 #include <linux/platform_device.h> 23 #include <linux/platform_data/txx9/ndfmc.h> 24 #include <linux/serial_core.h> 25 #include <linux/mtd/physmap.h> 26 #include <linux/leds.h> 27 #include <linux/device.h> 28 #include <linux/slab.h> 29 #include <linux/io.h> 30 #include <linux/irq.h> 31 #include <asm/bootinfo.h> 32 #include <asm/idle.h> 33 #include <asm/time.h> 34 #include <asm/reboot.h> 35 #include <asm/r4kcache.h> 36 #include <asm/setup.h> 37 #include <asm/txx9/generic.h> 38 #include <asm/txx9/pci.h> 39 #include <asm/txx9tmr.h> 40 #include <asm/txx9/dmac.h> 41 #ifdef CONFIG_CPU_TX49XX 42 #include <asm/txx9/tx4938.h> 43 #endif 44 45 /* EBUSC settings of TX4927, etc. */ 46 struct resource txx9_ce_res[8]; 47 static char txx9_ce_res_name[8][4]; /* "CEn" */ 48 49 /* pcode, internal register */ 50 unsigned int txx9_pcode; 51 char txx9_pcode_str[8]; 52 static struct resource txx9_reg_res = { 53 .name = txx9_pcode_str, 54 .flags = IORESOURCE_MEM, 55 }; 56 void __init 57 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size) 58 { 59 int i; 60 61 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) { 62 sprintf(txx9_ce_res_name[i], "CE%d", i); 63 txx9_ce_res[i].flags = IORESOURCE_MEM; 64 txx9_ce_res[i].name = txx9_ce_res_name[i]; 65 } 66 67 txx9_pcode = pcode; 68 sprintf(txx9_pcode_str, "TX%x", pcode); 69 if (base) { 70 txx9_reg_res.start = base & 0xfffffffffULL; 71 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1); 72 request_resource(&iomem_resource, &txx9_reg_res); 73 } 74 } 75 76 /* clocks */ 77 unsigned int txx9_master_clock; 78 unsigned int txx9_cpu_clock; 79 unsigned int txx9_gbus_clock; 80 81 #ifdef CONFIG_CPU_TX39XX 82 /* don't enable by default - see errata */ 83 int txx9_ccfg_toeon __initdata; 84 #else 85 int txx9_ccfg_toeon __initdata = 1; 86 #endif 87 88 #define BOARD_VEC(board) extern struct txx9_board_vec board; 89 #include <asm/txx9/boards.h> 90 #undef BOARD_VEC 91 92 struct txx9_board_vec *txx9_board_vec __initdata; 93 static char txx9_system_type[32]; 94 95 static struct txx9_board_vec *board_vecs[] __initdata = { 96 #define BOARD_VEC(board) &board, 97 #include <asm/txx9/boards.h> 98 #undef BOARD_VEC 99 }; 100 101 static struct txx9_board_vec *__init find_board_byname(const char *name) 102 { 103 int i; 104 105 /* search board_vecs table */ 106 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { 107 if (strstr(board_vecs[i]->system, name)) 108 return board_vecs[i]; 109 } 110 return NULL; 111 } 112 113 static void __init prom_init_cmdline(void) 114 { 115 int argc; 116 int *argv32; 117 int i; /* Always ignore the "-c" at argv[0] */ 118 119 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { 120 /* 121 * argc is not a valid number, or argv32 is not a valid 122 * pointer 123 */ 124 argc = 0; 125 argv32 = NULL; 126 } else { 127 argc = (int)fw_arg0; 128 argv32 = (int *)fw_arg1; 129 } 130 131 arcs_cmdline[0] = '\0'; 132 133 for (i = 1; i < argc; i++) { 134 char *str = (char *)(long)argv32[i]; 135 if (i != 1) 136 strcat(arcs_cmdline, " "); 137 if (strchr(str, ' ')) { 138 strcat(arcs_cmdline, "\""); 139 strcat(arcs_cmdline, str); 140 strcat(arcs_cmdline, "\""); 141 } else 142 strcat(arcs_cmdline, str); 143 } 144 } 145 146 static int txx9_ic_disable __initdata; 147 static int txx9_dc_disable __initdata; 148 149 #if defined(CONFIG_CPU_TX49XX) 150 /* flush all cache on very early stage (before 4k_cache_init) */ 151 static void __init early_flush_dcache(void) 152 { 153 unsigned int conf = read_c0_config(); 154 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6)); 155 unsigned int linesz = 32; 156 unsigned long addr, end; 157 158 end = INDEX_BASE + dc_size / 4; 159 /* 4way, waybit=0 */ 160 for (addr = INDEX_BASE; addr < end; addr += linesz) { 161 cache_op(Index_Writeback_Inv_D, addr | 0); 162 cache_op(Index_Writeback_Inv_D, addr | 1); 163 cache_op(Index_Writeback_Inv_D, addr | 2); 164 cache_op(Index_Writeback_Inv_D, addr | 3); 165 } 166 } 167 168 static void __init txx9_cache_fixup(void) 169 { 170 unsigned int conf; 171 172 conf = read_c0_config(); 173 /* flush and disable */ 174 if (txx9_ic_disable) { 175 conf |= TX49_CONF_IC; 176 write_c0_config(conf); 177 } 178 if (txx9_dc_disable) { 179 early_flush_dcache(); 180 conf |= TX49_CONF_DC; 181 write_c0_config(conf); 182 } 183 184 /* enable cache */ 185 conf = read_c0_config(); 186 if (!txx9_ic_disable) 187 conf &= ~TX49_CONF_IC; 188 if (!txx9_dc_disable) 189 conf &= ~TX49_CONF_DC; 190 write_c0_config(conf); 191 192 if (conf & TX49_CONF_IC) 193 pr_info("TX49XX I-Cache disabled.\n"); 194 if (conf & TX49_CONF_DC) 195 pr_info("TX49XX D-Cache disabled.\n"); 196 } 197 #elif defined(CONFIG_CPU_TX39XX) 198 /* flush all cache on very early stage (before tx39_cache_init) */ 199 static void __init early_flush_dcache(void) 200 { 201 unsigned int conf = read_c0_config(); 202 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >> 203 TX39_CONF_DCS_SHIFT)); 204 unsigned int linesz = 16; 205 unsigned long addr, end; 206 207 end = INDEX_BASE + dc_size / 2; 208 /* 2way, waybit=0 */ 209 for (addr = INDEX_BASE; addr < end; addr += linesz) { 210 cache_op(Index_Writeback_Inv_D, addr | 0); 211 cache_op(Index_Writeback_Inv_D, addr | 1); 212 } 213 } 214 215 static void __init txx9_cache_fixup(void) 216 { 217 unsigned int conf; 218 219 conf = read_c0_config(); 220 /* flush and disable */ 221 if (txx9_ic_disable) { 222 conf &= ~TX39_CONF_ICE; 223 write_c0_config(conf); 224 } 225 if (txx9_dc_disable) { 226 early_flush_dcache(); 227 conf &= ~TX39_CONF_DCE; 228 write_c0_config(conf); 229 } 230 231 /* enable cache */ 232 conf = read_c0_config(); 233 if (!txx9_ic_disable) 234 conf |= TX39_CONF_ICE; 235 if (!txx9_dc_disable) 236 conf |= TX39_CONF_DCE; 237 write_c0_config(conf); 238 239 if (!(conf & TX39_CONF_ICE)) 240 pr_info("TX39XX I-Cache disabled.\n"); 241 if (!(conf & TX39_CONF_DCE)) 242 pr_info("TX39XX D-Cache disabled.\n"); 243 } 244 #else 245 static inline void txx9_cache_fixup(void) 246 { 247 } 248 #endif 249 250 static void __init preprocess_cmdline(void) 251 { 252 static char cmdline[COMMAND_LINE_SIZE] __initdata; 253 char *s; 254 255 strcpy(cmdline, arcs_cmdline); 256 s = cmdline; 257 arcs_cmdline[0] = '\0'; 258 while (s && *s) { 259 char *str = strsep(&s, " "); 260 if (strncmp(str, "board=", 6) == 0) { 261 txx9_board_vec = find_board_byname(str + 6); 262 continue; 263 } else if (strncmp(str, "masterclk=", 10) == 0) { 264 unsigned int val; 265 if (kstrtouint(str + 10, 10, &val) == 0) 266 txx9_master_clock = val; 267 continue; 268 } else if (strcmp(str, "icdisable") == 0) { 269 txx9_ic_disable = 1; 270 continue; 271 } else if (strcmp(str, "dcdisable") == 0) { 272 txx9_dc_disable = 1; 273 continue; 274 } else if (strcmp(str, "toeoff") == 0) { 275 txx9_ccfg_toeon = 0; 276 continue; 277 } else if (strcmp(str, "toeon") == 0) { 278 txx9_ccfg_toeon = 1; 279 continue; 280 } 281 if (arcs_cmdline[0]) 282 strcat(arcs_cmdline, " "); 283 strcat(arcs_cmdline, str); 284 } 285 286 txx9_cache_fixup(); 287 } 288 289 static void __init select_board(void) 290 { 291 const char *envstr; 292 293 /* first, determine by "board=" argument in preprocess_cmdline() */ 294 if (txx9_board_vec) 295 return; 296 /* next, determine by "board" envvar */ 297 envstr = prom_getenv("board"); 298 if (envstr) { 299 txx9_board_vec = find_board_byname(envstr); 300 if (txx9_board_vec) 301 return; 302 } 303 304 /* select "default" board */ 305 #ifdef CONFIG_TOSHIBA_JMR3927 306 txx9_board_vec = &jmr3927_vec; 307 #endif 308 #ifdef CONFIG_CPU_TX49XX 309 switch (TX4938_REV_PCODE()) { 310 #ifdef CONFIG_TOSHIBA_RBTX4927 311 case 0x4927: 312 txx9_board_vec = &rbtx4927_vec; 313 break; 314 case 0x4937: 315 txx9_board_vec = &rbtx4937_vec; 316 break; 317 #endif 318 } 319 #endif 320 } 321 322 void __init prom_init(void) 323 { 324 prom_init_cmdline(); 325 preprocess_cmdline(); 326 select_board(); 327 328 strcpy(txx9_system_type, txx9_board_vec->system); 329 330 txx9_board_vec->prom_init(); 331 } 332 333 const char *get_system_type(void) 334 { 335 return txx9_system_type; 336 } 337 338 const char *__init prom_getenv(const char *name) 339 { 340 const s32 *str; 341 342 if (fw_arg2 < CKSEG0) 343 return NULL; 344 345 str = (const s32 *)fw_arg2; 346 /* YAMON style ("name", "value" pairs) */ 347 while (str[0] && str[1]) { 348 if (!strcmp((const char *)(unsigned long)str[0], name)) 349 return (const char *)(unsigned long)str[1]; 350 str += 2; 351 } 352 return NULL; 353 } 354 355 static void __noreturn txx9_machine_halt(void) 356 { 357 local_irq_disable(); 358 clear_c0_status(ST0_IM); 359 while (1) { 360 if (cpu_wait) { 361 (*cpu_wait)(); 362 if (cpu_has_counter) { 363 /* 364 * Clear counter interrupt while it 365 * breaks WAIT instruction even if 366 * masked. 367 */ 368 write_c0_compare(0); 369 } 370 } 371 } 372 } 373 374 /* Watchdog support */ 375 void __init txx9_wdt_init(unsigned long base) 376 { 377 struct resource res = { 378 .start = base, 379 .end = base + 0x100 - 1, 380 .flags = IORESOURCE_MEM, 381 }; 382 platform_device_register_simple("txx9wdt", -1, &res, 1); 383 } 384 385 void txx9_wdt_now(unsigned long base) 386 { 387 struct txx9_tmr_reg __iomem *tmrptr = 388 ioremap(base, sizeof(struct txx9_tmr_reg)); 389 /* disable watch dog timer */ 390 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); 391 __raw_writel(0, &tmrptr->tcr); 392 /* kick watchdog */ 393 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); 394 __raw_writel(1, &tmrptr->cpra); /* immediate */ 395 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, 396 &tmrptr->tcr); 397 } 398 399 /* SPI support */ 400 void __init txx9_spi_init(int busid, unsigned long base, int irq) 401 { 402 struct resource res[] = { 403 { 404 .start = base, 405 .end = base + 0x20 - 1, 406 .flags = IORESOURCE_MEM, 407 }, { 408 .start = irq, 409 .flags = IORESOURCE_IRQ, 410 }, 411 }; 412 platform_device_register_simple("spi_txx9", busid, 413 res, ARRAY_SIZE(res)); 414 } 415 416 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) 417 { 418 struct platform_device *pdev = 419 platform_device_alloc("tc35815-mac", id); 420 if (!pdev || 421 platform_device_add_data(pdev, ethaddr, 6) || 422 platform_device_add(pdev)) 423 platform_device_put(pdev); 424 } 425 426 void __init txx9_sio_init(unsigned long baseaddr, int irq, 427 unsigned int line, unsigned int sclk, int nocts) 428 { 429 #ifdef CONFIG_SERIAL_TXX9 430 struct uart_port req; 431 432 memset(&req, 0, sizeof(req)); 433 req.line = line; 434 req.iotype = UPIO_MEM; 435 req.membase = ioremap(baseaddr, 0x24); 436 req.mapbase = baseaddr; 437 req.irq = irq; 438 if (!nocts) 439 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; 440 if (sclk) { 441 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; 442 req.uartclk = sclk; 443 } else 444 req.uartclk = TXX9_IMCLK; 445 early_serial_txx9_setup(&req); 446 #endif /* CONFIG_SERIAL_TXX9 */ 447 } 448 449 #ifdef CONFIG_EARLY_PRINTK 450 static void null_prom_putchar(char c) 451 { 452 } 453 void (*txx9_prom_putchar)(char c) = null_prom_putchar; 454 455 void prom_putchar(char c) 456 { 457 txx9_prom_putchar(c); 458 } 459 460 static void __iomem *early_txx9_sio_port; 461 462 static void early_txx9_sio_putchar(char c) 463 { 464 #define TXX9_SICISR 0x0c 465 #define TXX9_SITFIFO 0x1c 466 #define TXX9_SICISR_TXALS 0x00000002 467 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & 468 TXX9_SICISR_TXALS)) 469 ; 470 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); 471 } 472 473 void __init txx9_sio_putchar_init(unsigned long baseaddr) 474 { 475 early_txx9_sio_port = ioremap(baseaddr, 0x24); 476 txx9_prom_putchar = early_txx9_sio_putchar; 477 } 478 #endif /* CONFIG_EARLY_PRINTK */ 479 480 /* wrappers */ 481 void __init plat_mem_setup(void) 482 { 483 ioport_resource.start = 0; 484 ioport_resource.end = ~0UL; /* no limit */ 485 iomem_resource.start = 0; 486 iomem_resource.end = ~0UL; /* no limit */ 487 488 /* fallback restart/halt routines */ 489 _machine_restart = (void (*)(char *))txx9_machine_halt; 490 _machine_halt = txx9_machine_halt; 491 pm_power_off = txx9_machine_halt; 492 493 #ifdef CONFIG_PCI 494 pcibios_plat_setup = txx9_pcibios_setup; 495 #endif 496 txx9_board_vec->mem_setup(); 497 } 498 499 void __init arch_init_irq(void) 500 { 501 txx9_board_vec->irq_setup(); 502 } 503 504 void __init plat_time_init(void) 505 { 506 #ifdef CONFIG_CPU_TX49XX 507 mips_hpt_frequency = txx9_cpu_clock / 2; 508 #endif 509 txx9_board_vec->time_init(); 510 } 511 512 static void txx9_clk_init(void) 513 { 514 struct clk_hw *hw; 515 int error; 516 517 hw = clk_hw_register_fixed_rate(NULL, "gbus", NULL, 0, txx9_gbus_clock); 518 if (IS_ERR(hw)) { 519 error = PTR_ERR(hw); 520 goto fail; 521 } 522 523 hw = clk_hw_register_fixed_factor(NULL, "imbus", "gbus", 0, 1, 2); 524 error = clk_hw_register_clkdev(hw, "imbus_clk", NULL); 525 if (error) 526 goto fail; 527 528 #ifdef CONFIG_CPU_TX49XX 529 if (TX4938_REV_PCODE() == 0x4938) { 530 hw = clk_hw_register_fixed_factor(NULL, "spi", "gbus", 0, 1, 4); 531 error = clk_hw_register_clkdev(hw, "spi-baseclk", NULL); 532 if (error) 533 goto fail; 534 } 535 #endif 536 537 return; 538 539 fail: 540 pr_err("Failed to register clocks: %d\n", error); 541 } 542 543 static int __init _txx9_arch_init(void) 544 { 545 txx9_clk_init(); 546 547 if (txx9_board_vec->arch_init) 548 txx9_board_vec->arch_init(); 549 return 0; 550 } 551 arch_initcall(_txx9_arch_init); 552 553 static int __init _txx9_device_init(void) 554 { 555 if (txx9_board_vec->device_init) 556 txx9_board_vec->device_init(); 557 return 0; 558 } 559 device_initcall(_txx9_device_init); 560 561 int (*txx9_irq_dispatch)(int pending); 562 asmlinkage void plat_irq_dispatch(void) 563 { 564 int pending = read_c0_status() & read_c0_cause() & ST0_IM; 565 int irq = txx9_irq_dispatch(pending); 566 567 if (likely(irq >= 0)) 568 do_IRQ(irq); 569 else 570 spurious_interrupt(); 571 } 572 573 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */ 574 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B 575 static unsigned long __swizzle_addr_none(unsigned long port) 576 { 577 return port; 578 } 579 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; 580 EXPORT_SYMBOL(__swizzle_addr_b); 581 #endif 582 583 void __init txx9_physmap_flash_init(int no, unsigned long addr, 584 unsigned long size, 585 const struct physmap_flash_data *pdata) 586 { 587 #if IS_ENABLED(CONFIG_MTD_PHYSMAP) 588 struct resource res = { 589 .start = addr, 590 .end = addr + size - 1, 591 .flags = IORESOURCE_MEM, 592 }; 593 struct platform_device *pdev; 594 static struct mtd_partition parts[2]; 595 struct physmap_flash_data pdata_part; 596 597 /* If this area contained boot area, make separate partition */ 598 if (pdata->nr_parts == 0 && !pdata->parts && 599 addr < 0x1fc00000 && addr + size > 0x1fc00000 && 600 !parts[0].name) { 601 parts[0].name = "boot"; 602 parts[0].offset = 0x1fc00000 - addr; 603 parts[0].size = addr + size - 0x1fc00000; 604 parts[1].name = "user"; 605 parts[1].offset = 0; 606 parts[1].size = 0x1fc00000 - addr; 607 pdata_part = *pdata; 608 pdata_part.nr_parts = ARRAY_SIZE(parts); 609 pdata_part.parts = parts; 610 pdata = &pdata_part; 611 } 612 613 pdev = platform_device_alloc("physmap-flash", no); 614 if (!pdev || 615 platform_device_add_resources(pdev, &res, 1) || 616 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 617 platform_device_add(pdev)) 618 platform_device_put(pdev); 619 #endif 620 } 621 622 void __init txx9_ndfmc_init(unsigned long baseaddr, 623 const struct txx9ndfmc_platform_data *pdata) 624 { 625 #if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC) 626 struct resource res = { 627 .start = baseaddr, 628 .end = baseaddr + 0x1000 - 1, 629 .flags = IORESOURCE_MEM, 630 }; 631 struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1); 632 633 if (!pdev || 634 platform_device_add_resources(pdev, &res, 1) || 635 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 636 platform_device_add(pdev)) 637 platform_device_put(pdev); 638 #endif 639 } 640 641 #if IS_ENABLED(CONFIG_LEDS_GPIO) 642 static DEFINE_SPINLOCK(txx9_iocled_lock); 643 644 #define TXX9_IOCLED_MAXLEDS 8 645 646 struct txx9_iocled_data { 647 struct gpio_chip chip; 648 u8 cur_val; 649 void __iomem *mmioaddr; 650 struct gpio_led_platform_data pdata; 651 struct gpio_led leds[TXX9_IOCLED_MAXLEDS]; 652 char names[TXX9_IOCLED_MAXLEDS][32]; 653 }; 654 655 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset) 656 { 657 struct txx9_iocled_data *data = gpiochip_get_data(chip); 658 return !!(data->cur_val & (1 << offset)); 659 } 660 661 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset, 662 int value) 663 { 664 struct txx9_iocled_data *data = gpiochip_get_data(chip); 665 unsigned long flags; 666 spin_lock_irqsave(&txx9_iocled_lock, flags); 667 if (value) 668 data->cur_val |= 1 << offset; 669 else 670 data->cur_val &= ~(1 << offset); 671 writeb(data->cur_val, data->mmioaddr); 672 mmiowb(); 673 spin_unlock_irqrestore(&txx9_iocled_lock, flags); 674 } 675 676 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset) 677 { 678 return 0; 679 } 680 681 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset, 682 int value) 683 { 684 txx9_iocled_set(chip, offset, value); 685 return 0; 686 } 687 688 void __init txx9_iocled_init(unsigned long baseaddr, 689 int basenum, unsigned int num, int lowactive, 690 const char *color, char **deftriggers) 691 { 692 struct txx9_iocled_data *iocled; 693 struct platform_device *pdev; 694 int i; 695 static char *default_triggers[] __initdata = { 696 "heartbeat", 697 "disk-activity", 698 "nand-disk", 699 NULL, 700 }; 701 702 if (!deftriggers) 703 deftriggers = default_triggers; 704 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL); 705 if (!iocled) 706 return; 707 iocled->mmioaddr = ioremap(baseaddr, 1); 708 if (!iocled->mmioaddr) 709 goto out_free; 710 iocled->chip.get = txx9_iocled_get; 711 iocled->chip.set = txx9_iocled_set; 712 iocled->chip.direction_input = txx9_iocled_dir_in; 713 iocled->chip.direction_output = txx9_iocled_dir_out; 714 iocled->chip.label = "iocled"; 715 iocled->chip.base = basenum; 716 iocled->chip.ngpio = num; 717 if (gpiochip_add_data(&iocled->chip, iocled)) 718 goto out_unmap; 719 if (basenum < 0) 720 basenum = iocled->chip.base; 721 722 pdev = platform_device_alloc("leds-gpio", basenum); 723 if (!pdev) 724 goto out_gpio; 725 iocled->pdata.num_leds = num; 726 iocled->pdata.leds = iocled->leds; 727 for (i = 0; i < num; i++) { 728 struct gpio_led *led = &iocled->leds[i]; 729 snprintf(iocled->names[i], sizeof(iocled->names[i]), 730 "iocled:%s:%u", color, i); 731 led->name = iocled->names[i]; 732 led->gpio = basenum + i; 733 led->active_low = lowactive; 734 if (deftriggers && *deftriggers) 735 led->default_trigger = *deftriggers++; 736 } 737 pdev->dev.platform_data = &iocled->pdata; 738 if (platform_device_add(pdev)) 739 goto out_pdev; 740 return; 741 742 out_pdev: 743 platform_device_put(pdev); 744 out_gpio: 745 gpiochip_remove(&iocled->chip); 746 out_unmap: 747 iounmap(iocled->mmioaddr); 748 out_free: 749 kfree(iocled); 750 } 751 #else /* CONFIG_LEDS_GPIO */ 752 void __init txx9_iocled_init(unsigned long baseaddr, 753 int basenum, unsigned int num, int lowactive, 754 const char *color, char **deftriggers) 755 { 756 } 757 #endif /* CONFIG_LEDS_GPIO */ 758 759 void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq, 760 const struct txx9dmac_platform_data *pdata) 761 { 762 #if IS_ENABLED(CONFIG_TXX9_DMAC) 763 struct resource res[] = { 764 { 765 .start = baseaddr, 766 .end = baseaddr + 0x800 - 1, 767 .flags = IORESOURCE_MEM, 768 #ifndef CONFIG_MACH_TX49XX 769 }, { 770 .start = irq, 771 .flags = IORESOURCE_IRQ, 772 #endif 773 } 774 }; 775 #ifdef CONFIG_MACH_TX49XX 776 struct resource chan_res[] = { 777 { 778 .flags = IORESOURCE_IRQ, 779 } 780 }; 781 #endif 782 struct platform_device *pdev = platform_device_alloc("txx9dmac", id); 783 struct txx9dmac_chan_platform_data cpdata; 784 int i; 785 786 if (!pdev || 787 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || 788 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 789 platform_device_add(pdev)) { 790 platform_device_put(pdev); 791 return; 792 } 793 memset(&cpdata, 0, sizeof(cpdata)); 794 cpdata.dmac_dev = pdev; 795 for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) { 796 #ifdef CONFIG_MACH_TX49XX 797 chan_res[0].start = irq + i; 798 #endif 799 pdev = platform_device_alloc("txx9dmac-chan", 800 id * TXX9_DMA_MAX_NR_CHANNELS + i); 801 if (!pdev || 802 #ifdef CONFIG_MACH_TX49XX 803 platform_device_add_resources(pdev, chan_res, 804 ARRAY_SIZE(chan_res)) || 805 #endif 806 platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) || 807 platform_device_add(pdev)) 808 platform_device_put(pdev); 809 } 810 #endif 811 } 812 813 void __init txx9_aclc_init(unsigned long baseaddr, int irq, 814 unsigned int dmac_id, 815 unsigned int dma_chan_out, 816 unsigned int dma_chan_in) 817 { 818 } 819 820 static struct bus_type txx9_sramc_subsys = { 821 .name = "txx9_sram", 822 .dev_name = "txx9_sram", 823 }; 824 825 struct txx9_sramc_dev { 826 struct device dev; 827 struct bin_attribute bindata_attr; 828 void __iomem *base; 829 }; 830 831 static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj, 832 struct bin_attribute *bin_attr, 833 char *buf, loff_t pos, size_t size) 834 { 835 struct txx9_sramc_dev *dev = bin_attr->private; 836 size_t ramsize = bin_attr->size; 837 838 if (pos >= ramsize) 839 return 0; 840 if (pos + size > ramsize) 841 size = ramsize - pos; 842 memcpy_fromio(buf, dev->base + pos, size); 843 return size; 844 } 845 846 static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj, 847 struct bin_attribute *bin_attr, 848 char *buf, loff_t pos, size_t size) 849 { 850 struct txx9_sramc_dev *dev = bin_attr->private; 851 size_t ramsize = bin_attr->size; 852 853 if (pos >= ramsize) 854 return 0; 855 if (pos + size > ramsize) 856 size = ramsize - pos; 857 memcpy_toio(dev->base + pos, buf, size); 858 return size; 859 } 860 861 static void txx9_device_release(struct device *dev) 862 { 863 struct txx9_sramc_dev *tdev; 864 865 tdev = container_of(dev, struct txx9_sramc_dev, dev); 866 kfree(tdev); 867 } 868 869 void __init txx9_sramc_init(struct resource *r) 870 { 871 struct txx9_sramc_dev *dev; 872 size_t size; 873 int err; 874 875 err = subsys_system_register(&txx9_sramc_subsys, NULL); 876 if (err) 877 return; 878 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 879 if (!dev) 880 return; 881 size = resource_size(r); 882 dev->base = ioremap(r->start, size); 883 if (!dev->base) { 884 kfree(dev); 885 return; 886 } 887 dev->dev.release = &txx9_device_release; 888 dev->dev.bus = &txx9_sramc_subsys; 889 sysfs_bin_attr_init(&dev->bindata_attr); 890 dev->bindata_attr.attr.name = "bindata"; 891 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR; 892 dev->bindata_attr.read = txx9_sram_read; 893 dev->bindata_attr.write = txx9_sram_write; 894 dev->bindata_attr.size = size; 895 dev->bindata_attr.private = dev; 896 err = device_register(&dev->dev); 897 if (err) 898 goto exit_put; 899 err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr); 900 if (err) { 901 iounmap(dev->base); 902 device_unregister(&dev->dev); 903 } 904 return; 905 exit_put: 906 iounmap(dev->base); 907 put_device(&dev->dev); 908 } 909