1c066a32aSThomas Bogendoerfer /* 2c066a32aSThomas Bogendoerfer * PCI Tower specific code 3c066a32aSThomas Bogendoerfer * 4c066a32aSThomas Bogendoerfer * This file is subject to the terms and conditions of the GNU General Public 5c066a32aSThomas Bogendoerfer * License. See the file "COPYING" in the main directory of this archive 6c066a32aSThomas Bogendoerfer * for more details. 7c066a32aSThomas Bogendoerfer * 8c066a32aSThomas Bogendoerfer * Copyright (C) 2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de) 9c066a32aSThomas Bogendoerfer */ 10c066a32aSThomas Bogendoerfer 11c066a32aSThomas Bogendoerfer #include <linux/init.h> 12c066a32aSThomas Bogendoerfer #include <linux/interrupt.h> 13c066a32aSThomas Bogendoerfer #include <linux/pci.h> 14c066a32aSThomas Bogendoerfer #include <linux/serial_8250.h> 15c066a32aSThomas Bogendoerfer 16c066a32aSThomas Bogendoerfer #include <asm/mc146818-time.h> 17c066a32aSThomas Bogendoerfer #include <asm/sni.h> 18c066a32aSThomas Bogendoerfer #include <asm/time.h> 19c066a32aSThomas Bogendoerfer #include <asm/irq_cpu.h> 20c066a32aSThomas Bogendoerfer 21c066a32aSThomas Bogendoerfer 22c066a32aSThomas Bogendoerfer #define PORT(_base,_irq) \ 23c066a32aSThomas Bogendoerfer { \ 24c066a32aSThomas Bogendoerfer .iobase = _base, \ 25c066a32aSThomas Bogendoerfer .irq = _irq, \ 26c066a32aSThomas Bogendoerfer .uartclk = 1843200, \ 27c066a32aSThomas Bogendoerfer .iotype = UPIO_PORT, \ 28c066a32aSThomas Bogendoerfer .flags = UPF_BOOT_AUTOCONF, \ 29c066a32aSThomas Bogendoerfer } 30c066a32aSThomas Bogendoerfer 31c066a32aSThomas Bogendoerfer static struct plat_serial8250_port pcit_data[] = { 32c066a32aSThomas Bogendoerfer PORT(0x3f8, 0), 33c066a32aSThomas Bogendoerfer PORT(0x2f8, 3), 34c066a32aSThomas Bogendoerfer { }, 35c066a32aSThomas Bogendoerfer }; 36c066a32aSThomas Bogendoerfer 37c066a32aSThomas Bogendoerfer static struct platform_device pcit_serial8250_device = { 38c066a32aSThomas Bogendoerfer .name = "serial8250", 39c066a32aSThomas Bogendoerfer .id = PLAT8250_DEV_PLATFORM, 40c066a32aSThomas Bogendoerfer .dev = { 41c066a32aSThomas Bogendoerfer .platform_data = pcit_data, 42c066a32aSThomas Bogendoerfer }, 43c066a32aSThomas Bogendoerfer }; 44c066a32aSThomas Bogendoerfer 45c066a32aSThomas Bogendoerfer static struct plat_serial8250_port pcit_cplus_data[] = { 46bea77175SThomas Bogendoerfer PORT(0x3f8, 0), 47c066a32aSThomas Bogendoerfer PORT(0x2f8, 3), 48c066a32aSThomas Bogendoerfer PORT(0x3e8, 4), 49c066a32aSThomas Bogendoerfer PORT(0x2e8, 3), 50c066a32aSThomas Bogendoerfer { }, 51c066a32aSThomas Bogendoerfer }; 52c066a32aSThomas Bogendoerfer 53c066a32aSThomas Bogendoerfer static struct platform_device pcit_cplus_serial8250_device = { 54c066a32aSThomas Bogendoerfer .name = "serial8250", 55c066a32aSThomas Bogendoerfer .id = PLAT8250_DEV_PLATFORM, 56c066a32aSThomas Bogendoerfer .dev = { 57c066a32aSThomas Bogendoerfer .platform_data = pcit_cplus_data, 58c066a32aSThomas Bogendoerfer }, 59c066a32aSThomas Bogendoerfer }; 60c066a32aSThomas Bogendoerfer 61c066a32aSThomas Bogendoerfer static struct resource sni_io_resource = { 62bea77175SThomas Bogendoerfer .start = 0x00000000UL, 63c066a32aSThomas Bogendoerfer .end = 0x03bfffffUL, 64bea77175SThomas Bogendoerfer .name = "PCIT IO", 65c066a32aSThomas Bogendoerfer .flags = IORESOURCE_IO, 66c066a32aSThomas Bogendoerfer }; 67c066a32aSThomas Bogendoerfer 68c066a32aSThomas Bogendoerfer static struct resource pcit_io_resources[] = { 69c066a32aSThomas Bogendoerfer { 70c066a32aSThomas Bogendoerfer .start = 0x00, 71c066a32aSThomas Bogendoerfer .end = 0x1f, 72c066a32aSThomas Bogendoerfer .name = "dma1", 73c066a32aSThomas Bogendoerfer .flags = IORESOURCE_BUSY 74c066a32aSThomas Bogendoerfer }, { 75c066a32aSThomas Bogendoerfer .start = 0x40, 76c066a32aSThomas Bogendoerfer .end = 0x5f, 77c066a32aSThomas Bogendoerfer .name = "timer", 78c066a32aSThomas Bogendoerfer .flags = IORESOURCE_BUSY 79c066a32aSThomas Bogendoerfer }, { 80c066a32aSThomas Bogendoerfer .start = 0x60, 81c066a32aSThomas Bogendoerfer .end = 0x6f, 82c066a32aSThomas Bogendoerfer .name = "keyboard", 83c066a32aSThomas Bogendoerfer .flags = IORESOURCE_BUSY 84c066a32aSThomas Bogendoerfer }, { 85c066a32aSThomas Bogendoerfer .start = 0x80, 86c066a32aSThomas Bogendoerfer .end = 0x8f, 87c066a32aSThomas Bogendoerfer .name = "dma page reg", 88c066a32aSThomas Bogendoerfer .flags = IORESOURCE_BUSY 89c066a32aSThomas Bogendoerfer }, { 90c066a32aSThomas Bogendoerfer .start = 0xc0, 91c066a32aSThomas Bogendoerfer .end = 0xdf, 92c066a32aSThomas Bogendoerfer .name = "dma2", 93c066a32aSThomas Bogendoerfer .flags = IORESOURCE_BUSY 94c066a32aSThomas Bogendoerfer }, { 95bea77175SThomas Bogendoerfer .start = 0xcf8, 96bea77175SThomas Bogendoerfer .end = 0xcfb, 97bea77175SThomas Bogendoerfer .name = "PCI config addr", 98bea77175SThomas Bogendoerfer .flags = IORESOURCE_BUSY 99bea77175SThomas Bogendoerfer }, { 100c066a32aSThomas Bogendoerfer .start = 0xcfc, 101c066a32aSThomas Bogendoerfer .end = 0xcff, 102c066a32aSThomas Bogendoerfer .name = "PCI config data", 103c066a32aSThomas Bogendoerfer .flags = IORESOURCE_BUSY 104c066a32aSThomas Bogendoerfer } 105c066a32aSThomas Bogendoerfer }; 106c066a32aSThomas Bogendoerfer 107c066a32aSThomas Bogendoerfer static struct resource sni_mem_resource = { 108bea77175SThomas Bogendoerfer .start = 0x18000000UL, 109bea77175SThomas Bogendoerfer .end = 0x1fbfffffUL, 110c066a32aSThomas Bogendoerfer .name = "PCIT PCI MEM", 111c066a32aSThomas Bogendoerfer .flags = IORESOURCE_MEM 112c066a32aSThomas Bogendoerfer }; 113c066a32aSThomas Bogendoerfer 114c066a32aSThomas Bogendoerfer static void __init sni_pcit_resource_init(void) 115c066a32aSThomas Bogendoerfer { 116c066a32aSThomas Bogendoerfer int i; 117c066a32aSThomas Bogendoerfer 118c066a32aSThomas Bogendoerfer /* request I/O space for devices used on all i[345]86 PCs */ 119c066a32aSThomas Bogendoerfer for (i = 0; i < ARRAY_SIZE(pcit_io_resources); i++) 120bea77175SThomas Bogendoerfer request_resource(&sni_io_resource, pcit_io_resources + i); 121c066a32aSThomas Bogendoerfer } 122c066a32aSThomas Bogendoerfer 123c066a32aSThomas Bogendoerfer 124c066a32aSThomas Bogendoerfer extern struct pci_ops sni_pcit_ops; 125c066a32aSThomas Bogendoerfer 126c066a32aSThomas Bogendoerfer static struct pci_controller sni_pcit_controller = { 127c066a32aSThomas Bogendoerfer .pci_ops = &sni_pcit_ops, 128c066a32aSThomas Bogendoerfer .mem_resource = &sni_mem_resource, 129bea77175SThomas Bogendoerfer .mem_offset = 0x00000000UL, 130c066a32aSThomas Bogendoerfer .io_resource = &sni_io_resource, 131bea77175SThomas Bogendoerfer .io_offset = 0x00000000UL, 132bea77175SThomas Bogendoerfer .io_map_base = SNI_PORT_BASE 133c066a32aSThomas Bogendoerfer }; 134c066a32aSThomas Bogendoerfer 135c066a32aSThomas Bogendoerfer static void enable_pcit_irq(unsigned int irq) 136c066a32aSThomas Bogendoerfer { 137c066a32aSThomas Bogendoerfer u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24); 138c066a32aSThomas Bogendoerfer 139c066a32aSThomas Bogendoerfer *(volatile u32 *)SNI_PCIT_INT_REG |= mask; 140c066a32aSThomas Bogendoerfer } 141c066a32aSThomas Bogendoerfer 142c066a32aSThomas Bogendoerfer void disable_pcit_irq(unsigned int irq) 143c066a32aSThomas Bogendoerfer { 144c066a32aSThomas Bogendoerfer u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24); 145c066a32aSThomas Bogendoerfer 146c066a32aSThomas Bogendoerfer *(volatile u32 *)SNI_PCIT_INT_REG &= ~mask; 147c066a32aSThomas Bogendoerfer } 148c066a32aSThomas Bogendoerfer 149c066a32aSThomas Bogendoerfer void end_pcit_irq(unsigned int irq) 150c066a32aSThomas Bogendoerfer { 151c066a32aSThomas Bogendoerfer if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 152c066a32aSThomas Bogendoerfer enable_pcit_irq(irq); 153c066a32aSThomas Bogendoerfer } 154c066a32aSThomas Bogendoerfer 155c066a32aSThomas Bogendoerfer static struct irq_chip pcit_irq_type = { 156c066a32aSThomas Bogendoerfer .typename = "PCIT", 157c066a32aSThomas Bogendoerfer .ack = disable_pcit_irq, 158c066a32aSThomas Bogendoerfer .mask = disable_pcit_irq, 159c066a32aSThomas Bogendoerfer .mask_ack = disable_pcit_irq, 160c066a32aSThomas Bogendoerfer .unmask = enable_pcit_irq, 161c066a32aSThomas Bogendoerfer .end = end_pcit_irq, 162c066a32aSThomas Bogendoerfer }; 163c066a32aSThomas Bogendoerfer 164c066a32aSThomas Bogendoerfer static void pcit_hwint1(void) 165c066a32aSThomas Bogendoerfer { 166c066a32aSThomas Bogendoerfer u32 pending = *(volatile u32 *)SNI_PCIT_INT_REG; 167c066a32aSThomas Bogendoerfer int irq; 168c066a32aSThomas Bogendoerfer 169c066a32aSThomas Bogendoerfer clear_c0_status(IE_IRQ1); 170c066a32aSThomas Bogendoerfer irq = ffs((pending >> 16) & 0x7f); 171c066a32aSThomas Bogendoerfer 172c066a32aSThomas Bogendoerfer if (likely(irq > 0)) 173c066a32aSThomas Bogendoerfer do_IRQ (irq + SNI_PCIT_INT_START - 1); 174c066a32aSThomas Bogendoerfer set_c0_status (IE_IRQ1); 175c066a32aSThomas Bogendoerfer } 176c066a32aSThomas Bogendoerfer 177c066a32aSThomas Bogendoerfer static void pcit_hwint0(void) 178c066a32aSThomas Bogendoerfer { 179c066a32aSThomas Bogendoerfer u32 pending = *(volatile u32 *)SNI_PCIT_INT_REG; 180c066a32aSThomas Bogendoerfer int irq; 181c066a32aSThomas Bogendoerfer 182c066a32aSThomas Bogendoerfer clear_c0_status(IE_IRQ0); 183bea77175SThomas Bogendoerfer irq = ffs((pending >> 16) & 0x3f); 184c066a32aSThomas Bogendoerfer 185c066a32aSThomas Bogendoerfer if (likely(irq > 0)) 186c066a32aSThomas Bogendoerfer do_IRQ (irq + SNI_PCIT_INT_START - 1); 187c066a32aSThomas Bogendoerfer set_c0_status (IE_IRQ0); 188c066a32aSThomas Bogendoerfer } 189c066a32aSThomas Bogendoerfer 190c066a32aSThomas Bogendoerfer static void sni_pcit_hwint(void) 191c066a32aSThomas Bogendoerfer { 192119537c0SThiemo Seufer u32 pending = read_c0_cause() & read_c0_status(); 193c066a32aSThomas Bogendoerfer 194c066a32aSThomas Bogendoerfer if (pending & C_IRQ1) 195c066a32aSThomas Bogendoerfer pcit_hwint1(); 196c066a32aSThomas Bogendoerfer else if (pending & C_IRQ2) 197f13cc01dSThomas Bogendoerfer do_IRQ (MIPS_CPU_IRQ_BASE + 4); 198c066a32aSThomas Bogendoerfer else if (pending & C_IRQ3) 199f13cc01dSThomas Bogendoerfer do_IRQ (MIPS_CPU_IRQ_BASE + 5); 200c066a32aSThomas Bogendoerfer else if (pending & C_IRQ5) 201f13cc01dSThomas Bogendoerfer do_IRQ (MIPS_CPU_IRQ_BASE + 7); 202c066a32aSThomas Bogendoerfer } 203c066a32aSThomas Bogendoerfer 204c066a32aSThomas Bogendoerfer static void sni_pcit_hwint_cplus(void) 205c066a32aSThomas Bogendoerfer { 206119537c0SThiemo Seufer u32 pending = read_c0_cause() & read_c0_status(); 207c066a32aSThomas Bogendoerfer 208c066a32aSThomas Bogendoerfer if (pending & C_IRQ0) 209c066a32aSThomas Bogendoerfer pcit_hwint0(); 210bea77175SThomas Bogendoerfer else if (pending & C_IRQ1) 211bea77175SThomas Bogendoerfer do_IRQ (MIPS_CPU_IRQ_BASE + 3); 212c066a32aSThomas Bogendoerfer else if (pending & C_IRQ2) 213f13cc01dSThomas Bogendoerfer do_IRQ (MIPS_CPU_IRQ_BASE + 4); 214c066a32aSThomas Bogendoerfer else if (pending & C_IRQ3) 215f13cc01dSThomas Bogendoerfer do_IRQ (MIPS_CPU_IRQ_BASE + 5); 216c066a32aSThomas Bogendoerfer else if (pending & C_IRQ5) 217f13cc01dSThomas Bogendoerfer do_IRQ (MIPS_CPU_IRQ_BASE + 7); 218c066a32aSThomas Bogendoerfer } 219c066a32aSThomas Bogendoerfer 220c066a32aSThomas Bogendoerfer void __init sni_pcit_irq_init(void) 221c066a32aSThomas Bogendoerfer { 222c066a32aSThomas Bogendoerfer int i; 223c066a32aSThomas Bogendoerfer 224c066a32aSThomas Bogendoerfer mips_cpu_irq_init(); 225c066a32aSThomas Bogendoerfer for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) 226c066a32aSThomas Bogendoerfer set_irq_chip(i, &pcit_irq_type); 227c066a32aSThomas Bogendoerfer *(volatile u32 *)SNI_PCIT_INT_REG = 0; 228c066a32aSThomas Bogendoerfer sni_hwint = sni_pcit_hwint; 229c066a32aSThomas Bogendoerfer change_c0_status(ST0_IM, IE_IRQ1); 230c066a32aSThomas Bogendoerfer setup_irq (SNI_PCIT_INT_START + 6, &sni_isa_irq); 231c066a32aSThomas Bogendoerfer } 232c066a32aSThomas Bogendoerfer 233c066a32aSThomas Bogendoerfer void __init sni_pcit_cplus_irq_init(void) 234c066a32aSThomas Bogendoerfer { 235c066a32aSThomas Bogendoerfer int i; 236c066a32aSThomas Bogendoerfer 237c066a32aSThomas Bogendoerfer mips_cpu_irq_init(); 238c066a32aSThomas Bogendoerfer for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) 239c066a32aSThomas Bogendoerfer set_irq_chip(i, &pcit_irq_type); 240bea77175SThomas Bogendoerfer *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; 241c066a32aSThomas Bogendoerfer sni_hwint = sni_pcit_hwint_cplus; 242c066a32aSThomas Bogendoerfer change_c0_status(ST0_IM, IE_IRQ0); 243bea77175SThomas Bogendoerfer setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq); 244c066a32aSThomas Bogendoerfer } 245c066a32aSThomas Bogendoerfer 246c066a32aSThomas Bogendoerfer void sni_pcit_init(void) 247c066a32aSThomas Bogendoerfer { 248c066a32aSThomas Bogendoerfer rtc_mips_get_time = mc146818_get_cmos_time; 249c066a32aSThomas Bogendoerfer rtc_mips_set_time = mc146818_set_rtc_mmss; 250c066a32aSThomas Bogendoerfer board_time_init = sni_cpu_time_init; 251bea77175SThomas Bogendoerfer ioport_resource.end = sni_io_resource.end; 252c066a32aSThomas Bogendoerfer #ifdef CONFIG_PCI 253bea77175SThomas Bogendoerfer PCIBIOS_MIN_IO = 0x9000; 254c066a32aSThomas Bogendoerfer register_pci_controller(&sni_pcit_controller); 255c066a32aSThomas Bogendoerfer #endif 256bea77175SThomas Bogendoerfer sni_pcit_resource_init(); 257c066a32aSThomas Bogendoerfer } 258c066a32aSThomas Bogendoerfer 259c066a32aSThomas Bogendoerfer static int __init snirm_pcit_setup_devinit(void) 260c066a32aSThomas Bogendoerfer { 261c066a32aSThomas Bogendoerfer switch (sni_brd_type) { 262c066a32aSThomas Bogendoerfer case SNI_BRD_PCI_TOWER: 263c066a32aSThomas Bogendoerfer platform_device_register(&pcit_serial8250_device); 264c066a32aSThomas Bogendoerfer break; 265c066a32aSThomas Bogendoerfer 266c066a32aSThomas Bogendoerfer case SNI_BRD_PCI_TOWER_CPLUS: 267c066a32aSThomas Bogendoerfer platform_device_register(&pcit_cplus_serial8250_device); 268c066a32aSThomas Bogendoerfer break; 269c066a32aSThomas Bogendoerfer } 270c066a32aSThomas Bogendoerfer return 0; 271c066a32aSThomas Bogendoerfer } 272c066a32aSThomas Bogendoerfer 273c066a32aSThomas Bogendoerfer device_initcall(snirm_pcit_setup_devinit); 274