1 /* 2 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 */ 18 #include <linux/init.h> 19 #include <linux/kernel.h> 20 #include <linux/reboot.h> 21 #include <linux/string.h> 22 23 #include <asm/bootinfo.h> 24 #include <asm/mipsregs.h> 25 #include <asm/io.h> 26 #include <asm/sibyte/sb1250.h> 27 #include <asm/sibyte/sb1250_regs.h> 28 #include <asm/sibyte/sb1250_scd.h> 29 30 unsigned int sb1_pass; 31 unsigned int soc_pass; 32 unsigned int soc_type; 33 unsigned int periph_rev; 34 unsigned int zbbus_mhz; 35 36 static char *soc_str; 37 static char *pass_str; 38 static unsigned int war_pass; /* XXXKW don't overload PASS defines? */ 39 40 static inline int setup_bcm1250(void); 41 static inline int setup_bcm112x(void); 42 43 /* Setup code likely to be common to all SiByte platforms */ 44 45 static int __init sys_rev_decode(void) 46 { 47 int ret = 0; 48 49 war_pass = soc_pass; 50 switch (soc_type) { 51 case K_SYS_SOC_TYPE_BCM1250: 52 case K_SYS_SOC_TYPE_BCM1250_ALT: 53 case K_SYS_SOC_TYPE_BCM1250_ALT2: 54 soc_str = "BCM1250"; 55 ret = setup_bcm1250(); 56 break; 57 case K_SYS_SOC_TYPE_BCM1120: 58 soc_str = "BCM1120"; 59 ret = setup_bcm112x(); 60 break; 61 case K_SYS_SOC_TYPE_BCM1125: 62 soc_str = "BCM1125"; 63 ret = setup_bcm112x(); 64 break; 65 case K_SYS_SOC_TYPE_BCM1125H: 66 soc_str = "BCM1125H"; 67 ret = setup_bcm112x(); 68 break; 69 default: 70 printk("Unknown SOC type %x\n", soc_type); 71 ret = 1; 72 break; 73 } 74 return ret; 75 } 76 77 static int __init setup_bcm1250(void) 78 { 79 int ret = 0; 80 81 switch (soc_pass) { 82 case K_SYS_REVISION_BCM1250_PASS1: 83 periph_rev = 1; 84 pass_str = "Pass 1"; 85 break; 86 case K_SYS_REVISION_BCM1250_A10: 87 periph_rev = 2; 88 pass_str = "A8/A10"; 89 /* XXXKW different war_pass? */ 90 war_pass = K_SYS_REVISION_BCM1250_PASS2; 91 break; 92 case K_SYS_REVISION_BCM1250_PASS2_2: 93 periph_rev = 2; 94 pass_str = "B1"; 95 break; 96 case K_SYS_REVISION_BCM1250_B2: 97 periph_rev = 2; 98 pass_str = "B2"; 99 war_pass = K_SYS_REVISION_BCM1250_PASS2_2; 100 break; 101 case K_SYS_REVISION_BCM1250_PASS3: 102 periph_rev = 3; 103 pass_str = "C0"; 104 break; 105 case K_SYS_REVISION_BCM1250_C1: 106 periph_rev = 3; 107 pass_str = "C1"; 108 break; 109 default: 110 if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) { 111 periph_rev = 2; 112 pass_str = "A0-A6"; 113 war_pass = K_SYS_REVISION_BCM1250_PASS2; 114 } else { 115 printk("Unknown BCM1250 rev %x\n", soc_pass); 116 ret = 1; 117 } 118 break; 119 } 120 return ret; 121 } 122 123 static int __init setup_bcm112x(void) 124 { 125 int ret = 0; 126 127 switch (soc_pass) { 128 case 0: 129 /* Early build didn't have revid set */ 130 periph_rev = 3; 131 pass_str = "A1"; 132 war_pass = K_SYS_REVISION_BCM112x_A1; 133 break; 134 case K_SYS_REVISION_BCM112x_A1: 135 periph_rev = 3; 136 pass_str = "A1"; 137 break; 138 case K_SYS_REVISION_BCM112x_A2: 139 periph_rev = 3; 140 pass_str = "A2"; 141 break; 142 default: 143 printk("Unknown %s rev %x\n", soc_str, soc_pass); 144 ret = 1; 145 } 146 return ret; 147 } 148 149 void __init sb1250_setup(void) 150 { 151 uint64_t sys_rev; 152 int plldiv; 153 int bad_config = 0; 154 155 sb1_pass = read_c0_prid() & 0xff; 156 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); 157 soc_type = SYS_SOC_TYPE(sys_rev); 158 soc_pass = G_SYS_REVISION(sys_rev); 159 160 if (sys_rev_decode()) { 161 printk("Restart after failure to identify SiByte chip\n"); 162 machine_restart(NULL); 163 } 164 165 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); 166 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25); 167 168 printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n", 169 soc_str, pass_str, zbbus_mhz * 2, sb1_pass); 170 printk("Board type: %s\n", get_system_type()); 171 172 switch (war_pass) { 173 case K_SYS_REVISION_BCM1250_PASS1: 174 #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS 175 printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, " 176 "and the kernel doesn't have the proper " 177 "workarounds compiled in. @@@@\n"); 178 bad_config = 1; 179 #endif 180 break; 181 case K_SYS_REVISION_BCM1250_PASS2: 182 /* Pass 2 - easiest as default for now - so many numbers */ 183 #if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \ 184 !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) 185 printk("@@@@ This is a BCM1250 A3-A10 board, and the " 186 "kernel doesn't have the proper workarounds " 187 "compiled in. @@@@\n"); 188 bad_config = 1; 189 #endif 190 #ifdef CONFIG_CPU_HAS_PREFETCH 191 printk("@@@@ Prefetches may be enabled in this kernel, " 192 "but are buggy on this board. @@@@\n"); 193 bad_config = 1; 194 #endif 195 break; 196 case K_SYS_REVISION_BCM1250_PASS2_2: 197 #ifndef CONFIG_SB1_PASS_2_WORKAROUNDS 198 printk("@@@@ This is a BCM1250 B1/B2. board, and the " 199 "kernel doesn't have the proper workarounds " 200 "compiled in. @@@@\n"); 201 bad_config = 1; 202 #endif 203 #if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \ 204 !defined(CONFIG_CPU_HAS_PREFETCH) 205 printk("@@@@ This is a BCM1250 B1/B2, but the kernel is " 206 "conservatively configured for an 'A' stepping. " 207 "@@@@\n"); 208 #endif 209 break; 210 default: 211 break; 212 } 213 if (bad_config) { 214 printk("Invalid configuration for this chip.\n"); 215 machine_restart(NULL); 216 } 217 } 218