1f137e463SAndrew Isaacson /* 2f137e463SAndrew Isaacson * Copyright (C) 2000,2001,2004 Broadcom Corporation 3f137e463SAndrew Isaacson * 4f137e463SAndrew Isaacson * This program is free software; you can redistribute it and/or 5f137e463SAndrew Isaacson * modify it under the terms of the GNU General Public License 6f137e463SAndrew Isaacson * as published by the Free Software Foundation; either version 2 7f137e463SAndrew Isaacson * of the License, or (at your option) any later version. 8f137e463SAndrew Isaacson * 9f137e463SAndrew Isaacson * This program is distributed in the hope that it will be useful, 10f137e463SAndrew Isaacson * but WITHOUT ANY WARRANTY; without even the implied warranty of 11f137e463SAndrew Isaacson * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12f137e463SAndrew Isaacson * GNU General Public License for more details. 13f137e463SAndrew Isaacson * 14f137e463SAndrew Isaacson * You should have received a copy of the GNU General Public License 15f137e463SAndrew Isaacson * along with this program; if not, write to the Free Software 16f137e463SAndrew Isaacson * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17f137e463SAndrew Isaacson */ 18f137e463SAndrew Isaacson 19f137e463SAndrew Isaacson /* 20f137e463SAndrew Isaacson * These are routines to set up and handle interrupts from the 21f137e463SAndrew Isaacson * bcm1480 general purpose timer 0. We're using the timer as a 22f137e463SAndrew Isaacson * system clock, so we set it up to run at 100 Hz. On every 23f137e463SAndrew Isaacson * interrupt, we update our idea of what the time of day is, 24f137e463SAndrew Isaacson * then call do_timer() in the architecture-independent kernel 25f137e463SAndrew Isaacson * code to do general bookkeeping (e.g. update jiffies, run 26f137e463SAndrew Isaacson * bottom halves, etc.) 27f137e463SAndrew Isaacson */ 28e9f874b6SRalf Baechle #include <linux/clockchips.h> 29f137e463SAndrew Isaacson #include <linux/interrupt.h> 30f137e463SAndrew Isaacson #include <linux/sched.h> 31f137e463SAndrew Isaacson #include <linux/spinlock.h> 32f137e463SAndrew Isaacson #include <linux/kernel_stat.h> 33f137e463SAndrew Isaacson 34f137e463SAndrew Isaacson #include <asm/irq.h> 35f137e463SAndrew Isaacson #include <asm/addrspace.h> 36f137e463SAndrew Isaacson #include <asm/time.h> 37f137e463SAndrew Isaacson #include <asm/io.h> 38f137e463SAndrew Isaacson 39f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_regs.h> 40f137e463SAndrew Isaacson #include <asm/sibyte/sb1250_regs.h> 41f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_int.h> 42f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_scd.h> 43f137e463SAndrew Isaacson 44f137e463SAndrew Isaacson #include <asm/sibyte/sb1250.h> 45f137e463SAndrew Isaacson 46f137e463SAndrew Isaacson 47f137e463SAndrew Isaacson #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0 48f137e463SAndrew Isaacson #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 49f137e463SAndrew Isaacson #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 50f137e463SAndrew Isaacson 5116b7b2acSAtsushi Nemoto #ifdef CONFIG_SIMULATION 5216b7b2acSAtsushi Nemoto #define BCM1480_HPT_VALUE 50000 5316b7b2acSAtsushi Nemoto #else 5416b7b2acSAtsushi Nemoto #define BCM1480_HPT_VALUE 1000000 5516b7b2acSAtsushi Nemoto #endif 5616b7b2acSAtsushi Nemoto 57f137e463SAndrew Isaacson extern int bcm1480_steal_irq(int irq); 58f137e463SAndrew Isaacson 59e9f874b6SRalf Baechle void __init plat_time_init(void) 60f137e463SAndrew Isaacson { 61e9f874b6SRalf Baechle unsigned int cpu = smp_processor_id(); 62e9f874b6SRalf Baechle unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; 63f137e463SAndrew Isaacson 64e9f874b6SRalf Baechle BUG_ON(cpu > 3); /* Only have 4 general purpose timers */ 65f137e463SAndrew Isaacson 66f137e463SAndrew Isaacson bcm1480_mask_irq(cpu, irq); 67f137e463SAndrew Isaacson 68f137e463SAndrew Isaacson /* Map the timer interrupt to ip[4] of this cpu */ 69f137e463SAndrew Isaacson __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) 70f137e463SAndrew Isaacson + (irq<<3))); 71f137e463SAndrew Isaacson 72f137e463SAndrew Isaacson bcm1480_unmask_irq(cpu, irq); 73f137e463SAndrew Isaacson bcm1480_steal_irq(irq); 74e9f874b6SRalf Baechle } 75e9f874b6SRalf Baechle 76e9f874b6SRalf Baechle /* 77e9f874b6SRalf Baechle * The general purpose timer ticks at 1 Mhz independent if 78e9f874b6SRalf Baechle * the rest of the system 79e9f874b6SRalf Baechle */ 80e9f874b6SRalf Baechle static void sibyte_set_mode(enum clock_event_mode mode, 81e9f874b6SRalf Baechle struct clock_event_device *evt) 82e9f874b6SRalf Baechle { 83e9f874b6SRalf Baechle unsigned int cpu = smp_processor_id(); 84e9f874b6SRalf Baechle void __iomem *timer_cfg, *timer_init; 85e9f874b6SRalf Baechle 86e9f874b6SRalf Baechle timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 879ee5389cSAtsushi Nemoto timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 88e9f874b6SRalf Baechle 89e9f874b6SRalf Baechle switch (mode) { 90e9f874b6SRalf Baechle case CLOCK_EVT_MODE_PERIODIC: 91e9f874b6SRalf Baechle __raw_writeq(0, timer_cfg); 92e9f874b6SRalf Baechle __raw_writeq(BCM1480_HPT_VALUE / HZ - 1, timer_init); 93e9f874b6SRalf Baechle __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, 94e9f874b6SRalf Baechle timer_cfg); 95e9f874b6SRalf Baechle break; 96e9f874b6SRalf Baechle 97e9f874b6SRalf Baechle case CLOCK_EVT_MODE_ONESHOT: 98e9f874b6SRalf Baechle /* Stop the timer until we actually program a shot */ 99e9f874b6SRalf Baechle case CLOCK_EVT_MODE_SHUTDOWN: 100e9f874b6SRalf Baechle __raw_writeq(0, timer_cfg); 101e9f874b6SRalf Baechle break; 102e9f874b6SRalf Baechle 103e9f874b6SRalf Baechle case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */ 104e9f874b6SRalf Baechle ; 105e9f874b6SRalf Baechle } 106e9f874b6SRalf Baechle } 107e9f874b6SRalf Baechle 108e9f874b6SRalf Baechle struct clock_event_device sibyte_hpt_clockevent = { 109e9f874b6SRalf Baechle .name = "bcm1480-counter", 110e9f874b6SRalf Baechle .features = CLOCK_EVT_FEAT_PERIODIC, 111e9f874b6SRalf Baechle .set_mode = sibyte_set_mode, 112e9f874b6SRalf Baechle .shift = 32, 113e9f874b6SRalf Baechle .irq = 0, 114e9f874b6SRalf Baechle }; 115e9f874b6SRalf Baechle 116e9f874b6SRalf Baechle static irqreturn_t sibyte_counter_handler(int irq, void *dev_id) 117e9f874b6SRalf Baechle { 118e9f874b6SRalf Baechle struct clock_event_device *cd = &sibyte_hpt_clockevent; 119e9f874b6SRalf Baechle unsigned int cpu = smp_processor_id(); 120e9f874b6SRalf Baechle 121e9f874b6SRalf Baechle /* Reset the timer */ 122e9f874b6SRalf Baechle __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, 123e9f874b6SRalf Baechle IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 124e9f874b6SRalf Baechle cd->event_handler(cd); 125e9f874b6SRalf Baechle 126e9f874b6SRalf Baechle return IRQ_HANDLED; 127e9f874b6SRalf Baechle } 128e9f874b6SRalf Baechle 129e9f874b6SRalf Baechle static struct irqaction sibyte_counter_irqaction = { 130e9f874b6SRalf Baechle .handler = sibyte_counter_handler, 131e9f874b6SRalf Baechle .flags = IRQF_DISABLED | IRQF_PERCPU, 132e9f874b6SRalf Baechle .name = "timer", 133e9f874b6SRalf Baechle }; 134e9f874b6SRalf Baechle 135f137e463SAndrew Isaacson /* 136f137e463SAndrew Isaacson * This interrupt is "special" in that it doesn't use the request_irq 137f137e463SAndrew Isaacson * way to hook the irq line. The timer interrupt is initialized early 138f137e463SAndrew Isaacson * enough to make this a major pain, and it's also firing enough to 139f137e463SAndrew Isaacson * warrant a bit of special case code. bcm1480_timer_interrupt is 140f137e463SAndrew Isaacson * called directly from irq_handler.S when IP[4] is set during an 141f137e463SAndrew Isaacson * interrupt 142f137e463SAndrew Isaacson */ 143e9f874b6SRalf Baechle static void __init sb1480_clockevent_init(void) 144e9f874b6SRalf Baechle { 145e9f874b6SRalf Baechle unsigned int cpu = smp_processor_id(); 146e9f874b6SRalf Baechle unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; 147e9f874b6SRalf Baechle 148e9f874b6SRalf Baechle setup_irq(irq, &sibyte_counter_irqaction); 149f137e463SAndrew Isaacson } 150f137e463SAndrew Isaacson 151937a8015SRalf Baechle void bcm1480_timer_interrupt(void) 152f137e463SAndrew Isaacson { 153f137e463SAndrew Isaacson int cpu = smp_processor_id(); 154f137e463SAndrew Isaacson int irq = K_BCM1480_INT_TIMER_0 + cpu; 155f137e463SAndrew Isaacson 156f137e463SAndrew Isaacson /* Reset the timer */ 157f137e463SAndrew Isaacson __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, 158f137e463SAndrew Isaacson IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 159f137e463SAndrew Isaacson 160937a8015SRalf Baechle ll_timer_interrupt(irq); 161f137e463SAndrew Isaacson } 162f137e463SAndrew Isaacson 16300598560SAtsushi Nemoto static cycle_t bcm1480_hpt_read(void) 164f137e463SAndrew Isaacson { 16516b7b2acSAtsushi Nemoto /* We assume this function is called xtime_lock held. */ 166f137e463SAndrew Isaacson unsigned long count = 167f137e463SAndrew Isaacson __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); 16816b7b2acSAtsushi Nemoto return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count; 16916b7b2acSAtsushi Nemoto } 170f137e463SAndrew Isaacson 17116b7b2acSAtsushi Nemoto void __init bcm1480_hpt_setup(void) 17216b7b2acSAtsushi Nemoto { 17300598560SAtsushi Nemoto clocksource_mips.read = bcm1480_hpt_read; 17416b7b2acSAtsushi Nemoto mips_hpt_frequency = BCM1480_HPT_VALUE; 175e9f874b6SRalf Baechle sb1480_clockevent_init(); 176f137e463SAndrew Isaacson } 177