1f137e463SAndrew Isaacson /* 2f137e463SAndrew Isaacson * Copyright (C) 2000,2001,2004 Broadcom Corporation 3f137e463SAndrew Isaacson * 4f137e463SAndrew Isaacson * This program is free software; you can redistribute it and/or 5f137e463SAndrew Isaacson * modify it under the terms of the GNU General Public License 6f137e463SAndrew Isaacson * as published by the Free Software Foundation; either version 2 7f137e463SAndrew Isaacson * of the License, or (at your option) any later version. 8f137e463SAndrew Isaacson * 9f137e463SAndrew Isaacson * This program is distributed in the hope that it will be useful, 10f137e463SAndrew Isaacson * but WITHOUT ANY WARRANTY; without even the implied warranty of 11f137e463SAndrew Isaacson * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12f137e463SAndrew Isaacson * GNU General Public License for more details. 13f137e463SAndrew Isaacson * 14f137e463SAndrew Isaacson * You should have received a copy of the GNU General Public License 15f137e463SAndrew Isaacson * along with this program; if not, write to the Free Software 16f137e463SAndrew Isaacson * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17f137e463SAndrew Isaacson */ 18f137e463SAndrew Isaacson 19f137e463SAndrew Isaacson /* 20f137e463SAndrew Isaacson * These are routines to set up and handle interrupts from the 21f137e463SAndrew Isaacson * bcm1480 general purpose timer 0. We're using the timer as a 22f137e463SAndrew Isaacson * system clock, so we set it up to run at 100 Hz. On every 23f137e463SAndrew Isaacson * interrupt, we update our idea of what the time of day is, 24f137e463SAndrew Isaacson * then call do_timer() in the architecture-independent kernel 25f137e463SAndrew Isaacson * code to do general bookkeeping (e.g. update jiffies, run 26f137e463SAndrew Isaacson * bottom halves, etc.) 27f137e463SAndrew Isaacson */ 28f137e463SAndrew Isaacson #include <linux/interrupt.h> 29f137e463SAndrew Isaacson #include <linux/sched.h> 30f137e463SAndrew Isaacson #include <linux/spinlock.h> 31f137e463SAndrew Isaacson #include <linux/kernel_stat.h> 32f137e463SAndrew Isaacson 33f137e463SAndrew Isaacson #include <asm/irq.h> 34f137e463SAndrew Isaacson #include <asm/addrspace.h> 35f137e463SAndrew Isaacson #include <asm/time.h> 36f137e463SAndrew Isaacson #include <asm/io.h> 37f137e463SAndrew Isaacson 38f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_regs.h> 39f137e463SAndrew Isaacson #include <asm/sibyte/sb1250_regs.h> 40f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_int.h> 41f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_scd.h> 42f137e463SAndrew Isaacson 43f137e463SAndrew Isaacson #include <asm/sibyte/sb1250.h> 44f137e463SAndrew Isaacson 45f137e463SAndrew Isaacson 46f137e463SAndrew Isaacson #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0 47f137e463SAndrew Isaacson #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 48f137e463SAndrew Isaacson #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 49f137e463SAndrew Isaacson 5016b7b2acSAtsushi Nemoto #ifdef CONFIG_SIMULATION 5116b7b2acSAtsushi Nemoto #define BCM1480_HPT_VALUE 50000 5216b7b2acSAtsushi Nemoto #else 5316b7b2acSAtsushi Nemoto #define BCM1480_HPT_VALUE 1000000 5416b7b2acSAtsushi Nemoto #endif 5516b7b2acSAtsushi Nemoto 56f137e463SAndrew Isaacson extern int bcm1480_steal_irq(int irq); 57f137e463SAndrew Isaacson 58f137e463SAndrew Isaacson void bcm1480_time_init(void) 59f137e463SAndrew Isaacson { 60f137e463SAndrew Isaacson int cpu = smp_processor_id(); 61f137e463SAndrew Isaacson int irq = K_BCM1480_INT_TIMER_0+cpu; 62f137e463SAndrew Isaacson 63f137e463SAndrew Isaacson /* Only have 4 general purpose timers */ 64f137e463SAndrew Isaacson if (cpu > 3) { 65f137e463SAndrew Isaacson BUG(); 66f137e463SAndrew Isaacson } 67f137e463SAndrew Isaacson 68f137e463SAndrew Isaacson bcm1480_mask_irq(cpu, irq); 69f137e463SAndrew Isaacson 70f137e463SAndrew Isaacson /* Map the timer interrupt to ip[4] of this cpu */ 71f137e463SAndrew Isaacson __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) 72f137e463SAndrew Isaacson + (irq<<3))); 73f137e463SAndrew Isaacson 74f137e463SAndrew Isaacson /* the general purpose timer ticks at 1 Mhz independent of the rest of the system */ 75f137e463SAndrew Isaacson /* Disable the timer and set up the count */ 76f137e463SAndrew Isaacson __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 77f137e463SAndrew Isaacson __raw_writeq( 7816b7b2acSAtsushi Nemoto BCM1480_HPT_VALUE/HZ 79f137e463SAndrew Isaacson , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); 80f137e463SAndrew Isaacson 81f137e463SAndrew Isaacson /* Set the timer running */ 82f137e463SAndrew Isaacson __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, 83f137e463SAndrew Isaacson IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 84f137e463SAndrew Isaacson 85f137e463SAndrew Isaacson bcm1480_unmask_irq(cpu, irq); 86f137e463SAndrew Isaacson bcm1480_steal_irq(irq); 87f137e463SAndrew Isaacson /* 88f137e463SAndrew Isaacson * This interrupt is "special" in that it doesn't use the request_irq 89f137e463SAndrew Isaacson * way to hook the irq line. The timer interrupt is initialized early 90f137e463SAndrew Isaacson * enough to make this a major pain, and it's also firing enough to 91f137e463SAndrew Isaacson * warrant a bit of special case code. bcm1480_timer_interrupt is 92f137e463SAndrew Isaacson * called directly from irq_handler.S when IP[4] is set during an 93f137e463SAndrew Isaacson * interrupt 94f137e463SAndrew Isaacson */ 95f137e463SAndrew Isaacson } 96f137e463SAndrew Isaacson 97937a8015SRalf Baechle void bcm1480_timer_interrupt(void) 98f137e463SAndrew Isaacson { 99f137e463SAndrew Isaacson int cpu = smp_processor_id(); 100f137e463SAndrew Isaacson int irq = K_BCM1480_INT_TIMER_0 + cpu; 101f137e463SAndrew Isaacson 102f137e463SAndrew Isaacson /* Reset the timer */ 103f137e463SAndrew Isaacson __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, 104f137e463SAndrew Isaacson IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 105f137e463SAndrew Isaacson 106e1701fb2S[MIPS] James E Wilson if (cpu == 0) { 107f137e463SAndrew Isaacson /* 108f137e463SAndrew Isaacson * CPU 0 handles the global timer interrupt job 109f137e463SAndrew Isaacson */ 110937a8015SRalf Baechle ll_timer_interrupt(irq); 111f137e463SAndrew Isaacson } 112e1701fb2S[MIPS] James E Wilson else { 113f137e463SAndrew Isaacson /* 114e1701fb2S[MIPS] James E Wilson * other CPUs should just do profiling and process accounting 115f137e463SAndrew Isaacson */ 116937a8015SRalf Baechle ll_local_timer_interrupt(irq); 117f137e463SAndrew Isaacson } 118e1701fb2S[MIPS] James E Wilson } 119f137e463SAndrew Isaacson 12000598560SAtsushi Nemoto static cycle_t bcm1480_hpt_read(void) 121f137e463SAndrew Isaacson { 12216b7b2acSAtsushi Nemoto /* We assume this function is called xtime_lock held. */ 123f137e463SAndrew Isaacson unsigned long count = 124f137e463SAndrew Isaacson __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); 12516b7b2acSAtsushi Nemoto return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count; 12616b7b2acSAtsushi Nemoto } 127f137e463SAndrew Isaacson 12816b7b2acSAtsushi Nemoto void __init bcm1480_hpt_setup(void) 12916b7b2acSAtsushi Nemoto { 13000598560SAtsushi Nemoto clocksource_mips.read = bcm1480_hpt_read; 13116b7b2acSAtsushi Nemoto mips_hpt_frequency = BCM1480_HPT_VALUE; 132f137e463SAndrew Isaacson } 133