1config SIBYTE_SB1250 2 bool 3 select HW_HAS_PCI 4 select SIBYTE_ENABLE_LDT_IF_PCI 5 select SIBYTE_SB1xxx_SOC 6 select SYS_SUPPORTS_SMP 7 8config SIBYTE_BCM1120 9 bool 10 select SIBYTE_BCM112X 11 select SIBYTE_SB1xxx_SOC 12 13config SIBYTE_BCM1125 14 bool 15 select HW_HAS_PCI 16 select SIBYTE_BCM112X 17 select SIBYTE_SB1xxx_SOC 18 19config SIBYTE_BCM1125H 20 bool 21 select HW_HAS_PCI 22 select SIBYTE_BCM112X 23 select SIBYTE_ENABLE_LDT_IF_PCI 24 select SIBYTE_SB1xxx_SOC 25 26config SIBYTE_BCM112X 27 bool 28 select SIBYTE_SB1xxx_SOC 29 30config SIBYTE_BCM1x80 31 bool 32 select HW_HAS_PCI 33 select SIBYTE_SB1xxx_SOC 34 select SYS_SUPPORTS_SMP 35 36config SIBYTE_BCM1x55 37 bool 38 select HW_HAS_PCI 39 select SIBYTE_SB1xxx_SOC 40 select SYS_SUPPORTS_SMP 41 42config SIBYTE_SB1xxx_SOC 43 bool 44 depends on EXPERIMENTAL 45 select DMA_COHERENT 46 select SIBYTE_CFE 47 select SWAP_IO_SPACE 48 select SYS_SUPPORTS_32BIT_KERNEL 49 select SYS_SUPPORTS_64BIT_KERNEL 50 51choice 52 prompt "SiByte SOC Stepping" 53 depends on SIBYTE_SB1xxx_SOC 54 55config CPU_SB1_PASS_1 56 bool "1250 Pass1" 57 depends on SIBYTE_SB1250 58 select CPU_HAS_PREFETCH 59 60config CPU_SB1_PASS_2_1250 61 bool "1250 An" 62 depends on SIBYTE_SB1250 63 select CPU_SB1_PASS_2 64 help 65 Also called BCM1250 Pass 2 66 67config CPU_SB1_PASS_2_2 68 bool "1250 Bn" 69 depends on SIBYTE_SB1250 70 select CPU_HAS_PREFETCH 71 help 72 Also called BCM1250 Pass 2.2 73 74config CPU_SB1_PASS_4 75 bool "1250 Cn" 76 depends on SIBYTE_SB1250 77 select CPU_HAS_PREFETCH 78 help 79 Also called BCM1250 Pass 3 80 81config CPU_SB1_PASS_2_112x 82 bool "112x Hybrid" 83 depends on SIBYTE_BCM112X 84 select CPU_SB1_PASS_2 85 86config CPU_SB1_PASS_3 87 bool "112x An" 88 depends on SIBYTE_BCM112X 89 select CPU_HAS_PREFETCH 90 91endchoice 92 93config CPU_SB1_PASS_2 94 bool 95 96config SIBYTE_HAS_LDT 97 bool 98 99config SIBYTE_ENABLE_LDT_IF_PCI 100 bool 101 select SIBYTE_HAS_LDT if PCI 102 103config SIMULATION 104 bool "Running under simulation" 105 depends on SIBYTE_SB1xxx_SOC 106 help 107 Build a kernel suitable for running under the GDB simulator. 108 Primarily adjusts the kernel's notion of time. 109 110config SB1_CEX_ALWAYS_FATAL 111 bool "All cache exceptions considered fatal (no recovery attempted)" 112 depends on SIBYTE_SB1xxx_SOC 113 114config SB1_CERR_STALL 115 bool "Stall (rather than panic) on fatal cache error" 116 depends on SIBYTE_SB1xxx_SOC 117 118config SIBYTE_CFE 119 bool "Booting from CFE" 120 depends on SIBYTE_SB1xxx_SOC 121 select SYS_HAS_EARLY_PRINTK 122 help 123 Make use of the CFE API for enumerating available memory, 124 controlling secondary CPUs, and possibly console output. 125 126config SIBYTE_CFE_CONSOLE 127 bool "Use firmware console" 128 depends on SIBYTE_CFE 129 help 130 Use the CFE API's console write routines during boot. Other console 131 options (VT console, sb1250 duart console, etc.) should not be 132 configured. 133 134config SIBYTE_STANDALONE 135 bool 136 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE 137 select SYS_HAS_EARLY_PRINTK 138 default y 139 140config SIBYTE_STANDALONE_RAM_SIZE 141 int "Memory size (in megabytes)" 142 depends on SIBYTE_STANDALONE 143 default "32" 144 145config SIBYTE_BUS_WATCHER 146 bool "Support for Bus Watcher statistics" 147 depends on SIBYTE_SB1xxx_SOC 148 help 149 Handle and keep statistics on the bus error interrupts (COR_ECC, 150 BAD_ECC, IO_BUS). 151 152config SIBYTE_BW_TRACE 153 bool "Capture bus trace before bus error" 154 depends on SIBYTE_BUS_WATCHER 155 help 156 Run a continuous bus trace, dumping the raw data as soon as 157 a ZBbus error is detected. Cannot work if ZBbus profiling 158 is turned on, and also will interfere with JTAG-based trace 159 buffer activity. Raw buffer data is dumped to console, and 160 must be processed off-line. 161 162config SIBYTE_SB1250_PROF 163 bool "Support for SB1/SOC profiling - SB1/SCD perf counters" 164 depends on SIBYTE_SB1xxx_SOC 165 166config SIBYTE_TBPROF 167 bool "Support for ZBbus profiling" 168 depends on SIBYTE_SB1xxx_SOC 169