xref: /openbmc/linux/arch/mips/sibyte/Kconfig (revision 435f81f4)
1config SIBYTE_SB1250
2	bool
3	select CEVT_SB1250
4	select CSRC_SB1250
5	select HW_HAS_PCI
6	select IRQ_CPU
7	select SIBYTE_ENABLE_LDT_IF_PCI
8	select SIBYTE_HAS_ZBUS_PROFILING
9	select SIBYTE_SB1xxx_SOC
10	select SYS_SUPPORTS_SMP
11
12config SIBYTE_BCM1120
13	bool
14	select CEVT_SB1250
15	select CSRC_SB1250
16	select IRQ_CPU
17	select SIBYTE_BCM112X
18	select SIBYTE_HAS_ZBUS_PROFILING
19	select SIBYTE_SB1xxx_SOC
20
21config SIBYTE_BCM1125
22	bool
23	select CEVT_SB1250
24	select CSRC_SB1250
25	select HW_HAS_PCI
26	select IRQ_CPU
27	select SIBYTE_BCM112X
28	select SIBYTE_HAS_ZBUS_PROFILING
29	select SIBYTE_SB1xxx_SOC
30
31config SIBYTE_BCM1125H
32	bool
33	select CEVT_SB1250
34	select CSRC_SB1250
35	select HW_HAS_PCI
36	select IRQ_CPU
37	select SIBYTE_BCM112X
38	select SIBYTE_ENABLE_LDT_IF_PCI
39	select SIBYTE_HAS_ZBUS_PROFILING
40	select SIBYTE_SB1xxx_SOC
41
42config SIBYTE_BCM112X
43	bool
44	select CEVT_SB1250
45	select CSRC_SB1250
46	select IRQ_CPU
47	select SIBYTE_SB1xxx_SOC
48	select SIBYTE_HAS_ZBUS_PROFILING
49
50config SIBYTE_BCM1x80
51	bool
52	select CEVT_BCM1480
53	select CSRC_BCM1480
54	select HW_HAS_PCI
55	select IRQ_CPU
56	select SIBYTE_HAS_ZBUS_PROFILING
57	select SIBYTE_SB1xxx_SOC
58	select SYS_SUPPORTS_SMP
59
60config SIBYTE_BCM1x55
61	bool
62	select CEVT_BCM1480
63	select CSRC_BCM1480
64	select HW_HAS_PCI
65	select IRQ_CPU
66	select SIBYTE_SB1xxx_SOC
67	select SIBYTE_HAS_ZBUS_PROFILING
68	select SYS_SUPPORTS_SMP
69
70config SIBYTE_SB1xxx_SOC
71	bool
72	select DMA_COHERENT
73	select IRQ_CPU
74	select SIBYTE_CFE
75	select SWAP_IO_SPACE
76	select SYS_SUPPORTS_32BIT_KERNEL
77	select SYS_SUPPORTS_64BIT_KERNEL
78
79choice
80	prompt "SiByte SOC Stepping"
81	depends on SIBYTE_SB1xxx_SOC
82
83config CPU_SB1_PASS_1
84	bool "1250 Pass1"
85	depends on SIBYTE_SB1250
86	select CPU_HAS_PREFETCH
87
88config CPU_SB1_PASS_2_1250
89	bool "1250 An"
90	depends on SIBYTE_SB1250
91	select CPU_SB1_PASS_2
92	help
93	  Also called BCM1250 Pass 2
94
95config CPU_SB1_PASS_2_2
96	bool "1250 Bn"
97	depends on SIBYTE_SB1250
98	select CPU_HAS_PREFETCH
99	help
100	  Also called BCM1250 Pass 2.2
101
102config CPU_SB1_PASS_4
103	bool "1250 Cn"
104	depends on SIBYTE_SB1250
105	select CPU_HAS_PREFETCH
106	help
107	  Also called BCM1250 Pass 3
108
109config CPU_SB1_PASS_2_112x
110	bool "112x Hybrid"
111	depends on SIBYTE_BCM112X
112	select CPU_SB1_PASS_2
113
114config CPU_SB1_PASS_3
115	bool "112x An"
116	depends on SIBYTE_BCM112X
117	select CPU_HAS_PREFETCH
118
119endchoice
120
121config CPU_SB1_PASS_2
122	bool
123
124config SIBYTE_HAS_LDT
125	bool
126
127config SIBYTE_ENABLE_LDT_IF_PCI
128	bool
129	select SIBYTE_HAS_LDT if PCI
130
131config SB1_CEX_ALWAYS_FATAL
132	bool "All cache exceptions considered fatal (no recovery attempted)"
133	depends on SIBYTE_SB1xxx_SOC
134
135config SB1_CERR_STALL
136	bool "Stall (rather than panic) on fatal cache error"
137	depends on SIBYTE_SB1xxx_SOC
138
139config SIBYTE_CFE
140	bool "Booting from CFE"
141	depends on SIBYTE_SB1xxx_SOC
142	select CFE
143	select SYS_HAS_EARLY_PRINTK
144	help
145	  Make use of the CFE API for enumerating available memory,
146	  controlling secondary CPUs, and possibly console output.
147
148config SIBYTE_CFE_CONSOLE
149	bool "Use firmware console"
150	depends on SIBYTE_CFE
151	help
152	  Use the CFE API's console write routines during boot.  Other console
153	  options (VT console, sb1250 duart console, etc.) should not be
154	  configured.
155
156config SIBYTE_STANDALONE
157	bool
158	depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
159	select SYS_HAS_EARLY_PRINTK
160	default y
161
162config SIBYTE_STANDALONE_RAM_SIZE
163	int "Memory size (in megabytes)"
164	depends on SIBYTE_STANDALONE
165	default "32"
166
167config SIBYTE_BUS_WATCHER
168	bool "Support for Bus Watcher statistics"
169	depends on SIBYTE_SB1xxx_SOC
170	help
171	  Handle and keep statistics on the bus error interrupts (COR_ECC,
172	  BAD_ECC, IO_BUS).
173
174config SIBYTE_BW_TRACE
175	bool "Capture bus trace before bus error"
176	depends on SIBYTE_BUS_WATCHER
177	help
178	  Run a continuous bus trace, dumping the raw data as soon as
179	  a ZBbus error is detected.  Cannot work if ZBbus profiling
180	  is turned on, and also will interfere with JTAG-based trace
181	  buffer activity.  Raw buffer data is dumped to console, and
182	  must be processed off-line.
183
184config SIBYTE_TBPROF
185	tristate "Support for ZBbus profiling"
186	depends on SIBYTE_HAS_ZBUS_PROFILING
187
188config SIBYTE_HAS_ZBUS_PROFILING
189	bool
190