1 /* 2 * ip22-int.c: Routines for generic manipulation of the INT[23] ASIC 3 * found on INDY and Indigo2 workstations. 4 * 5 * Copyright (C) 1996 David S. Miller (davem@davemloft.net) 6 * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org) 7 * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu) 8 * - Indigo2 changes 9 * - Interrupt handling fixes 10 * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org) 11 */ 12 #include <linux/types.h> 13 #include <linux/init.h> 14 #include <linux/kernel_stat.h> 15 #include <linux/interrupt.h> 16 #include <linux/ftrace.h> 17 18 #include <asm/irq_cpu.h> 19 #include <asm/sgi/hpc3.h> 20 #include <asm/sgi/ip22.h> 21 22 /* So far nothing hangs here */ 23 #undef USE_LIO3_IRQ 24 25 struct sgint_regs *sgint; 26 27 static char lc0msk_to_irqnr[256]; 28 static char lc1msk_to_irqnr[256]; 29 static char lc2msk_to_irqnr[256]; 30 static char lc3msk_to_irqnr[256]; 31 32 extern int ip22_eisa_init(void); 33 34 static void enable_local0_irq(struct irq_data *d) 35 { 36 /* don't allow mappable interrupt to be enabled from setup_irq, 37 * we have our own way to do so */ 38 if (d->irq != SGI_MAP_0_IRQ) 39 sgint->imask0 |= (1 << (d->irq - SGINT_LOCAL0)); 40 } 41 42 static void disable_local0_irq(struct irq_data *d) 43 { 44 sgint->imask0 &= ~(1 << (d->irq - SGINT_LOCAL0)); 45 } 46 47 static struct irq_chip ip22_local0_irq_type = { 48 .name = "IP22 local 0", 49 .irq_mask = disable_local0_irq, 50 .irq_unmask = enable_local0_irq, 51 }; 52 53 static void enable_local1_irq(struct irq_data *d) 54 { 55 /* don't allow mappable interrupt to be enabled from setup_irq, 56 * we have our own way to do so */ 57 if (d->irq != SGI_MAP_1_IRQ) 58 sgint->imask1 |= (1 << (d->irq - SGINT_LOCAL1)); 59 } 60 61 static void disable_local1_irq(struct irq_data *d) 62 { 63 sgint->imask1 &= ~(1 << (d->irq - SGINT_LOCAL1)); 64 } 65 66 static struct irq_chip ip22_local1_irq_type = { 67 .name = "IP22 local 1", 68 .irq_mask = disable_local1_irq, 69 .irq_unmask = enable_local1_irq, 70 }; 71 72 static void enable_local2_irq(struct irq_data *d) 73 { 74 sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); 75 sgint->cmeimask0 |= (1 << (d->irq - SGINT_LOCAL2)); 76 } 77 78 static void disable_local2_irq(struct irq_data *d) 79 { 80 sgint->cmeimask0 &= ~(1 << (d->irq - SGINT_LOCAL2)); 81 if (!sgint->cmeimask0) 82 sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); 83 } 84 85 static struct irq_chip ip22_local2_irq_type = { 86 .name = "IP22 local 2", 87 .irq_mask = disable_local2_irq, 88 .irq_unmask = enable_local2_irq, 89 }; 90 91 static void enable_local3_irq(struct irq_data *d) 92 { 93 sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); 94 sgint->cmeimask1 |= (1 << (d->irq - SGINT_LOCAL3)); 95 } 96 97 static void disable_local3_irq(struct irq_data *d) 98 { 99 sgint->cmeimask1 &= ~(1 << (d->irq - SGINT_LOCAL3)); 100 if (!sgint->cmeimask1) 101 sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); 102 } 103 104 static struct irq_chip ip22_local3_irq_type = { 105 .name = "IP22 local 3", 106 .irq_mask = disable_local3_irq, 107 .irq_unmask = enable_local3_irq, 108 }; 109 110 static void indy_local0_irqdispatch(void) 111 { 112 u8 mask = sgint->istat0 & sgint->imask0; 113 u8 mask2; 114 int irq; 115 116 if (mask & SGINT_ISTAT0_LIO2) { 117 mask2 = sgint->vmeistat & sgint->cmeimask0; 118 irq = lc2msk_to_irqnr[mask2]; 119 } else 120 irq = lc0msk_to_irqnr[mask]; 121 122 /* 123 * workaround for INT2 bug; if irq == 0, INT2 has seen a fifo full 124 * irq, but failed to latch it into status register 125 */ 126 if (irq) 127 do_IRQ(irq); 128 else 129 do_IRQ(SGINT_LOCAL0 + 0); 130 } 131 132 static void indy_local1_irqdispatch(void) 133 { 134 u8 mask = sgint->istat1 & sgint->imask1; 135 u8 mask2; 136 int irq; 137 138 if (mask & SGINT_ISTAT1_LIO3) { 139 mask2 = sgint->vmeistat & sgint->cmeimask1; 140 irq = lc3msk_to_irqnr[mask2]; 141 } else 142 irq = lc1msk_to_irqnr[mask]; 143 144 /* if irq == 0, then the interrupt has already been cleared */ 145 if (irq) 146 do_IRQ(irq); 147 } 148 149 extern void ip22_be_interrupt(int irq); 150 151 static void __irq_entry indy_buserror_irq(void) 152 { 153 int irq = SGI_BUSERR_IRQ; 154 155 irq_enter(); 156 kstat_incr_irq_this_cpu(irq); 157 ip22_be_interrupt(irq); 158 irq_exit(); 159 } 160 161 static struct irqaction local0_cascade = { 162 .handler = no_action, 163 .flags = IRQF_NO_THREAD, 164 .name = "local0 cascade", 165 }; 166 167 static struct irqaction local1_cascade = { 168 .handler = no_action, 169 .flags = IRQF_NO_THREAD, 170 .name = "local1 cascade", 171 }; 172 173 static struct irqaction buserr = { 174 .handler = no_action, 175 .flags = IRQF_NO_THREAD, 176 .name = "Bus Error", 177 }; 178 179 static struct irqaction map0_cascade = { 180 .handler = no_action, 181 .flags = IRQF_NO_THREAD, 182 .name = "mapable0 cascade", 183 }; 184 185 #ifdef USE_LIO3_IRQ 186 static struct irqaction map1_cascade = { 187 .handler = no_action, 188 .flags = IRQF_NO_THREAD, 189 .name = "mapable1 cascade", 190 }; 191 #define SGI_INTERRUPTS SGINT_END 192 #else 193 #define SGI_INTERRUPTS SGINT_LOCAL3 194 #endif 195 196 extern void indy_8254timer_irq(void); 197 198 /* 199 * IRQs on the INDY look basically (barring software IRQs which we don't use 200 * at all) like: 201 * 202 * MIPS IRQ Source 203 * -------- ------ 204 * 0 Software (ignored) 205 * 1 Software (ignored) 206 * 2 Local IRQ level zero 207 * 3 Local IRQ level one 208 * 4 8254 Timer zero 209 * 5 8254 Timer one 210 * 6 Bus Error 211 * 7 R4k timer (what we use) 212 * 213 * We handle the IRQ according to _our_ priority which is: 214 * 215 * Highest ---- R4k Timer 216 * Local IRQ zero 217 * Local IRQ one 218 * Bus Error 219 * 8254 Timer zero 220 * Lowest ---- 8254 Timer one 221 * 222 * then we just return, if multiple IRQs are pending then we will just take 223 * another exception, big deal. 224 */ 225 226 asmlinkage void plat_irq_dispatch(void) 227 { 228 unsigned int pending = read_c0_status() & read_c0_cause(); 229 230 /* 231 * First we check for r4k counter/timer IRQ. 232 */ 233 if (pending & CAUSEF_IP7) 234 do_IRQ(SGI_TIMER_IRQ); 235 else if (pending & CAUSEF_IP2) 236 indy_local0_irqdispatch(); 237 else if (pending & CAUSEF_IP3) 238 indy_local1_irqdispatch(); 239 else if (pending & CAUSEF_IP6) 240 indy_buserror_irq(); 241 else if (pending & (CAUSEF_IP4 | CAUSEF_IP5)) 242 indy_8254timer_irq(); 243 } 244 245 void __init arch_init_irq(void) 246 { 247 int i; 248 249 /* Init local mask --> irq tables. */ 250 for (i = 0; i < 256; i++) { 251 if (i & 0x80) { 252 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7; 253 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7; 254 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7; 255 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7; 256 } else if (i & 0x40) { 257 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6; 258 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6; 259 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6; 260 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6; 261 } else if (i & 0x20) { 262 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5; 263 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5; 264 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5; 265 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5; 266 } else if (i & 0x10) { 267 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4; 268 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4; 269 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4; 270 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4; 271 } else if (i & 0x08) { 272 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3; 273 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3; 274 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3; 275 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3; 276 } else if (i & 0x04) { 277 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2; 278 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2; 279 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2; 280 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2; 281 } else if (i & 0x02) { 282 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1; 283 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1; 284 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1; 285 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1; 286 } else if (i & 0x01) { 287 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0; 288 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0; 289 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0; 290 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0; 291 } else { 292 lc0msk_to_irqnr[i] = 0; 293 lc1msk_to_irqnr[i] = 0; 294 lc2msk_to_irqnr[i] = 0; 295 lc3msk_to_irqnr[i] = 0; 296 } 297 } 298 299 /* Mask out all interrupts. */ 300 sgint->imask0 = 0; 301 sgint->imask1 = 0; 302 sgint->cmeimask0 = 0; 303 sgint->cmeimask1 = 0; 304 305 /* init CPU irqs */ 306 mips_cpu_irq_init(); 307 308 for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) { 309 struct irq_chip *handler; 310 311 if (i < SGINT_LOCAL1) 312 handler = &ip22_local0_irq_type; 313 else if (i < SGINT_LOCAL2) 314 handler = &ip22_local1_irq_type; 315 else if (i < SGINT_LOCAL3) 316 handler = &ip22_local2_irq_type; 317 else 318 handler = &ip22_local3_irq_type; 319 320 irq_set_chip_and_handler(i, handler, handle_level_irq); 321 } 322 323 /* vector handler. this register the IRQ as non-sharable */ 324 setup_irq(SGI_LOCAL_0_IRQ, &local0_cascade); 325 setup_irq(SGI_LOCAL_1_IRQ, &local1_cascade); 326 setup_irq(SGI_BUSERR_IRQ, &buserr); 327 328 /* cascade in cascade. i love Indy ;-) */ 329 setup_irq(SGI_MAP_0_IRQ, &map0_cascade); 330 #ifdef USE_LIO3_IRQ 331 setup_irq(SGI_MAP_1_IRQ, &map1_cascade); 332 #endif 333 334 #ifdef CONFIG_EISA 335 if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */ 336 ip22_eisa_init(); 337 #endif 338 } 339