1 /* 2 * RouterBoard 500 Platform devices 3 * 4 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> 5 * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 #include <linux/kernel.h> 18 #include <linux/init.h> 19 #include <linux/ctype.h> 20 #include <linux/string.h> 21 #include <linux/platform_device.h> 22 #include <linux/mtd/nand.h> 23 #include <linux/mtd/mtd.h> 24 #include <linux/mtd/partitions.h> 25 #include <linux/gpio_keys.h> 26 #include <linux/input.h> 27 28 #include <asm/bootinfo.h> 29 30 #include <asm/mach-rc32434/rc32434.h> 31 #include <asm/mach-rc32434/dma.h> 32 #include <asm/mach-rc32434/dma_v.h> 33 #include <asm/mach-rc32434/eth.h> 34 #include <asm/mach-rc32434/rb.h> 35 #include <asm/mach-rc32434/integ.h> 36 #include <asm/mach-rc32434/gpio.h> 37 38 #define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0) 39 #define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1) 40 #define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9) 41 #define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10) 42 43 #define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET) 44 #define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET) 45 46 /* NAND definitions */ 47 #define GPIO_RDY (1 << 0x08) 48 #define GPIO_WPX (1 << 0x09) 49 #define GPIO_ALE (1 << 0x0a) 50 #define GPIO_CLE (1 << 0x0b) 51 52 extern char *board_type; 53 54 static struct resource korina_dev0_res[] = { 55 { 56 .name = "korina_regs", 57 .start = ETH0_BASE_ADDR, 58 .end = ETH0_BASE_ADDR + sizeof(struct eth_regs), 59 .flags = IORESOURCE_MEM, 60 }, { 61 .name = "korina_rx", 62 .start = ETH0_DMA_RX_IRQ, 63 .end = ETH0_DMA_RX_IRQ, 64 .flags = IORESOURCE_IRQ 65 }, { 66 .name = "korina_tx", 67 .start = ETH0_DMA_TX_IRQ, 68 .end = ETH0_DMA_TX_IRQ, 69 .flags = IORESOURCE_IRQ 70 }, { 71 .name = "korina_ovr", 72 .start = ETH0_RX_OVR_IRQ, 73 .end = ETH0_RX_OVR_IRQ, 74 .flags = IORESOURCE_IRQ 75 }, { 76 .name = "korina_und", 77 .start = ETH0_TX_UND_IRQ, 78 .end = ETH0_TX_UND_IRQ, 79 .flags = IORESOURCE_IRQ 80 }, { 81 .name = "korina_dma_rx", 82 .start = ETH0_RX_DMA_ADDR, 83 .end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1, 84 .flags = IORESOURCE_MEM, 85 }, { 86 .name = "korina_dma_tx", 87 .start = ETH0_TX_DMA_ADDR, 88 .end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1, 89 .flags = IORESOURCE_MEM, 90 } 91 }; 92 93 static struct korina_device korina_dev0_data = { 94 .name = "korina0", 95 .mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee} 96 }; 97 98 static struct platform_device korina_dev0 = { 99 .id = 0, 100 .name = "korina", 101 .dev.platform_data = &korina_dev0_data, 102 .resource = korina_dev0_res, 103 .num_resources = ARRAY_SIZE(korina_dev0_res), 104 }; 105 106 #define CF_GPIO_NUM 13 107 108 static struct resource cf_slot0_res[] = { 109 { 110 .name = "cf_membase", 111 .flags = IORESOURCE_MEM 112 }, { 113 .name = "cf_irq", 114 .start = (8 + 4 * 32 + CF_GPIO_NUM), /* 149 */ 115 .end = (8 + 4 * 32 + CF_GPIO_NUM), 116 .flags = IORESOURCE_IRQ 117 } 118 }; 119 120 static struct cf_device cf_slot0_data = { 121 .gpio_pin = 13 122 }; 123 124 static struct platform_device cf_slot0 = { 125 .id = 0, 126 .name = "pata-rb532-cf", 127 .dev.platform_data = &cf_slot0_data, 128 .resource = cf_slot0_res, 129 .num_resources = ARRAY_SIZE(cf_slot0_res), 130 }; 131 132 /* Resources and device for NAND */ 133 static int rb532_dev_ready(struct mtd_info *mtd) 134 { 135 return readl(IDT434_REG_BASE + GPIOD) & GPIO_RDY; 136 } 137 138 static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 139 { 140 struct nand_chip *chip = mtd->priv; 141 unsigned char orbits, nandbits; 142 143 if (ctrl & NAND_CTRL_CHANGE) { 144 orbits = (ctrl & NAND_CLE) << 1; 145 orbits |= (ctrl & NAND_ALE) >> 1; 146 147 nandbits = (~ctrl & NAND_CLE) << 1; 148 nandbits |= (~ctrl & NAND_ALE) >> 1; 149 150 set_latch_u5(orbits, nandbits); 151 } 152 if (cmd != NAND_CMD_NONE) 153 writeb(cmd, chip->IO_ADDR_W); 154 } 155 156 static struct resource nand_slot0_res[] = { 157 [0] = { 158 .name = "nand_membase", 159 .flags = IORESOURCE_MEM 160 } 161 }; 162 163 static struct platform_nand_data rb532_nand_data = { 164 .ctrl.dev_ready = rb532_dev_ready, 165 .ctrl.cmd_ctrl = rb532_cmd_ctrl, 166 }; 167 168 static struct platform_device nand_slot0 = { 169 .name = "gen_nand", 170 .id = -1, 171 .resource = nand_slot0_res, 172 .num_resources = ARRAY_SIZE(nand_slot0_res), 173 .dev.platform_data = &rb532_nand_data, 174 }; 175 176 static struct mtd_partition rb532_partition_info[] = { 177 { 178 .name = "Routerboard NAND boot", 179 .offset = 0, 180 .size = 4 * 1024 * 1024, 181 }, { 182 .name = "rootfs", 183 .offset = MTDPART_OFS_NXTBLK, 184 .size = MTDPART_SIZ_FULL, 185 } 186 }; 187 188 static struct platform_device rb532_led = { 189 .name = "rb532-led", 190 .id = 0, 191 }; 192 193 static struct gpio_keys_button rb532_gpio_btn[] = { 194 { 195 .gpio = 1, 196 .code = BTN_0, 197 .desc = "S1", 198 .active_low = 1, 199 } 200 }; 201 202 static struct gpio_keys_platform_data rb532_gpio_btn_data = { 203 .buttons = rb532_gpio_btn, 204 .nbuttons = ARRAY_SIZE(rb532_gpio_btn), 205 }; 206 207 static struct platform_device rb532_button = { 208 .name = "gpio-keys", 209 .id = -1, 210 .dev = { 211 .platform_data = &rb532_gpio_btn_data, 212 } 213 }; 214 215 static struct resource rb532_wdt_res[] = { 216 { 217 .name = "rb532_wdt_res", 218 .start = INTEG0_BASE_ADDR, 219 .end = INTEG0_BASE_ADDR + sizeof(struct integ), 220 .flags = IORESOURCE_MEM, 221 } 222 }; 223 224 static struct platform_device rb532_wdt = { 225 .name = "rc32434_wdt", 226 .id = -1, 227 .resource = rb532_wdt_res, 228 .num_resources = ARRAY_SIZE(rb532_wdt_res), 229 }; 230 231 static struct platform_device *rb532_devs[] = { 232 &korina_dev0, 233 &nand_slot0, 234 &cf_slot0, 235 &rb532_led, 236 &rb532_button, 237 &rb532_wdt 238 }; 239 240 static void __init parse_mac_addr(char *macstr) 241 { 242 int i, j; 243 unsigned char result, value; 244 245 for (i = 0; i < 6; i++) { 246 result = 0; 247 248 if (i != 5 && *(macstr + 2) != ':') 249 return; 250 251 for (j = 0; j < 2; j++) { 252 if (isxdigit(*macstr) 253 && (value = 254 isdigit(*macstr) ? *macstr - 255 '0' : toupper(*macstr) - 'A' + 10) < 16) { 256 result = result * 16 + value; 257 macstr++; 258 } else 259 return; 260 } 261 262 macstr++; 263 korina_dev0_data.mac[i] = result; 264 } 265 } 266 267 268 /* DEVICE CONTROLLER 1 */ 269 #define CFG_DC_DEV1 ((void *)0xb8010010) 270 #define CFG_DC_DEV2 ((void *)0xb8010020) 271 #define CFG_DC_DEVBASE 0x0 272 #define CFG_DC_DEVMASK 0x4 273 #define CFG_DC_DEVC 0x8 274 #define CFG_DC_DEVTC 0xC 275 276 /* NAND definitions */ 277 #define NAND_CHIP_DELAY 25 278 279 static void __init rb532_nand_setup(void) 280 { 281 switch (mips_machtype) { 282 case MACH_MIKROTIK_RB532A: 283 set_latch_u5(LO_FOFF | LO_CEX, 284 LO_ULED | LO_ALE | LO_CLE | LO_WPX); 285 break; 286 default: 287 set_latch_u5(LO_WPX | LO_FOFF | LO_CEX, 288 LO_ULED | LO_ALE | LO_CLE); 289 break; 290 } 291 292 /* Setup NAND specific settings */ 293 rb532_nand_data.chip.nr_chips = 1; 294 rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info); 295 rb532_nand_data.chip.partitions = rb532_partition_info; 296 rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY; 297 rb532_nand_data.chip.options = NAND_NO_AUTOINCR; 298 } 299 300 301 static int __init plat_setup_devices(void) 302 { 303 /* Look for the CF card reader */ 304 if (!readl(CFG_DC_DEV1 + CFG_DC_DEVMASK)) 305 rb532_devs[1] = NULL; 306 else { 307 cf_slot0_res[0].start = 308 readl(CFG_DC_DEV1 + CFG_DC_DEVBASE); 309 cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000; 310 } 311 312 /* Read the NAND resources from the device controller */ 313 nand_slot0_res[0].start = readl(CFG_DC_DEV2 + CFG_DC_DEVBASE); 314 nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000; 315 316 /* Initialise the NAND device */ 317 rb532_nand_setup(); 318 319 return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs)); 320 } 321 322 static int __init setup_kmac(char *s) 323 { 324 printk(KERN_INFO "korina mac = %s\n", s); 325 parse_mac_addr(s); 326 return 0; 327 } 328 329 __setup("kmac=", setup_kmac); 330 331 arch_initcall(plat_setup_devices); 332