1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * 4 * Parts of this file are based on Ralink's 2.6.21 BSP 5 * 6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 7 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> 8 * Copyright (C) 2013 John Crispin <john@phrozen.org> 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/init.h> 13 #include <linux/slab.h> 14 #include <linux/sys_soc.h> 15 16 #include <asm/mipsregs.h> 17 #include <asm/mach-ralink/ralink_regs.h> 18 #include <asm/mach-ralink/rt3883.h> 19 20 #include "common.h" 21 22 static struct ralink_soc_info *soc_info_ptr; 23 24 void __init ralink_clk_init(void) 25 { 26 unsigned long cpu_rate, sys_rate; 27 u32 syscfg0; 28 u32 clksel; 29 u32 ddr2; 30 31 syscfg0 = rt_sysc_r32(RT3883_SYSC_REG_SYSCFG0); 32 clksel = ((syscfg0 >> RT3883_SYSCFG0_CPUCLK_SHIFT) & 33 RT3883_SYSCFG0_CPUCLK_MASK); 34 ddr2 = syscfg0 & RT3883_SYSCFG0_DRAM_TYPE_DDR2; 35 36 switch (clksel) { 37 case RT3883_SYSCFG0_CPUCLK_250: 38 cpu_rate = 250000000; 39 sys_rate = (ddr2) ? 125000000 : 83000000; 40 break; 41 case RT3883_SYSCFG0_CPUCLK_384: 42 cpu_rate = 384000000; 43 sys_rate = (ddr2) ? 128000000 : 96000000; 44 break; 45 case RT3883_SYSCFG0_CPUCLK_480: 46 cpu_rate = 480000000; 47 sys_rate = (ddr2) ? 160000000 : 120000000; 48 break; 49 case RT3883_SYSCFG0_CPUCLK_500: 50 cpu_rate = 500000000; 51 sys_rate = (ddr2) ? 166000000 : 125000000; 52 break; 53 } 54 55 ralink_clk_add("cpu", cpu_rate); 56 ralink_clk_add("10000100.timer", sys_rate); 57 ralink_clk_add("10000120.watchdog", sys_rate); 58 ralink_clk_add("10000500.uart", 40000000); 59 ralink_clk_add("10000900.i2c", 40000000); 60 ralink_clk_add("10000a00.i2s", 40000000); 61 ralink_clk_add("10000b00.spi", sys_rate); 62 ralink_clk_add("10000b40.spi", sys_rate); 63 ralink_clk_add("10000c00.uartlite", 40000000); 64 ralink_clk_add("10100000.ethernet", sys_rate); 65 ralink_clk_add("10180000.wmac", 40000000); 66 } 67 68 void __init ralink_of_remap(void) 69 { 70 rt_sysc_membase = plat_of_remap_node("ralink,rt3883-sysc"); 71 rt_memc_membase = plat_of_remap_node("ralink,rt3883-memc"); 72 73 if (!rt_sysc_membase || !rt_memc_membase) 74 panic("Failed to remap core resources"); 75 } 76 77 static unsigned int __init rt3883_get_soc_name0(void) 78 { 79 return __raw_readl(RT3883_SYSC_BASE + RT3883_SYSC_REG_CHIPID0_3); 80 } 81 82 static unsigned int __init rt3883_get_soc_name1(void) 83 { 84 return __raw_readl(RT3883_SYSC_BASE + RT3883_SYSC_REG_CHIPID4_7); 85 } 86 87 static bool __init rt3883_soc_valid(void) 88 { 89 if (rt3883_get_soc_name0() == RT3883_CHIP_NAME0 && 90 rt3883_get_soc_name1() == RT3883_CHIP_NAME1) 91 return true; 92 else 93 return false; 94 } 95 96 static const char __init *rt3883_get_soc_name(void) 97 { 98 if (rt3883_soc_valid()) 99 return "RT3883"; 100 else 101 return "invalid"; 102 } 103 104 static unsigned int __init rt3883_get_soc_id(void) 105 { 106 return __raw_readl(RT3883_SYSC_BASE + RT3883_SYSC_REG_REVID); 107 } 108 109 static unsigned int __init rt3883_get_soc_ver(void) 110 { 111 return (rt3883_get_soc_id() >> RT3883_REVID_VER_ID_SHIFT) & RT3883_REVID_VER_ID_MASK; 112 } 113 114 static unsigned int __init rt3883_get_soc_rev(void) 115 { 116 return (rt3883_get_soc_id() & RT3883_REVID_ECO_ID_MASK); 117 } 118 119 static int __init rt3883_soc_dev_init(void) 120 { 121 struct soc_device *soc_dev; 122 struct soc_device_attribute *soc_dev_attr; 123 124 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 125 if (!soc_dev_attr) 126 return -ENOMEM; 127 128 soc_dev_attr->family = "Ralink"; 129 soc_dev_attr->soc_id = rt3883_get_soc_name(); 130 131 soc_dev_attr->data = soc_info_ptr; 132 133 soc_dev = soc_device_register(soc_dev_attr); 134 if (IS_ERR(soc_dev)) { 135 kfree(soc_dev_attr); 136 return PTR_ERR(soc_dev); 137 } 138 139 return 0; 140 } 141 device_initcall(rt3883_soc_dev_init); 142 143 void __init prom_soc_init(struct ralink_soc_info *soc_info) 144 { 145 if (rt3883_soc_valid()) 146 soc_info->compatible = "ralink,rt3883-soc"; 147 else 148 panic("rt3883: unknown SoC, n0:%08x n1:%08x", 149 rt3883_get_soc_name0(), rt3883_get_soc_name1()); 150 151 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, 152 "Ralink %s ver:%u eco:%u", 153 rt3883_get_soc_name(), 154 rt3883_get_soc_ver(), 155 rt3883_get_soc_rev()); 156 157 soc_info->mem_base = RT3883_SDRAM_BASE; 158 soc_info->mem_size_min = RT3883_MEM_SIZE_MIN; 159 soc_info->mem_size_max = RT3883_MEM_SIZE_MAX; 160 161 ralink_soc = RT3883_SOC; 162 soc_info_ptr = soc_info; 163 } 164