xref: /openbmc/linux/arch/mips/ralink/early_printk.c (revision a06c488d)
1 /*
2  *  This program is free software; you can redistribute it and/or modify it
3  *  under the terms of the GNU General Public License version 2 as published
4  *  by the Free Software Foundation.
5  *
6  *  Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
7  */
8 
9 #include <linux/io.h>
10 #include <linux/serial_reg.h>
11 
12 #include <asm/addrspace.h>
13 
14 #ifdef CONFIG_SOC_RT288X
15 #define EARLY_UART_BASE		0x300c00
16 #define CHIPID_BASE		0x300004
17 #elif defined(CONFIG_SOC_MT7621)
18 #define EARLY_UART_BASE		0x1E000c00
19 #define CHIPID_BASE		0x1E000004
20 #else
21 #define EARLY_UART_BASE		0x10000c00
22 #define CHIPID_BASE		0x10000004
23 #endif
24 
25 #define MT7628_CHIP_NAME1	0x20203832
26 
27 #define UART_REG_TX		0x04
28 #define UART_REG_LCR		0x0c
29 #define UART_REG_LSR		0x14
30 #define UART_REG_LSR_RT2880	0x1c
31 
32 static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
33 static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE);
34 static int init_complete;
35 
36 static inline void uart_w32(u32 val, unsigned reg)
37 {
38 	__raw_writel(val, uart_membase + reg);
39 }
40 
41 static inline u32 uart_r32(unsigned reg)
42 {
43 	return __raw_readl(uart_membase + reg);
44 }
45 
46 static inline int soc_is_mt7628(void)
47 {
48 	return IS_ENABLED(CONFIG_SOC_MT7620) &&
49 		(__raw_readl(chipid_membase) == MT7628_CHIP_NAME1);
50 }
51 
52 static void find_uart_base(void)
53 {
54 	int i;
55 
56 	if (!soc_is_mt7628())
57 		return;
58 
59 	for (i = 0; i < 3; i++) {
60 		u32 reg = uart_r32(UART_REG_LCR + (0x100 * i));
61 
62 		if (!reg)
63 			continue;
64 
65 		uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE +
66 							  (0x100 * i));
67 		break;
68 	}
69 }
70 
71 void prom_putchar(unsigned char ch)
72 {
73 	if (!init_complete) {
74 		find_uart_base();
75 		init_complete = 1;
76 	}
77 
78 	if (IS_ENABLED(CONFIG_SOC_MT7621) || soc_is_mt7628()) {
79 		uart_w32(ch, UART_TX);
80 		while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
81 			;
82 	} else {
83 		while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
84 			;
85 		uart_w32(ch, UART_REG_TX);
86 		while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
87 			;
88 	}
89 }
90