xref: /openbmc/linux/arch/mips/ralink/clk.c (revision 249592bf)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *
4  *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
5  *  Copyright (C) 2013 John Crispin <john@phrozen.org>
6  */
7 
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/export.h>
11 #include <linux/clkdev.h>
12 #include <linux/clk.h>
13 
14 #include <asm/time.h>
15 
16 #include "common.h"
17 
18 struct clk {
19 	struct clk_lookup cl;
20 	unsigned long rate;
21 };
22 
23 void ralink_clk_add(const char *dev, unsigned long rate)
24 {
25 	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
26 
27 	if (!clk)
28 		panic("failed to add clock");
29 
30 	clk->cl.dev_id = dev;
31 	clk->cl.clk = clk;
32 
33 	clk->rate = rate;
34 
35 	clkdev_add(&clk->cl);
36 }
37 
38 /*
39  * Linux clock API
40  */
41 int clk_enable(struct clk *clk)
42 {
43 	return 0;
44 }
45 EXPORT_SYMBOL_GPL(clk_enable);
46 
47 void clk_disable(struct clk *clk)
48 {
49 }
50 EXPORT_SYMBOL_GPL(clk_disable);
51 
52 unsigned long clk_get_rate(struct clk *clk)
53 {
54 	if (!clk)
55 		return 0;
56 
57 	return clk->rate;
58 }
59 EXPORT_SYMBOL_GPL(clk_get_rate);
60 
61 int clk_set_rate(struct clk *clk, unsigned long rate)
62 {
63 	return -1;
64 }
65 EXPORT_SYMBOL_GPL(clk_set_rate);
66 
67 long clk_round_rate(struct clk *clk, unsigned long rate)
68 {
69 	return -1;
70 }
71 EXPORT_SYMBOL_GPL(clk_round_rate);
72 
73 int clk_set_parent(struct clk *clk, struct clk *parent)
74 {
75 	WARN_ON(clk);
76 	return -1;
77 }
78 EXPORT_SYMBOL_GPL(clk_set_parent);
79 
80 struct clk *clk_get_parent(struct clk *clk)
81 {
82 	WARN_ON(clk);
83 	return NULL;
84 }
85 EXPORT_SYMBOL_GPL(clk_get_parent);
86 
87 void __init plat_time_init(void)
88 {
89 	struct clk *clk;
90 
91 	ralink_of_remap();
92 
93 	ralink_clk_init();
94 	clk = clk_get_sys("cpu", NULL);
95 	if (IS_ERR(clk))
96 		panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
97 	pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
98 	mips_hpt_frequency = clk_get_rate(clk) / 2;
99 	clk_put(clk);
100 	timer_probe();
101 }
102