xref: /openbmc/linux/arch/mips/pci/fixup-rbtx4927.c (revision 8449d399)
1 /*
2  *
3  * BRIEF MODULE DESCRIPTION
4  *      Board specific pci fixups for the Toshiba rbtx4927
5  *
6  * Copyright 2001 MontaVista Software Inc.
7  * Author: MontaVista Software, Inc.
8  *              ppopov@mvista.com or source@mvista.com
9  *
10  * Copyright (C) 2000-2001 Toshiba Corporation
11  *
12  * Copyright (C) 2004 MontaVista Software Inc.
13  * Author: Manish Lachwani (mlachwani@mvista.com)
14  *
15  *  This program is free software; you can redistribute  it and/or modify it
16  *  under  the terms of  the GNU General  Public License as published by the
17  *  Free Software Foundation;  either version 2 of the  License, or (at your
18  *  option) any later version.
19  *
20  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
21  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
22  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
23  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
24  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
26  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
28  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  *  You should have received a copy of the  GNU General Public License along
32  *  with this program; if not, write  to the Free Software Foundation, Inc.,
33  *  675 Mass Ave, Cambridge, MA 02139, USA.
34  */
35 #include <linux/types.h>
36 #include <linux/pci.h>
37 #include <linux/kernel.h>
38 #include <linux/init.h>
39 
40 #include <asm/tx4927/tx4927.h>
41 #include <asm/tx4927/tx4927_pci.h>
42 
43 #undef  DEBUG
44 #ifdef  DEBUG
45 #define DBG(x...)       printk(x)
46 #else
47 #define DBG(x...)
48 #endif
49 
50 /* look up table for backplane pci irq for slots 17-20 by pin # */
51 static unsigned char backplane_pci_irq[4][4] = {
52 	/* PJ6 SLOT:  17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
53 				     /* PJ6 SLOT:  17, PIN: 2 */
54 				     TX4927_IRQ_IOC_PCIB,
55 				     /* PJ6 SLOT:  17, PIN: 3 */
56 				     TX4927_IRQ_IOC_PCIC,
57 				     /* PJ6 SLOT:  17, PIN: 4 */
58 				     TX4927_IRQ_IOC_PCID},
59 	/* SB  SLOT:  18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
60 				     /* SB  SLOT:  18, PIN: 2 */
61 				     TX4927_IRQ_IOC_PCIC,
62 				     /* SB  SLOT:  18, PIN: 3 */
63 				     TX4927_IRQ_IOC_PCID,
64 				     /* SB  SLOT:  18, PIN: 4 */
65 				     TX4927_IRQ_IOC_PCIA},
66 	/* PJ5 SLOT:  19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
67 				     /* PJ5 SLOT:  19, PIN: 2 */
68 				     TX4927_IRQ_IOC_PCID,
69 				     /* PJ5 SLOT:  19, PIN: 3 */
70 				     TX4927_IRQ_IOC_PCIA,
71 				     /* PJ5 SLOT:  19, PIN: 4 */
72 				     TX4927_IRQ_IOC_PCIB},
73 	/* PJ4 SLOT:  20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
74 				     /* PJ4 SLOT:  20, PIN: 2 */
75 				     TX4927_IRQ_IOC_PCIA,
76 				     /* PJ4 SLOT:  20, PIN: 3 */
77 				     TX4927_IRQ_IOC_PCIB,
78 				     /* PJ4 SLOT:  20, PIN: 4 */
79 				     TX4927_IRQ_IOC_PCIC}
80 };
81 
82 static int pci_get_irq(const struct pci_dev *dev, int pin)
83 {
84 	unsigned char irq = pin;
85 
86 	DBG("pci_get_irq: pin is %d\n", pin);
87 	/* IRQ rotation */
88 	irq--;			/* 0-3 */
89 	if (dev->bus->parent == NULL &&
90 	    PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
91 		printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
92 		       PCI_SLOT(dev->devfn));
93 		/* IDSEL=A23 is tx4927 onboard pci slot */
94 		irq = (irq + PCI_SLOT(dev->devfn)) % 4;
95 		irq++;		/* 1-4 */
96 		DBG("irq is now %d\n", irq);
97 
98 		switch (irq) {
99 		case 1:
100 			irq = TX4927_IRQ_IOC_PCIA;
101 			break;
102 		case 2:
103 			irq = TX4927_IRQ_IOC_PCIB;
104 			break;
105 		case 3:
106 			irq = TX4927_IRQ_IOC_PCIC;
107 			break;
108 		case 4:
109 			irq = TX4927_IRQ_IOC_PCID;
110 			break;
111 		}
112 	} else {
113 		/* PCI Backplane */
114 		DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
115 		    PCI_SLOT(dev->devfn));
116 		irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
117 	}
118 	DBG("assigned irq %d\n", irq);
119 	return irq;
120 }
121 
122 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
123 {
124 	unsigned char irq;
125 
126 	printk("PCI Setup for pin %d \n", pin);
127 
128 	if (dev->device == 0x9130) /* IDE */
129 		irq = 14;
130 	else
131 		irq = pci_get_irq(dev, pin);
132 
133 	return irq;
134 }
135 
136 /* Do platform specific device initialization at pci_enable_device() time */
137 int pcibios_plat_dev_init(struct pci_dev *dev)
138 {
139 	return 0;
140 }
141