xref: /openbmc/linux/arch/mips/mm/init.c (revision 8e9356c6)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1994 - 2000 Ralf Baechle
7  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
10  */
11 #include <linux/bug.h>
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/smp.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/string.h>
20 #include <linux/types.h>
21 #include <linux/pagemap.h>
22 #include <linux/ptrace.h>
23 #include <linux/mman.h>
24 #include <linux/mm.h>
25 #include <linux/bootmem.h>
26 #include <linux/highmem.h>
27 #include <linux/swap.h>
28 #include <linux/proc_fs.h>
29 #include <linux/pfn.h>
30 #include <linux/hardirq.h>
31 #include <linux/gfp.h>
32 #include <linux/kcore.h>
33 
34 #include <asm/asm-offsets.h>
35 #include <asm/bootinfo.h>
36 #include <asm/cachectl.h>
37 #include <asm/cpu.h>
38 #include <asm/dma.h>
39 #include <asm/kmap_types.h>
40 #include <asm/mmu_context.h>
41 #include <asm/sections.h>
42 #include <asm/pgtable.h>
43 #include <asm/pgalloc.h>
44 #include <asm/tlb.h>
45 #include <asm/fixmap.h>
46 
47 /* Atomicity and interruptability */
48 #ifdef CONFIG_MIPS_MT_SMTC
49 
50 #include <asm/mipsmtregs.h>
51 
52 #define ENTER_CRITICAL(flags) \
53 	{ \
54 	unsigned int mvpflags; \
55 	local_irq_save(flags);\
56 	mvpflags = dvpe()
57 #define EXIT_CRITICAL(flags) \
58 	evpe(mvpflags); \
59 	local_irq_restore(flags); \
60 	}
61 #else
62 
63 #define ENTER_CRITICAL(flags) local_irq_save(flags)
64 #define EXIT_CRITICAL(flags) local_irq_restore(flags)
65 
66 #endif /* CONFIG_MIPS_MT_SMTC */
67 
68 /*
69  * We have up to 8 empty zeroed pages so we can map one of the right colour
70  * when needed.	 This is necessary only on R4000 / R4400 SC and MC versions
71  * where we have to avoid VCED / VECI exceptions for good performance at
72  * any price.  Since page is never written to after the initialization we
73  * don't have to care about aliases on other CPUs.
74  */
75 unsigned long empty_zero_page, zero_page_mask;
76 EXPORT_SYMBOL_GPL(empty_zero_page);
77 
78 /*
79  * Not static inline because used by IP27 special magic initialization code
80  */
81 void setup_zero_pages(void)
82 {
83 	unsigned int order, i;
84 	struct page *page;
85 
86 	if (cpu_has_vce)
87 		order = 3;
88 	else
89 		order = 0;
90 
91 	empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
92 	if (!empty_zero_page)
93 		panic("Oh boy, that early out of memory?");
94 
95 	page = virt_to_page((void *)empty_zero_page);
96 	split_page(page, order);
97 	for (i = 0; i < (1 << order); i++, page++)
98 		mark_page_reserved(page);
99 
100 	zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK;
101 }
102 
103 #ifdef CONFIG_MIPS_MT_SMTC
104 static pte_t *kmap_coherent_pte;
105 static void __init kmap_coherent_init(void)
106 {
107 	unsigned long vaddr;
108 
109 	/* cache the first coherent kmap pte */
110 	vaddr = __fix_to_virt(FIX_CMAP_BEGIN);
111 	kmap_coherent_pte = kmap_get_fixmap_pte(vaddr);
112 }
113 #else
114 static inline void kmap_coherent_init(void) {}
115 #endif
116 
117 void *kmap_coherent(struct page *page, unsigned long addr)
118 {
119 	enum fixed_addresses idx;
120 	unsigned long vaddr, flags, entrylo;
121 	unsigned long old_ctx;
122 	pte_t pte;
123 	int tlbidx;
124 
125 	BUG_ON(Page_dcache_dirty(page));
126 
127 	pagefault_disable();
128 	idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
129 #ifdef CONFIG_MIPS_MT_SMTC
130 	idx += FIX_N_COLOURS * smp_processor_id() +
131 		(in_interrupt() ? (FIX_N_COLOURS * NR_CPUS) : 0);
132 #else
133 	idx += in_interrupt() ? FIX_N_COLOURS : 0;
134 #endif
135 	vaddr = __fix_to_virt(FIX_CMAP_END - idx);
136 	pte = mk_pte(page, PAGE_KERNEL);
137 #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
138 	entrylo = pte.pte_high;
139 #else
140 	entrylo = pte_to_entrylo(pte_val(pte));
141 #endif
142 
143 	ENTER_CRITICAL(flags);
144 	old_ctx = read_c0_entryhi();
145 	write_c0_entryhi(vaddr & (PAGE_MASK << 1));
146 	write_c0_entrylo0(entrylo);
147 	write_c0_entrylo1(entrylo);
148 #ifdef CONFIG_MIPS_MT_SMTC
149 	set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte);
150 	/* preload TLB instead of local_flush_tlb_one() */
151 	mtc0_tlbw_hazard();
152 	tlb_probe();
153 	tlb_probe_hazard();
154 	tlbidx = read_c0_index();
155 	mtc0_tlbw_hazard();
156 	if (tlbidx < 0)
157 		tlb_write_random();
158 	else
159 		tlb_write_indexed();
160 #else
161 	tlbidx = read_c0_wired();
162 	write_c0_wired(tlbidx + 1);
163 	write_c0_index(tlbidx);
164 	mtc0_tlbw_hazard();
165 	tlb_write_indexed();
166 #endif
167 	tlbw_use_hazard();
168 	write_c0_entryhi(old_ctx);
169 	EXIT_CRITICAL(flags);
170 
171 	return (void*) vaddr;
172 }
173 
174 void kunmap_coherent(void)
175 {
176 #ifndef CONFIG_MIPS_MT_SMTC
177 	unsigned int wired;
178 	unsigned long flags, old_ctx;
179 
180 	ENTER_CRITICAL(flags);
181 	old_ctx = read_c0_entryhi();
182 	wired = read_c0_wired() - 1;
183 	write_c0_wired(wired);
184 	write_c0_index(wired);
185 	write_c0_entryhi(UNIQUE_ENTRYHI(wired));
186 	write_c0_entrylo0(0);
187 	write_c0_entrylo1(0);
188 	mtc0_tlbw_hazard();
189 	tlb_write_indexed();
190 	tlbw_use_hazard();
191 	write_c0_entryhi(old_ctx);
192 	EXIT_CRITICAL(flags);
193 #endif
194 	pagefault_enable();
195 }
196 
197 void copy_user_highpage(struct page *to, struct page *from,
198 	unsigned long vaddr, struct vm_area_struct *vma)
199 {
200 	void *vfrom, *vto;
201 
202 	vto = kmap_atomic(to);
203 	if (cpu_has_dc_aliases &&
204 	    page_mapped(from) && !Page_dcache_dirty(from)) {
205 		vfrom = kmap_coherent(from, vaddr);
206 		copy_page(vto, vfrom);
207 		kunmap_coherent();
208 	} else {
209 		vfrom = kmap_atomic(from);
210 		copy_page(vto, vfrom);
211 		kunmap_atomic(vfrom);
212 	}
213 	if ((!cpu_has_ic_fills_f_dc) ||
214 	    pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
215 		flush_data_cache_page((unsigned long)vto);
216 	kunmap_atomic(vto);
217 	/* Make sure this page is cleared on other CPU's too before using it */
218 	smp_wmb();
219 }
220 
221 void copy_to_user_page(struct vm_area_struct *vma,
222 	struct page *page, unsigned long vaddr, void *dst, const void *src,
223 	unsigned long len)
224 {
225 	if (cpu_has_dc_aliases &&
226 	    page_mapped(page) && !Page_dcache_dirty(page)) {
227 		void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
228 		memcpy(vto, src, len);
229 		kunmap_coherent();
230 	} else {
231 		memcpy(dst, src, len);
232 		if (cpu_has_dc_aliases)
233 			SetPageDcacheDirty(page);
234 	}
235 	if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc)
236 		flush_cache_page(vma, vaddr, page_to_pfn(page));
237 }
238 
239 void copy_from_user_page(struct vm_area_struct *vma,
240 	struct page *page, unsigned long vaddr, void *dst, const void *src,
241 	unsigned long len)
242 {
243 	if (cpu_has_dc_aliases &&
244 	    page_mapped(page) && !Page_dcache_dirty(page)) {
245 		void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
246 		memcpy(dst, vfrom, len);
247 		kunmap_coherent();
248 	} else {
249 		memcpy(dst, src, len);
250 		if (cpu_has_dc_aliases)
251 			SetPageDcacheDirty(page);
252 	}
253 }
254 EXPORT_SYMBOL_GPL(copy_from_user_page);
255 
256 void __init fixrange_init(unsigned long start, unsigned long end,
257 	pgd_t *pgd_base)
258 {
259 #if defined(CONFIG_HIGHMEM) || defined(CONFIG_MIPS_MT_SMTC)
260 	pgd_t *pgd;
261 	pud_t *pud;
262 	pmd_t *pmd;
263 	pte_t *pte;
264 	int i, j, k;
265 	unsigned long vaddr;
266 
267 	vaddr = start;
268 	i = __pgd_offset(vaddr);
269 	j = __pud_offset(vaddr);
270 	k = __pmd_offset(vaddr);
271 	pgd = pgd_base + i;
272 
273 	for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
274 		pud = (pud_t *)pgd;
275 		for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
276 			pmd = (pmd_t *)pud;
277 			for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
278 				if (pmd_none(*pmd)) {
279 					pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
280 					set_pmd(pmd, __pmd((unsigned long)pte));
281 					BUG_ON(pte != pte_offset_kernel(pmd, 0));
282 				}
283 				vaddr += PMD_SIZE;
284 			}
285 			k = 0;
286 		}
287 		j = 0;
288 	}
289 #endif
290 }
291 
292 #ifndef CONFIG_NEED_MULTIPLE_NODES
293 int page_is_ram(unsigned long pagenr)
294 {
295 	int i;
296 
297 	for (i = 0; i < boot_mem_map.nr_map; i++) {
298 		unsigned long addr, end;
299 
300 		switch (boot_mem_map.map[i].type) {
301 		case BOOT_MEM_RAM:
302 		case BOOT_MEM_INIT_RAM:
303 			break;
304 		default:
305 			/* not usable memory */
306 			continue;
307 		}
308 
309 		addr = PFN_UP(boot_mem_map.map[i].addr);
310 		end = PFN_DOWN(boot_mem_map.map[i].addr +
311 			       boot_mem_map.map[i].size);
312 
313 		if (pagenr >= addr && pagenr < end)
314 			return 1;
315 	}
316 
317 	return 0;
318 }
319 
320 void __init paging_init(void)
321 {
322 	unsigned long max_zone_pfns[MAX_NR_ZONES];
323 	unsigned long lastpfn __maybe_unused;
324 
325 	pagetable_init();
326 
327 #ifdef CONFIG_HIGHMEM
328 	kmap_init();
329 #endif
330 	kmap_coherent_init();
331 
332 #ifdef CONFIG_ZONE_DMA
333 	max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
334 #endif
335 #ifdef CONFIG_ZONE_DMA32
336 	max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
337 #endif
338 	max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
339 	lastpfn = max_low_pfn;
340 #ifdef CONFIG_HIGHMEM
341 	max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
342 	lastpfn = highend_pfn;
343 
344 	if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
345 		printk(KERN_WARNING "This processor doesn't support highmem."
346 		       " %ldk highmem ignored\n",
347 		       (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
348 		max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
349 		lastpfn = max_low_pfn;
350 	}
351 #endif
352 
353 	free_area_init_nodes(max_zone_pfns);
354 }
355 
356 #ifdef CONFIG_64BIT
357 static struct kcore_list kcore_kseg0;
358 #endif
359 
360 static inline void mem_init_free_highmem(void)
361 {
362 #ifdef CONFIG_HIGHMEM
363 	unsigned long tmp;
364 
365 	for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
366 		struct page *page = pfn_to_page(tmp);
367 
368 		if (!page_is_ram(tmp))
369 			SetPageReserved(page);
370 		else
371 			free_highmem_page(page);
372 	}
373 #endif
374 }
375 
376 void __init mem_init(void)
377 {
378 #ifdef CONFIG_HIGHMEM
379 #ifdef CONFIG_DISCONTIGMEM
380 #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
381 #endif
382 	max_mapnr = highend_pfn ? highend_pfn : max_low_pfn;
383 #else
384 	max_mapnr = max_low_pfn;
385 #endif
386 	high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
387 
388 	free_all_bootmem();
389 	setup_zero_pages();	/* Setup zeroed pages.  */
390 	mem_init_free_highmem();
391 	mem_init_print_info(NULL);
392 
393 #ifdef CONFIG_64BIT
394 	if ((unsigned long) &_text > (unsigned long) CKSEG0)
395 		/* The -4 is a hack so that user tools don't have to handle
396 		   the overflow.  */
397 		kclist_add(&kcore_kseg0, (void *) CKSEG0,
398 				0x80000000 - 4, KCORE_TEXT);
399 #endif
400 }
401 #endif /* !CONFIG_NEED_MULTIPLE_NODES */
402 
403 void free_init_pages(const char *what, unsigned long begin, unsigned long end)
404 {
405 	unsigned long pfn;
406 
407 	for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
408 		struct page *page = pfn_to_page(pfn);
409 		void *addr = phys_to_virt(PFN_PHYS(pfn));
410 
411 		memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
412 		free_reserved_page(page);
413 	}
414 	printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
415 }
416 
417 #ifdef CONFIG_BLK_DEV_INITRD
418 void free_initrd_mem(unsigned long start, unsigned long end)
419 {
420 	free_reserved_area((void *)start, (void *)end, POISON_FREE_INITMEM,
421 			   "initrd");
422 }
423 #endif
424 
425 void __init_refok free_initmem(void)
426 {
427 	prom_free_prom_memory();
428 	free_initmem_default(POISON_FREE_INITMEM);
429 }
430 
431 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
432 unsigned long pgd_current[NR_CPUS];
433 #endif
434 
435 /*
436  * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER
437  * are constants.  So we use the variants from asm-offset.h until that gcc
438  * will officially be retired.
439  *
440  * Align swapper_pg_dir in to 64K, allows its address to be loaded
441  * with a single LUI instruction in the TLB handlers.  If we used
442  * __aligned(64K), its size would get rounded up to the alignment
443  * size, and waste space.  So we place it in its own section and align
444  * it in the linker script.
445  */
446 pgd_t swapper_pg_dir[_PTRS_PER_PGD] __section(.bss..swapper_pg_dir);
447 #ifndef __PAGETABLE_PMD_FOLDED
448 pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
449 #endif
450 pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;
451