xref: /openbmc/linux/arch/mips/mm/cache.c (revision a1e58bbd)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
7  * Copyright (C) 2007 MIPS Technologies, Inc.
8  */
9 #include <linux/fs.h>
10 #include <linux/fcntl.h>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/linkage.h>
14 #include <linux/module.h>
15 #include <linux/sched.h>
16 #include <linux/mm.h>
17 
18 #include <asm/cacheflush.h>
19 #include <asm/processor.h>
20 #include <asm/cpu.h>
21 #include <asm/cpu-features.h>
22 
23 /* Cache operations. */
24 void (*flush_cache_all)(void);
25 void (*__flush_cache_all)(void);
26 void (*flush_cache_mm)(struct mm_struct *mm);
27 void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
28 	unsigned long end);
29 void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
30 	unsigned long pfn);
31 void (*flush_icache_range)(unsigned long start, unsigned long end);
32 
33 void (*__flush_cache_vmap)(void);
34 void (*__flush_cache_vunmap)(void);
35 
36 /* MIPS specific cache operations */
37 void (*flush_cache_sigtramp)(unsigned long addr);
38 void (*local_flush_data_cache_page)(void * addr);
39 void (*flush_data_cache_page)(unsigned long addr);
40 void (*flush_icache_all)(void);
41 
42 EXPORT_SYMBOL_GPL(local_flush_data_cache_page);
43 EXPORT_SYMBOL(flush_data_cache_page);
44 
45 #ifdef CONFIG_DMA_NONCOHERENT
46 
47 /* DMA cache operations. */
48 void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
49 void (*_dma_cache_wback)(unsigned long start, unsigned long size);
50 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
51 
52 EXPORT_SYMBOL(_dma_cache_wback_inv);
53 
54 #endif /* CONFIG_DMA_NONCOHERENT */
55 
56 /*
57  * We could optimize the case where the cache argument is not BCACHE but
58  * that seems very atypical use ...
59  */
60 asmlinkage int sys_cacheflush(unsigned long addr,
61 	unsigned long bytes, unsigned int cache)
62 {
63 	if (bytes == 0)
64 		return 0;
65 	if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
66 		return -EFAULT;
67 
68 	flush_icache_range(addr, addr + bytes);
69 
70 	return 0;
71 }
72 
73 void __flush_dcache_page(struct page *page)
74 {
75 	struct address_space *mapping = page_mapping(page);
76 	unsigned long addr;
77 
78 	if (PageHighMem(page))
79 		return;
80 	if (mapping && !mapping_mapped(mapping)) {
81 		SetPageDcacheDirty(page);
82 		return;
83 	}
84 
85 	/*
86 	 * We could delay the flush for the !page_mapping case too.  But that
87 	 * case is for exec env/arg pages and those are %99 certainly going to
88 	 * get faulted into the tlb (and thus flushed) anyways.
89 	 */
90 	addr = (unsigned long) page_address(page);
91 	flush_data_cache_page(addr);
92 }
93 
94 EXPORT_SYMBOL(__flush_dcache_page);
95 
96 void __flush_anon_page(struct page *page, unsigned long vmaddr)
97 {
98 	unsigned long addr = (unsigned long) page_address(page);
99 
100 	if (pages_do_alias(addr, vmaddr)) {
101 		if (page_mapped(page) && !Page_dcache_dirty(page)) {
102 			void *kaddr;
103 
104 			kaddr = kmap_coherent(page, vmaddr);
105 			flush_data_cache_page((unsigned long)kaddr);
106 			kunmap_coherent();
107 		} else
108 			flush_data_cache_page(addr);
109 	}
110 }
111 
112 EXPORT_SYMBOL(__flush_anon_page);
113 
114 void __update_cache(struct vm_area_struct *vma, unsigned long address,
115 	pte_t pte)
116 {
117 	struct page *page;
118 	unsigned long pfn, addr;
119 	int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
120 
121 	pfn = pte_pfn(pte);
122 	if (unlikely(!pfn_valid(pfn)))
123 		return;
124 	page = pfn_to_page(pfn);
125 	if (page_mapping(page) && Page_dcache_dirty(page)) {
126 		addr = (unsigned long) page_address(page);
127 		if (exec || pages_do_alias(addr, address & PAGE_MASK))
128 			flush_data_cache_page(addr);
129 		ClearPageDcacheDirty(page);
130 	}
131 }
132 
133 static char cache_panic[] __cpuinitdata =
134 	"Yeee, unsupported cache architecture.";
135 
136 void __devinit cpu_cache_init(void)
137 {
138 	if (cpu_has_3k_cache) {
139 		extern void __weak r3k_cache_init(void);
140 
141 		r3k_cache_init();
142 		return;
143 	}
144 	if (cpu_has_6k_cache) {
145 		extern void __weak r6k_cache_init(void);
146 
147 		r6k_cache_init();
148 		return;
149 	}
150 	if (cpu_has_4k_cache) {
151 		extern void __weak r4k_cache_init(void);
152 
153 		r4k_cache_init();
154 		return;
155 	}
156 	if (cpu_has_8k_cache) {
157 		extern void __weak r8k_cache_init(void);
158 
159 		r8k_cache_init();
160 		return;
161 	}
162 	if (cpu_has_tx39_cache) {
163 		extern void __weak tx39_cache_init(void);
164 
165 		tx39_cache_init();
166 		return;
167 	}
168 
169 	panic(cache_panic);
170 }
171 
172 int __weak __uncached_access(struct file *file, unsigned long addr)
173 {
174 	if (file->f_flags & O_SYNC)
175 		return 1;
176 
177 	return addr >= __pa(high_memory);
178 }
179