1 /* IEEE754 floating point arithmetic 2 * double precision: common utilities 3 */ 4 /* 5 * MIPS floating point support 6 * Copyright (C) 1994-2000 Algorithmics Ltd. 7 * 8 * This program is free software; you can distribute it and/or modify it 9 * under the terms of the GNU General Public License (Version 2) as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, write to the Free Software Foundation, Inc., 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 20 */ 21 22 #include "ieee754dp.h" 23 24 union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y) 25 { 26 int s; 27 28 COMPXDP; 29 COMPYDP; 30 31 EXPLODEXDP; 32 EXPLODEYDP; 33 34 ieee754_clearcx(); 35 36 FLUSHXDP; 37 FLUSHYDP; 38 39 switch (CLPAIR(xc, yc)) { 40 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN): 41 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN): 42 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN): 43 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN): 44 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN): 45 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN): 46 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN): 47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO): 48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM): 49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM): 50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): 51 ieee754_setcx(IEEE754_INVALID_OPERATION); 52 return ieee754dp_nanxcpt(ieee754dp_indef()); 53 54 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): 55 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): 56 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN): 57 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): 58 return y; 59 60 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): 61 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): 62 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): 63 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): 64 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF): 65 return x; 66 67 68 /* 69 * Infinity handling 70 */ 71 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): 72 if (xs != ys) 73 return x; 74 ieee754_setcx(IEEE754_INVALID_OPERATION); 75 return ieee754dp_indef(); 76 77 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF): 78 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF): 79 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF): 80 return ieee754dp_inf(ys ^ 1); 81 82 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO): 83 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM): 84 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): 85 return x; 86 87 /* 88 * Zero handling 89 */ 90 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): 91 if (xs != ys) 92 return x; 93 else 94 return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD); 95 96 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO): 97 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): 98 return x; 99 100 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM): 101 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM): 102 /* quick fix up */ 103 DPSIGN(y) ^= 1; 104 return y; 105 106 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): 107 DPDNORMX; 108 /* FALL THROUGH */ 109 110 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM): 111 /* normalize ym,ye */ 112 DPDNORMY; 113 break; 114 115 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM): 116 /* normalize xm,xe */ 117 DPDNORMX; 118 break; 119 120 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM): 121 break; 122 } 123 /* flip sign of y and handle as add */ 124 ys ^= 1; 125 126 assert(xm & DP_HIDDEN_BIT); 127 assert(ym & DP_HIDDEN_BIT); 128 129 130 /* provide guard,round and stick bit dpace */ 131 xm <<= 3; 132 ym <<= 3; 133 134 if (xe > ye) { 135 /* 136 * Have to shift y fraction right to align 137 */ 138 s = xe - ye; 139 ym = XDPSRS(ym, s); 140 ye += s; 141 } else if (ye > xe) { 142 /* 143 * Have to shift x fraction right to align 144 */ 145 s = ye - xe; 146 xm = XDPSRS(xm, s); 147 xe += s; 148 } 149 assert(xe == ye); 150 assert(xe <= DP_EMAX); 151 152 if (xs == ys) { 153 /* generate 28 bit result of adding two 27 bit numbers 154 */ 155 xm = xm + ym; 156 xe = xe; 157 xs = xs; 158 159 if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */ 160 xm = XDPSRS1(xm); /* shift preserving sticky */ 161 xe++; 162 } 163 } else { 164 if (xm >= ym) { 165 xm = xm - ym; 166 xe = xe; 167 xs = xs; 168 } else { 169 xm = ym - xm; 170 xe = xe; 171 xs = ys; 172 } 173 if (xm == 0) { 174 if (ieee754_csr.rm == FPU_CSR_RD) 175 return ieee754dp_zero(1); /* round negative inf. => sign = -1 */ 176 else 177 return ieee754dp_zero(0); /* other round modes => sign = 1 */ 178 } 179 180 /* normalize to rounding precision 181 */ 182 while ((xm >> (DP_FBITS + 3)) == 0) { 183 xm <<= 1; 184 xe--; 185 } 186 } 187 188 return ieee754dp_format(xs, xe, xm); 189 } 190