16fbde6b4SJiaxun Yang // SPDX-License-Identifier: GPL-2.0-or-later 26fbde6b4SJiaxun Yang /* 36fbde6b4SJiaxun Yang * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology 46fbde6b4SJiaxun Yang * Author: Fuxin Zhang, zhangfx@lemote.com 56fbde6b4SJiaxun Yang * 66fbde6b4SJiaxun Yang * Copyright (C) 2009 Lemote Inc. 76fbde6b4SJiaxun Yang * Author: Wu Zhangjin, wuzhangjin@gmail.com 86fbde6b4SJiaxun Yang */ 9a746f50dSJiaxun Yang 106fbde6b4SJiaxun Yang #include <asm/time.h> 116fbde6b4SJiaxun Yang #include <asm/hpet.h> 126fbde6b4SJiaxun Yang 136fbde6b4SJiaxun Yang #include <loongson.h> 14*95b56e88SQing Zhang #include <linux/clk.h> 15*95b56e88SQing Zhang #include <linux/of_clk.h> 166fbde6b4SJiaxun Yang plat_time_init(void)176fbde6b4SJiaxun Yangvoid __init plat_time_init(void) 186fbde6b4SJiaxun Yang { 19*95b56e88SQing Zhang struct clk *clk; 20*95b56e88SQing Zhang struct device_node *np; 21*95b56e88SQing Zhang 22*95b56e88SQing Zhang if (loongson_sysconf.fw_interface == LOONGSON_DTB) { 23*95b56e88SQing Zhang of_clk_init(NULL); 24*95b56e88SQing Zhang 25*95b56e88SQing Zhang np = of_get_cpu_node(0, NULL); 26*95b56e88SQing Zhang if (!np) { 27*95b56e88SQing Zhang pr_err("Failed to get CPU node\n"); 28*95b56e88SQing Zhang return; 29*95b56e88SQing Zhang } 30*95b56e88SQing Zhang 31*95b56e88SQing Zhang clk = of_clk_get(np, 0); 32*95b56e88SQing Zhang if (IS_ERR(clk)) { 33*95b56e88SQing Zhang pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk)); 34*95b56e88SQing Zhang return; 35*95b56e88SQing Zhang } 36*95b56e88SQing Zhang 37*95b56e88SQing Zhang cpu_clock_freq = clk_get_rate(clk); 38*95b56e88SQing Zhang clk_put(clk); 39*95b56e88SQing Zhang } 40*95b56e88SQing Zhang 416fbde6b4SJiaxun Yang /* setup mips r4k timer */ 426fbde6b4SJiaxun Yang mips_hpt_frequency = cpu_clock_freq / 2; 436fbde6b4SJiaxun Yang 446fbde6b4SJiaxun Yang #ifdef CONFIG_RS780_HPET 456fbde6b4SJiaxun Yang setup_hpet_timer(); 466fbde6b4SJiaxun Yang #endif 476fbde6b4SJiaxun Yang } 48