1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2009 Lemote Inc. 4 * Author: Wu Zhangjin, wuzhangjin@gmail.com 5 */ 6 7 #include <linux/irqchip.h> 8 #include <linux/logic_pio.h> 9 #include <linux/memblock.h> 10 #include <linux/of.h> 11 #include <linux/of_address.h> 12 #include <asm/bootinfo.h> 13 #include <asm/traps.h> 14 #include <asm/smp-ops.h> 15 #include <asm/cacheflush.h> 16 #include <asm/fw/fw.h> 17 18 #include <loongson.h> 19 #include <boot_param.h> 20 21 #define NODE_ID_OFFSET_ADDR ((void __iomem *)TO_UNCAC(0x1001041c)) 22 23 u32 node_id_offset; 24 25 static void __init mips_nmi_setup(void) 26 { 27 void *base; 28 29 base = (void *)(CAC_BASE + 0x380); 30 memcpy(base, except_vec_nmi, 0x80); 31 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); 32 } 33 34 void ls7a_early_config(void) 35 { 36 node_id_offset = ((readl(NODE_ID_OFFSET_ADDR) >> 8) & 0x1f) + 36; 37 } 38 39 void rs780e_early_config(void) 40 { 41 node_id_offset = 37; 42 } 43 44 void virtual_early_config(void) 45 { 46 node_id_offset = 44; 47 } 48 49 void __init szmem(unsigned int node) 50 { 51 u32 i, mem_type; 52 static unsigned long num_physpages; 53 u64 node_id, node_psize, start_pfn, end_pfn, mem_start, mem_size; 54 55 /* Otherwise come from DTB */ 56 if (loongson_sysconf.fw_interface != LOONGSON_LEFI) 57 return; 58 59 /* Parse memory information and activate */ 60 for (i = 0; i < loongson_memmap->nr_map; i++) { 61 node_id = loongson_memmap->map[i].node_id; 62 if (node_id != node) 63 continue; 64 65 mem_type = loongson_memmap->map[i].mem_type; 66 mem_size = loongson_memmap->map[i].mem_size; 67 mem_start = loongson_memmap->map[i].mem_start; 68 69 switch (mem_type) { 70 case SYSTEM_RAM_LOW: 71 case SYSTEM_RAM_HIGH: 72 start_pfn = ((node_id << 44) + mem_start) >> PAGE_SHIFT; 73 node_psize = (mem_size << 20) >> PAGE_SHIFT; 74 end_pfn = start_pfn + node_psize; 75 num_physpages += node_psize; 76 pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n", 77 (u32)node_id, mem_type, mem_start, mem_size); 78 pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n", 79 start_pfn, end_pfn, num_physpages); 80 memblock_add_node(PFN_PHYS(start_pfn), PFN_PHYS(node_psize), node); 81 break; 82 case SYSTEM_RAM_RESERVED: 83 pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n", 84 (u32)node_id, mem_type, mem_start, mem_size); 85 memblock_reserve(((node_id << 44) + mem_start), mem_size << 20); 86 break; 87 } 88 } 89 } 90 91 #ifndef CONFIG_NUMA 92 static void __init prom_init_memory(void) 93 { 94 szmem(0); 95 } 96 #endif 97 98 void __init prom_init(void) 99 { 100 fw_init_cmdline(); 101 102 if (fw_arg2 == 0 || (fdt_magic(fw_arg2) == FDT_MAGIC)) { 103 loongson_sysconf.fw_interface = LOONGSON_DTB; 104 prom_dtb_init_env(); 105 } else { 106 loongson_sysconf.fw_interface = LOONGSON_LEFI; 107 prom_lefi_init_env(); 108 } 109 110 /* init base address of io space */ 111 set_io_port_base(PCI_IOBASE); 112 113 if (loongson_sysconf.early_config) 114 loongson_sysconf.early_config(); 115 116 #ifdef CONFIG_NUMA 117 prom_init_numa_memory(); 118 #else 119 prom_init_memory(); 120 #endif 121 122 /* Hardcode to CPU UART 0 */ 123 if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R) 124 setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE), 0, 1024); 125 else 126 setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE + 0x1e0), 0, 1024); 127 128 register_smp_ops(&loongson3_smp_ops); 129 board_nmi_handler_setup = mips_nmi_setup; 130 } 131 132 static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_t hw_start, 133 resource_size_t size) 134 { 135 int ret = 0; 136 struct logic_pio_hwaddr *range; 137 unsigned long vaddr; 138 139 range = kzalloc(sizeof(*range), GFP_ATOMIC); 140 if (!range) 141 return -ENOMEM; 142 143 range->fwnode = fwnode; 144 range->size = size = round_up(size, PAGE_SIZE); 145 range->hw_start = hw_start; 146 range->flags = LOGIC_PIO_CPU_MMIO; 147 148 ret = logic_pio_register_range(range); 149 if (ret) { 150 kfree(range); 151 return ret; 152 } 153 154 /* Legacy ISA must placed at the start of PCI_IOBASE */ 155 if (range->io_start != 0) { 156 logic_pio_unregister_range(range); 157 kfree(range); 158 return -EINVAL; 159 } 160 161 vaddr = PCI_IOBASE + range->io_start; 162 163 ioremap_page_range(vaddr, vaddr + size, hw_start, pgprot_device(PAGE_KERNEL)); 164 165 return 0; 166 } 167 168 static __init void reserve_pio_range(void) 169 { 170 struct device_node *np; 171 172 for_each_node_by_name(np, "isa") { 173 struct of_range range; 174 struct of_range_parser parser; 175 176 pr_info("ISA Bridge: %pOF\n", np); 177 178 if (of_range_parser_init(&parser, np)) { 179 pr_info("Failed to parse resources.\n"); 180 break; 181 } 182 183 for_each_of_range(&parser, &range) { 184 switch (range.flags & IORESOURCE_TYPE_BITS) { 185 case IORESOURCE_IO: 186 pr_info(" IO 0x%016llx..0x%016llx -> 0x%016llx\n", 187 range.cpu_addr, 188 range.cpu_addr + range.size - 1, 189 range.bus_addr); 190 if (add_legacy_isa_io(&np->fwnode, range.cpu_addr, range.size)) 191 pr_warn("Failed to reserve legacy IO in Logic PIO\n"); 192 break; 193 case IORESOURCE_MEM: 194 pr_info(" MEM 0x%016llx..0x%016llx -> 0x%016llx\n", 195 range.cpu_addr, 196 range.cpu_addr + range.size - 1, 197 range.bus_addr); 198 break; 199 } 200 } 201 } 202 } 203 204 void __init arch_init_irq(void) 205 { 206 reserve_pio_range(); 207 irqchip_init(); 208 } 209