xref: /openbmc/linux/arch/mips/loongson64/init.c (revision 2ae2e7cf)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2009 Lemote Inc.
4  * Author: Wu Zhangjin, wuzhangjin@gmail.com
5  */
6 
7 #include <linux/irqchip.h>
8 #include <linux/logic_pio.h>
9 #include <linux/memblock.h>
10 #include <linux/of.h>
11 #include <linux/of_address.h>
12 #include <asm/bootinfo.h>
13 #include <asm/traps.h>
14 #include <asm/smp-ops.h>
15 #include <asm/cacheflush.h>
16 #include <asm/fw/fw.h>
17 
18 #include <loongson.h>
19 #include <boot_param.h>
20 
21 #define NODE_ID_OFFSET_ADDR	((void __iomem *)TO_UNCAC(0x1001041c))
22 
23 u32 node_id_offset;
24 
25 static void __init mips_nmi_setup(void)
26 {
27 	void *base;
28 
29 	base = (void *)(CAC_BASE + 0x380);
30 	memcpy(base, except_vec_nmi, 0x80);
31 	flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
32 }
33 
34 void ls7a_early_config(void)
35 {
36 	node_id_offset = ((readl(NODE_ID_OFFSET_ADDR) >> 8) & 0x1f) + 36;
37 }
38 
39 void rs780e_early_config(void)
40 {
41 	node_id_offset = 37;
42 }
43 
44 void virtual_early_config(void)
45 {
46 	node_id_offset = 44;
47 }
48 
49 void __init szmem(unsigned int node)
50 {
51 	u32 i, mem_type;
52 	phys_addr_t node_id, mem_start, mem_size;
53 
54 	/* Otherwise come from DTB */
55 	if (loongson_sysconf.fw_interface != LOONGSON_LEFI)
56 		return;
57 
58 	/* Parse memory information and activate */
59 	for (i = 0; i < loongson_memmap->nr_map; i++) {
60 		node_id = loongson_memmap->map[i].node_id;
61 		if (node_id != node)
62 			continue;
63 
64 		mem_type = loongson_memmap->map[i].mem_type;
65 		mem_size = loongson_memmap->map[i].mem_size;
66 
67 		/* Memory size comes in MB if MEM_SIZE_IS_IN_BYTES not set */
68 		if (mem_size & MEM_SIZE_IS_IN_BYTES)
69 			mem_size &= ~MEM_SIZE_IS_IN_BYTES;
70 		else
71 			mem_size = mem_size << 20;
72 
73 		mem_start = (node_id << 44) | loongson_memmap->map[i].mem_start;
74 
75 		switch (mem_type) {
76 		case SYSTEM_RAM_LOW:
77 		case SYSTEM_RAM_HIGH:
78 		case UMA_VIDEO_RAM:
79 			pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes usable\n",
80 				(u32)node_id, mem_type, &mem_start, &mem_size);
81 			memblock_add_node(mem_start, mem_size, node,
82 					  MEMBLOCK_NONE);
83 			break;
84 		case SYSTEM_RAM_RESERVED:
85 		case VIDEO_ROM:
86 		case ADAPTER_ROM:
87 		case ACPI_TABLE:
88 		case SMBIOS_TABLE:
89 			pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes reserved\n",
90 				(u32)node_id, mem_type, &mem_start, &mem_size);
91 			memblock_reserve(mem_start, mem_size);
92 			break;
93 		/* We should not reserve VUMA_VIDEO_RAM as it overlaps with MMIO */
94 		case VUMA_VIDEO_RAM:
95 		default:
96 			pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes unhandled\n",
97 				(u32)node_id, mem_type, &mem_start, &mem_size);
98 			break;
99 		}
100 	}
101 
102 	/* Reserve vgabios if it comes from firmware */
103 	if (loongson_sysconf.vgabios_addr)
104 		memblock_reserve(virt_to_phys((void *)loongson_sysconf.vgabios_addr),
105 				SZ_256K);
106 }
107 
108 #ifndef CONFIG_NUMA
109 static void __init prom_init_memory(void)
110 {
111 	szmem(0);
112 }
113 #endif
114 
115 void __init prom_init(void)
116 {
117 	fw_init_cmdline();
118 
119 	if (fw_arg2 == 0 || (fdt_magic(fw_arg2) == FDT_MAGIC)) {
120 		loongson_sysconf.fw_interface = LOONGSON_DTB;
121 		prom_dtb_init_env();
122 	} else {
123 		loongson_sysconf.fw_interface = LOONGSON_LEFI;
124 		prom_lefi_init_env();
125 	}
126 
127 	/* init base address of io space */
128 	set_io_port_base(PCI_IOBASE);
129 
130 	if (loongson_sysconf.early_config)
131 		loongson_sysconf.early_config();
132 
133 #ifdef CONFIG_NUMA
134 	prom_init_numa_memory();
135 #else
136 	prom_init_memory();
137 #endif
138 
139 	/* Hardcode to CPU UART 0 */
140 	if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R)
141 		setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE), 0, 1024);
142 	else
143 		setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE + 0x1e0), 0, 1024);
144 
145 	register_smp_ops(&loongson3_smp_ops);
146 	board_nmi_handler_setup = mips_nmi_setup;
147 }
148 
149 static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_t hw_start,
150 				    resource_size_t size)
151 {
152 	int ret = 0;
153 	struct logic_pio_hwaddr *range;
154 	unsigned long vaddr;
155 
156 	range = kzalloc(sizeof(*range), GFP_ATOMIC);
157 	if (!range)
158 		return -ENOMEM;
159 
160 	range->fwnode = fwnode;
161 	range->size = size = round_up(size, PAGE_SIZE);
162 	range->hw_start = hw_start;
163 	range->flags = LOGIC_PIO_CPU_MMIO;
164 
165 	ret = logic_pio_register_range(range);
166 	if (ret) {
167 		kfree(range);
168 		return ret;
169 	}
170 
171 	/* Legacy ISA must placed at the start of PCI_IOBASE */
172 	if (range->io_start != 0) {
173 		logic_pio_unregister_range(range);
174 		kfree(range);
175 		return -EINVAL;
176 	}
177 
178 	vaddr = PCI_IOBASE + range->io_start;
179 
180 	ioremap_page_range(vaddr, vaddr + size, hw_start, pgprot_device(PAGE_KERNEL));
181 
182 	return 0;
183 }
184 
185 static __init void reserve_pio_range(void)
186 {
187 	struct device_node *np;
188 
189 	for_each_node_by_name(np, "isa") {
190 		struct of_range range;
191 		struct of_range_parser parser;
192 
193 		pr_info("ISA Bridge: %pOF\n", np);
194 
195 		if (of_range_parser_init(&parser, np)) {
196 			pr_info("Failed to parse resources.\n");
197 			of_node_put(np);
198 			break;
199 		}
200 
201 		for_each_of_range(&parser, &range) {
202 			switch (range.flags & IORESOURCE_TYPE_BITS) {
203 			case IORESOURCE_IO:
204 				pr_info(" IO 0x%016llx..0x%016llx  ->  0x%016llx\n",
205 					range.cpu_addr,
206 					range.cpu_addr + range.size - 1,
207 					range.bus_addr);
208 				if (add_legacy_isa_io(&np->fwnode, range.cpu_addr, range.size))
209 					pr_warn("Failed to reserve legacy IO in Logic PIO\n");
210 				break;
211 			case IORESOURCE_MEM:
212 				pr_info(" MEM 0x%016llx..0x%016llx  ->  0x%016llx\n",
213 					range.cpu_addr,
214 					range.cpu_addr + range.size - 1,
215 					range.bus_addr);
216 				break;
217 			}
218 		}
219 	}
220 }
221 
222 void __init arch_init_irq(void)
223 {
224 	reserve_pio_range();
225 	irqchip_init();
226 }
227