1# 2# Loongson Processors' Support 3# 4 5# Only gcc >= 4.4 have Loongson specific support 6cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap 7cflags-$(CONFIG_CPU_LOONGSON2E) += \ 8 $(call cc-option,-march=loongson2e,-march=r4600) 9cflags-$(CONFIG_CPU_LOONGSON2F) += \ 10 $(call cc-option,-march=loongson2f,-march=r4600) 11# Enable the workarounds for Loongson2f 12ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS 13 ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-nop,),) 14 $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop) 15 else 16 cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-nop 17 endif 18 ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-jump,),) 19 $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump) 20 else 21 cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-jump 22 endif 23endif 24 25cflags-$(CONFIG_CPU_LOONGSON3) += -Wa,--trap 26 27# 28# Some versions of binutils, not currently mainline as of 2019/02/04, support 29# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction 30# to work around a CPU bug (see loongson_llsc_mb() in asm/barrier.h for a 31# description). 32# 33# We disable this in order to prevent the assembler meddling with the 34# instruction that labels refer to, ie. if we label an ll instruction: 35# 36# 1: ll v0, 0(a0) 37# 38# ...then with the assembler fix applied the label may actually point at a sync 39# instruction inserted by the assembler, and if we were using the label in an 40# exception table the table would no longer contain the address of the ll 41# instruction. 42# 43# Avoid this by explicitly disabling that assembler behaviour. If upstream 44# binutils does not merge support for the flag then we can revisit & remove 45# this later - for now it ensures vendor toolchains don't cause problems. 46# 47cflags-$(CONFIG_CPU_LOONGSON3) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,) 48 49# 50# binutils from v2.25 on and gcc starting from v4.9.0 treat -march=loongson3a 51# as MIPS64 R2; older versions as just R1. This leaves the possibility open 52# that GCC might generate R2 code for -march=loongson3a which then is rejected 53# by GAS. The cc-option can't probe for this behaviour so -march=loongson3a 54# can't easily be used safely within the kbuild framework. 55# 56ifeq ($(call cc-ifversion, -ge, 0409, y), y) 57 ifeq ($(call ld-ifversion, -ge, 225000000, y), y) 58 cflags-$(CONFIG_CPU_LOONGSON3) += \ 59 $(call cc-option,-march=loongson3a -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 60 else 61 cflags-$(CONFIG_CPU_LOONGSON3) += \ 62 $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 63 endif 64else 65 cflags-$(CONFIG_CPU_LOONGSON3) += \ 66 $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 67endif 68 69# 70# Loongson Machines' Support 71# 72 73platform-$(CONFIG_MACH_LOONGSON64) += loongson64/ 74cflags-$(CONFIG_MACH_LOONGSON64) += -I$(srctree)/arch/mips/include/asm/mach-loongson64 -mno-branch-likely 75load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000 76load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000 77load-$(CONFIG_LOONGSON_MACH3X) += 0xffffffff80200000 78