1# 2# Loongson Processors' Support 3# 4 5 6cflags-$(CONFIG_CPU_LOONGSON64) += -Wa,--trap 7 8# 9# Some versions of binutils, not currently mainline as of 2019/02/04, support 10# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction 11# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a 12# description). 13# 14# We disable this in order to prevent the assembler meddling with the 15# instruction that labels refer to, ie. if we label an ll instruction: 16# 17# 1: ll v0, 0(a0) 18# 19# ...then with the assembler fix applied the label may actually point at a sync 20# instruction inserted by the assembler, and if we were using the label in an 21# exception table the table would no longer contain the address of the ll 22# instruction. 23# 24# Avoid this by explicitly disabling that assembler behaviour. If upstream 25# binutils does not merge support for the flag then we can revisit & remove 26# this later - for now it ensures vendor toolchains don't cause problems. 27# 28cflags-$(CONFIG_CPU_LOONGSON64) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,) 29 30# 31# binutils from v2.25 on and gcc starting from v4.9.0 treat -march=loongson3a 32# as MIPS64 R2; older versions as just R1. This leaves the possibility open 33# that GCC might generate R2 code for -march=loongson3a which then is rejected 34# by GAS. The cc-option can't probe for this behaviour so -march=loongson3a 35# can't easily be used safely within the kbuild framework. 36# 37ifeq ($(call cc-ifversion, -ge, 0409, y), y) 38 ifeq ($(call ld-ifversion, -ge, 225000000, y), y) 39 cflags-$(CONFIG_CPU_LOONGSON64) += \ 40 $(call cc-option,-march=loongson3a -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 41 else 42 cflags-$(CONFIG_CPU_LOONGSON64) += \ 43 $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 44 endif 45else 46 cflags-$(CONFIG_CPU_LOONGSON64) += \ 47 $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 48endif 49 50# Some -march= flags enable MMI instructions, and GCC complains about that 51# support being enabled alongside -msoft-float. Thus explicitly disable MMI. 52cflags-y += $(call cc-option,-mno-loongson-mmi) 53 54# 55# Loongson Machines' Support 56# 57 58cflags-$(CONFIG_MACH_LOONGSON64) += -I$(srctree)/arch/mips/include/asm/mach-loongson64 -mno-branch-likely 59load-$(CONFIG_CPU_LOONGSON64) += 0xffffffff80200000 60