1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology 4 * Author: Fuxin Zhang, zhangfx@lemote.com 5 */ 6 #include <linux/interrupt.h> 7 8 #include <asm/irq_cpu.h> 9 #include <asm/i8259.h> 10 11 #include <loongson.h> 12 13 static void i8259_irqdispatch(void) 14 { 15 int irq; 16 17 irq = i8259_irq(); 18 if (irq >= 0) 19 do_IRQ(irq); 20 else 21 spurious_interrupt(); 22 } 23 24 asmlinkage void mach_irq_dispatch(unsigned int pending) 25 { 26 if (pending & CAUSEF_IP7) 27 do_IRQ(MIPS_CPU_IRQ_BASE + 7); 28 else if (pending & CAUSEF_IP6) /* perf counter loverflow */ 29 return; 30 else if (pending & CAUSEF_IP5) 31 i8259_irqdispatch(); 32 else if (pending & CAUSEF_IP2) 33 bonito_irqdispatch(); 34 else 35 spurious_interrupt(); 36 } 37 38 void __init mach_init_irq(void) 39 { 40 int irq; 41 42 /* init all controller 43 * 0-15 ------> i8259 interrupt 44 * 16-23 ------> mips cpu interrupt 45 * 32-63 ------> bonito irq 46 */ 47 48 /* most bonito irq should be level triggered */ 49 LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR | 50 LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES; 51 52 /* Sets the first-level interrupt dispatcher. */ 53 mips_cpu_irq_init(); 54 init_i8259_irqs(); 55 bonito_irq_init(); 56 57 /* bonito irq at IP2 */ 58 irq = MIPS_CPU_IRQ_BASE + 2; 59 if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade", NULL)) 60 pr_err("Failed to request irq %d (cascade)\n", irq); 61 /* 8259 irq at IP5 */ 62 irq = MIPS_CPU_IRQ_BASE + 5; 63 if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade", NULL)) 64 pr_err("Failed to request irq %d (cascade)\n", irq); 65 } 66